TW558772B - Semiconductor wafer, semiconductor device and fabrication method thereof - Google Patents

Semiconductor wafer, semiconductor device and fabrication method thereof Download PDF

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Publication number
TW558772B
TW558772B TW91116151A TW91116151A TW558772B TW 558772 B TW558772 B TW 558772B TW 91116151 A TW91116151 A TW 91116151A TW 91116151 A TW91116151 A TW 91116151A TW 558772 B TW558772 B TW 558772B
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TW
Taiwan
Prior art keywords
semiconductor wafer
electrode
semiconductor
probe
pad
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Application number
TW91116151A
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English (en)
Inventor
Koichi Nagao
Hiroaki Fujimoto
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Matsushita Electric Ind Co Ltd
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Publication of TW558772B publication Critical patent/TW558772B/zh

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    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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Description

558772 五、發明説明Ct 發明之技術領域 本發明係有關於上面上分別形成有半導體積體電路之兩 個半導體晶片藉由倒裝片接合而彼此接合之晶片上晶片 (COC; Chip On Chip)型的半導體裝置。 先前技藝 近年來i為求設有積體電路之半導體裝置的低成本化、 小型化及向性能化（高速化、低耗電化），積極嘗試各種方式 。例如’提出有具備具有彼此不同功能之Lsi，或藉由彼此 不同製程所形成之LSI的兩個半導體晶片，藉由倒裝片接合 而彼此接合的coc型半導體裝置。 σ 以下，說明兩個半導體晶片藉由倒裝片接合而彼此接合 之先則半導體裝置及其製造方法。 訂 圖11⑷係顯示分別具有冑成搭載於先前半導體裝置之半 導體晶片之數個半導體晶片區域的半導趙晶圓模式圖。圖 11⑻係放大顯示圖11⑷之半導體晶圓上面的平面圖。 ^圖11(a)及（b)所示’在半導體晶圓1上形成有數個半導 胆日日片區域2。各半導體晶片區域2被分離線3分割，在各半 ?體晶片严或2上形成有數個電極墊4。各半導體晶片區域2 藉由沿著分離線3被切斷’形成搭載於先前之半導體 的半導體晶片。 此處，形成於半導體晶片區域2之電極墊4係用作執行斑 外部電性連接用之外部電極势’及用作執行各個半導體晶 片之電性檢查用的探針墊。亦即，一個電極墊兼用作外部 電極塾與檢查電極^而各個半導體晶片區域2的表面上僅 I · 4 * 本g尺度適用中國國^^NS) A4規格(2ι〇 χ 五、發明説明ς 顯示電極墊4，其他配線等的圖式省略。
==示自先前半導體裝置具備之半導體晶圓… 之+導體晶片2a與另外之半導體曰K 先前半導體裝置的剖面圖日片5㈣式圖，圖邮)係 如圖12⑷及⑻所示，+導體晶片5的上面 上的突起電極6及外部電極塾7。此外，在Γ導： :片2a上面上之電極墊4上形成有突起電極9。先 姐裝置200藉由連接有突起電極6與突起電極9, $導體晶 5與半導體晶片23藉由倒裝片接合而接合。此時，如圖= 所不’半導體晶片2a搭載於半導體晶片 示的囬上·之以虛線顯 盘=2(b)所示，先前之半導體裝置2〇〇,在半導體晶片$ '、+導體晶片2a之間充填有絕緣性樹脂1〇。此外半導體曰 片5固定於引導框架之晶片焊塾11±。再者半導體晶片^ 外部電極塾7與引導框架之内部引線12係藉由金屬細線H 性連接。半導體晶片5、半導體晶片2a、晶片焊墊u、内部 引線12及金屬細線13藉由封裝樹脂M封裝。 其次，說明先前之半導體裝置2〇〇的製造方法。 f先’在半導體晶片5上之中央部塗敷絕緣性樹脂。繼續 ，將半導體晶片2a擠壓在半導體晶片5上，連接半導體晶片 5之犬起電極6與半導體晶片2a之突起電極9。另外，亦可藉 由倒裝片接合連接半導體晶片5與半導體晶片2禮，注入絕 緣性樹脂。 其次，藉由金屬細線13連接半導體晶片5之外部電極墊7 五、發明説明（s 與引導框架之内部引線12後，以封袭樹脂14封裝半 片2a、半導體晶片5、晶片焊墊n、内部引線12及金屬細: 13。繼續’藉由形成自封裝樹脂14突出之引導框架 引線’以獲得半導體裝置2 〇 〇。 發明所欲解決之問題 但是，先前之半導體裝置200,須在搭載半導體晶片以之 +導體晶片5的周圍設置連接金屬細線加的外部電極塾7 二且設有外部電極塾7之位置’如圖12⑷所示’須為搭載有 半導體晶片2a之區域s的外側。因而’半導體晶片5之尺、 須大於半導體晶片2a的尺寸。 曰曰 尺寸 因此，考慮藉由縮小半導體晶片2a之尺寸，縮小半導體 晶片5的尺寸，以縮小半導體裝置的尺寸。但是，從以下所 述的情況，存在縮小半導體晶片2a尺寸困難的問題。 形成於半導體晶之半導體晶片區域2，於探測之電性 檢查後’僅拾取良品。其次，藉由分離所拾取之半導 片區域2所獲得之半導體晶片2a，藉由倒裝片接合而接合： 半導體晶片5上。 ' 為執行探測之電性檢查需要探針塾，半導體晶片區域2(半 導體晶片2a)之電極墊4的一部分形成探針墊。探針於 探針墊之電極塾4後會滑動。因此，為使探針確實接觸於探 針塾之電極塾4，探針塾之電極塾4需要形成大於_邊為％ 以上之正方形的尺寸。因此，半導體晶片h的尺寸必然 變大《以致縮小半導體晶片2a的尺寸困難。 …、 此外，隨半導體裝置之高性能化（高速化、低耗電化），因 五、發明説明（4 在半導體晶片區域2(半導體晶片2a)内形成探針墊，亦存在 無法忽略探針塾、電極墊、電極塾之保護電路、突起電極 及配線之各個靜電電容及電感等之影響的問題。 本發明之半導體裝置係在解決上述先前的問題，其目的 在提供一種小型且高性能的半導體裝置。 解決問題之手段 、本發明之半導體晶圓分別具備才冓成半導體晶片之數個半 導體晶片d域，及將上述數個半導體晶片輯分離成各個 半導體晶片用的切斷區域，上述數個半導體晶片區域内設 有積體電路及連接於上述積體電路的電極墊，上述切斷區 域上没有連接於上述電極塾的探針墊。 一本發明之半導體晶圓藉由使探針接觸於探針墊，於檢查 半導體晶圓後，藉由切斷除去形成有檢查後不需要之探針 墊的切斷區域。因而構成半導體晶片之半導體晶片區域的 尺寸變小。因此，採用本發明可獲得比先前之半導體晶圓 /斤獲付之半導體晶片小型的半導體晶片。此外，由於所獲 知之半導體晶片係藉由切斷除去探針墊，因此不需要考慮 探針墊的靜電電容及電感。因此，本發明之半導體晶片之 電極墊等配線的靜電電容及電感小於先前之半導體晶片之 電極墊等之配線的靜電電容及電感。 亦可構成形成於上述各個半導體晶片區域上之上述電極 塾的數量多於連接於上述電極墊之上述探針墊的數量。 宜構成形成於上述各個半導體晶片區域上之上述電極墊 的間距小於連接於上述電極墊之上述探針墊的間距。 558772 A7 B7 五、發明説明（s 藉此’於檢查時可加長向探針滑動方向之探針墊的形狀 。因而可更確實地實施檢查。 亦可構成形成於上述各個半導體晶片區域上之上述電極 墊的尺寸小於連接於上述電極墊之上述探針墊的數量。 亦可構成連接於上述電極墊之上述探針墊沿著上述半導 體晶片區域之一邊、兩邊、或三邊形成。 上述切斷區域内亦可設有上述探針墊的保護電路。 連接於上述各個半導體晶片區域上所形成之上述電極墊 的配線，比連接於上述探針墊之配線，宜使用下層之配線 層來形成。 藉此，可縮短自内部電路至電極墊的配線長度。因此可 減少配線電容。 訂 本發明之半導體裝置具備：第一半導體晶片，其係具有 ••第一積體電f連接於上述第一積體電路 < 第一電極墊 :及形成於上述第一電極墊上的第一突起電極；及第二半 導體晶片，其係具有··第二積體電路；連接於上述第二積 體電路之第二電極墊；及形成於上述第二電極墊上的第二 突起電極；於上述第一半導體晶片的側端面，連接於上述 第一電極塾之檢查用配線的剖面露出，上述第一突起電極 與上述第二突起電極電性連接。 本&月之帛半‘體晶片藉由切斷除去有檢查後不需要 的檢查用配線’設有檢查用配線的區域亦被除去。因此， 第一半導體晶片的尺寸小於先前的半導體晶片。因此，可 獲得比先前之半導體裝置小型的半導體裝置。此外，由於 -8- 五、 發明説明 (6 半導體晶片之檢查用配線藉由切斷除去 ，查用配線之靜電電容及電感。因此，本發明之；2 、置之電極墊等配線的靜電電容及電感小於先前半導體 置之電極墊等配線的靜電電容及電感。 且、 造本發明可採用於上述第—半導體晶片不設置探針塾的構 、亦可於上述第二半導體晶片的周邊部形成有與外部電路 連接用的外部電極墊。 亦可採用於上述第一半導體晶片與上述第二半導體晶片 之間介有絕緣性樹脂的構造。 上述第一半導體晶片及上述第二半導體晶片亦可藉由封 裝樹脂封裝。 •本發明之半導體裝置的製造方法具備：分別構成第一半 導體晶片之數個第一半導體晶片區域；及將上述數個第一 半導體晶片區域分別分離成第一半導體晶片的切斷區域 ;並包含··第一半導體晶圓準備步驟0)，其係上述數個第 一半導體晶片區域上設有第一積體電路及連接於上述第一 積體電路之第一電極墊，上述切斷區域上設有連接於上述 第一電極塾的探針|;上述數個第—半導體晶片的檢查步 驟（b) ’其係使探針接觸於上述探針墊來實施檢查；第一突 起電極形成步驟（C)，其係形成於上述第一電極墊上；數個 第一半導體晶片形成步驟（d)，其係藉由除去上述第一半導 體晶圓之上述切斷區域，自上述數個第一半導體晶片區域 形成，第二半導體晶圓準備步驟，其係具有：第二積體 558772 五 、發明説明（7 電路；及連接於上述第二積體電路之第：電極墊；並具備 分別構成第二半導體晶片的數個第二半導體晶片區域；第 :突起電極形成步驟⑺，其係形成於上述數個第二半導體 晶片區域上所形成的上述第二電極墊上；電性連接步驟二 ★，其=藉由加熱及擠壓電性連接上述第一突起電極與上述 第二突起電極；及切斷步驟（h)，其係將上述第二半導體晶 圓切斷成上述數個第二半導體晶片區域。 且曰曰 本發明之第一半導體晶片係藉由切斷除去檢查後不需要 的探針塾m此，第—半導體晶片的尺寸小於先前半導體 晶片。因此，可獲得比先前半導體裝置小型的半導體裝置 此外，由於第一半導體晶片係藉由切斷除去探針墊，因 此於所獲得的半導體裝置不需要考慮探針塾的靜電電容及 電感。因此，採用本發明可獲得電極墊等配線之靜電電容 及電感小於先前半導體裝置之電極墊等配線之靜電電容及 電感的半挲體裝置。 上述步驟（g)亦可在上述第一半導體晶片與上述第二半導 體晶片之間供給絕緣性樹脂。 上述步驟（C)及上述步驟（f)亦可藉由電解鍍法、無電解鑛 法、印刷法、浸潰法或間柱凸塊（Stud Bump)法等任何一種 方法形成上述第一突起電極及上述第二突起電極。 上述步驟（c)亦可採用含錫及銀之合金、含錫及絡之合金 '錫、鎮、銅、銦及金中之任何一種形成上述第一突起電 才S 〇 發明之實施形態 -10- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐） 五、發明説明（s 以下，參照圖式說明本發明實施形態之半導體晶圓及使 用其之半導體裝置。 首先，說明本實施形態之半導體晶圓。圖1(a)係顯示形成 有構成半導體晶片之數個半導體晶片區域的半導體晶圓模 式圖，圖1(b)係放大顯示圖1(幻之半導體晶圓上面的平面圖。 如圖1(a)及（b)所示，本實施形態之半導體晶圓15形成有 被第一分離線16分割的數個體型晶片（bulk chip)區域17。表 體區域17上形成有積體電路（無圖式）、電極墊18、及探針墊 19，第二分離線20通過積體電路及電極墊18與探針墊丨今之 間第一为離線20在體型晶片區域17的表面，位於第一分 離線16的内側，將體型晶片區域17分離成構成半導體晶片 之半導體晶片區域17a、及第一分離線16與第二分離線2〇間 之切斷區域17b。亦即，體型晶片區域17位於第二分離線2〇 之内側，並具有··構成半導體晶片之數個半導體晶片區域 17a ;及第一分離線16與第二分離線2〇間的切斷區域丨％。 而此處之苐一分離線2 0係便於說明所假設的線，實際上 不應形成於半導體晶圓15上。此外，本實施形態之第二分 離線20係直線，當然亦可為曲線。 數個探針墊19經由橫切第二分離線2〇之配線2丨與電極塾 18連接。 電極墊1 8於構成半導體裝置時，係用於連接自半導體晶 片區域17a獲得之半導體晶片與另外之半導體晶片的電極墊 者’並為了在兩個半導體晶片間高速地傳送信號而設。另 卜電極塾1 8且δ又置成开> 成在半導體晶片區域1 7 a内之配線 558772 A7 ____B7_ 五、發明説明（9 ) ~--- 及擴散層等的正上方，以縮短至電極墊18的配線長。 圖2係顯示以旋轉刀片沿著第二分離線2〇切斷而分離之半 導體晶片17c的平面圖。 如圖2所示，形成有探針墊19之切斷區域被除去，於半導 體晶片17c上殘留積體電路（無圖式）、電極墊18、與配線幻 。此外，在半導體晶片17c的側端面，配線21的切斷面露出。 因而，本μ施形悲之半導體晶圓丨5，藉由使探針接觸於 探針墊19檢查各體型晶片區域17後，藉由切斷除去形成有 檢查後不需要之探針墊19的切斷區域丨7b。因此半導體晶片 區域17a的尺寸小於先前半導體晶片區域2。亦即，可使自 本實施形態之半導體晶圓15所獲得之半導體晶片丨乃的晶片 尺寸小於先前的半導體晶片2a。 其次，參照圖式說明另外一種設於上述半導體晶圓上的 體型晶片區域17。圖3(a)、圖3(b)、圖4(a)、圖4(b)、圖5⑷ 及圖5(b)係顯示構成搭載於半導體晶片22上之半導體晶片 17c之另一種體型晶片區域Η的平面圖。 圖3(a)所不之體型晶片區域17，在半導體晶片區域的 内部設有BIST等用的檢查電路（無圖式）。藉此，可使切斷 區域17b之探針墊19數量少於電極墊18的數量。如於本實施 形態之半導體裝置1〇〇中，半導體晶片17(：係〇11八“，半導體 晶片22包含邏輯電路時，圖3(a)所示之體型晶片區域17的電 極墊18數量約需要140個，而資料線用墊、位址線用墊、控 制用墊、電源用墊等所需的探針墊丨9數量約為5〇個。 因而藉由減少探針墊19的數量，可使探針墊19的間距32 -12-
558772
大於電極2墊18的間距33。如假設半導體晶片區域ΐ7&之面積 為20 mm2(邊之長度4 mmx5 ，如電極墊18之間距u 為80#m可在半導體晶片區域17a上配置約2〇〇個電極塾j 8 。而探針墊19’假設半導體晶片區域17a之面積為2〇 mm2時 ，則可配置成間距32為300 # m。且如以上所述，由於可擴 大探針墊19的間距32，因此對電極墊18之寬度34，可擴大 採針墊19的寬度35。因此，如電極墊18之寬度34為5〇# m時 ，亦可使探針墊19的寬度35為250 /zm。 此外，如圖3(a)所示，可將探針墊19的形狀形成長方形， 將各探針墊19之長邊平行於各探針墊19沿著體型晶片區域 17之各邊的方式來配置。藉此，抑制體型晶片區域丨7的尺 寸變大，且朝向探測時探針滑動（摩擦）方向（亦即平行於各 探針塾19沿著體型晶片區域17之各邊的方向）之探針墊19的 形狀變長。因此可使檢查更為確實。 再者，探針墊19的數量變少時，如圖3(b)、圖4(a)、圖 4(b)及圖5(a)所示，即使不全部使用體型晶片區域17的四邊 仍可配置必要的探針塾19。圖3(b)、圖4(a)、圖4(b)及圖 5(a)所示之體型晶片區域17均具有與圖3(勾所示之體型晶片 區域17大致相同的構造，僅探針墊19的數量及設有探針塾 19之切斷區域17b的位置不同。具體而言，圖3(b)_示設有 探針墊19之切斷區域17b位於體型晶片區域17之三邊。此外 ，圖4(a)及圖4(b)顯示切斷區域17b位於體型晶片區域17的 兩邊。圖5(a)顯示切斷區域17b位於體型晶片區域π的一邊。 如圖5(a)所示的例中，假設體型晶片區域π之尺寸為5 -13- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐)
裝 訂 558772
mm χ 4 · 15 mm ’探針塾19的間距為9〇/zm時，可將寬度35為 80/z m之約50個探針墊19全部配置於位於體型晶片區域丨了之 一邊的切斷區域17b上。 因而，藉由減少探針墊19的數量，以第二分離線2〇切斷 ’自半導體晶片區域17a獲得半導體晶片17c時被除去之切 斷區域17b的面積縮小。因此，可增加自一片半導體晶圓工5 獲得之半導體晶片17C的數量，亦可減少半導體晶片17c的 製造成本。 此外’本實施形態如以上所述地可使探針墊19之尺寸遠 大於電極墊18的尺寸。由於探針墊19被切斷除去，因此無 須考慮探針墊19的靜電電容及電感。另外，先前之半導體 晶片2a由於電極墊4兼探針墊使用，因此縮小電極墊4的尺 寸困難。因此，本實施形態之因半導體晶片17c之電極墊以 引起的靜電電容及電感格外小於先前半導體晶片2a因電極 墊4引起之靜電電容及電感。如假設先前之半導體晶片以之 各電極墊4的尺寸為75/zm角，本實施形態之半導體晶片nc 之各電極墊18的尺寸為I5vm角時，電極墊的面積縮小成 1/25，整個半導體晶片區域因電極墊引起之靜電電容亦減 少O.lpF以上。 此外本貫施开）悲在半導體晶片區域17a的内部設有b 1ST 等用的檢查電路（無圖式）。因而數個電極墊18僅用於連接， 不執行探測。可將此種僅用於連接之電極墊18配置於儘量 縮短距積體電路之距離的位置上。藉此，可縮短連接電極 墊與積體電路的配線，亦可減少該配線引起之靜電電容及 • 14-
558772 A7 ____Β7 五、發明説明（12 ) 電感。先前之半導體晶片2a具備連接設於半導體晶片以端 部之電極墊4與積體電路的配線。具體而言，與先前之半導 體晶片2a比較，本實施形態之半導體晶片17c的靜電電容， 每1 mm配線長減少〇.ΐρρ以上。 因而’採用本實施形態可獲得靜電電容及電感之影響非 常小的半導體晶片。 此外’本實施形態可在切斷區域17b内設置保護電路3 6， 其係用於保護積體電路，避免探測時自體型晶片區域丨7之 外部進入的電湧。如圖5(b)所示，在探針塾19的橫向配置保 護電路36。藉此，可進一步縮小以第二分離線2〇分離半導 體晶片區域17a時之半導體晶片17c的尺寸。此外，由於保 護電路36亦被切斷除去，因此可忽略保護電路36之靜電電 容及電感。 另外’倒裝片接合用之電極墊係使用突起電極（凸塊）連接 ，因此可使電極墊18小於一邊為70//m之正方形。此外，倒 裝片接合向電極墊之正下方施加的機械性壓力亦小，因此 亦可在電極墊1 8的正下方配置配線及擴散層。因而採用本 貫W形恶’可力求縮小設計電極塾1 8、突起電極及配線之 靜電電容及電感。 如以上所述，採用本實施形態，藉由將半導體晶圓15之 體型晶片區域17的構造形成分別設置探針墊19與電極墊18 ，探針墊被切斷除去的構造，可消除許多對形成於體型晶 片區域上之探針墊及電極墊之數量、尺寸、間距等之配線 設計上的限制。此外，亦可消除許多對連接於各電極墊之 -15- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐） 558772 A7
配線及電極墊之配置等配線設計上的限制。 其次，參照圖6說明使用自上述半導體晶圓獲得之半導體 晶片所獲得之本實施形態的半導體裝置。圖6(3)係顯示製造 本實施形態之半導體裝置時，將自半導體晶圓15分離之半 導體晶片17c搭載於另一個半導體晶片22上的狀態圖，圖 6(b)係本貫施形態之半導體裝置的剖面圖。 如圖6(a)所示，本實施形態之半導體裝置1〇〇，被第二分 離線20切斷而分離之半導體晶片i7cW面朝下的狀態搭載於 半導體晶片22上。 ' 如圖6(a)及（b)所示，半導體晶片22具備：形成於其上面 之内部電極塾26及外部電極墊24 ;及連接於内部電極塾26 及外部電極墊24之内部電路（無圖式）。内部電極墊26上形成 有突起電極23。此處，於半導體晶片17c之電極墊18上面上 亦形成有突起電極25。本實施形態之半導體裝置1〇〇在突起 電極23與突起電極25連接的狀態下，藉由倒裝片接合來接 合半導體晶片22及半導體晶片17c。 本實施形態，形成於半導體晶片17c之電極墊1 8上面上之 犬起電極2 5係以錫-銀合金形成。錫-銀合金的組成，其銀對 錫的含量為3.5%，錫-銀合金的厚度約為30// m。錫-銀合金 亦可進一步含銅、鉍。此外，亦可使用錫-鉛合金、錫、銦 來取代錫-銀合金，以形成突起電極25。 此外，本實施形態基於提高半導體晶片17c之電極墊18與 突起電極25之密合性及防止金屬擴散的目的，在電極墊18 上形成有隔離不足金屬層（無圖式）。隔離不足金屬層係由自 16- 558772
電極墊18起依序按照鈦、銅、鎳、錫-銀合金的順序所堆疊 的疊層膜而形成。 此外，本實施形態之突起電極23係以鎳膜形成，不過亦 可以錫銀合金、錫-鉛合金、錫、銦、金或銅之任何一種形 成。本實施形態之鎳膜的厚度約為8//m，不過基於防止氧 化的目的，亦可在鎳膜的表面形成約〇〇5/zm的金箔。 如圖6(b)所示，在半導體晶片22與半導體晶片17c之間充 填有絕緣性樹脂27。此處，絕緣性樹脂27的材料，本實施 形態係採用環氧系熱硬化型樹脂，其室溫下之黏度為 〇·3〜lOPa· s。基於確保硬化後之絕緣性樹脂”特性的目的 ，亦可在絕緣性樹脂27的材料内添加球形填料。此外，絕 緣性樹脂2 7的材料亦可採用如丙稀系、盼酸系樹脂。 半導體晶片22固定於引導框架的晶片焊墊28上。此外， 半導體晶片22之外部電極墊24與引導框架之内部引線29藉 由金屬細線30電性連接。半導體晶片22、半導體晶片i 7c、 晶片焊墊28、内部引線29、及金屬細線30藉由封裝樹脂3 j 封裝。
如以上所述，本實施形態之自半導體晶圓15獲得之半導 體晶片17c的晶片尺寸小於先前之半導體晶片2a。因此，本 實施形態之半導體裝置100可縮小半導體晶片22的尺寸。亦 即採用本實施形態可獲得比先前之半導體裝置2〇〇小型的半 導體裝置。 此外，本實施形態藉由使用圖3(a)至圖5(b)所示之任何一 種半導體晶片17c可減少半導體裝置的製造成本。 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐） -17- 558772
再者，採用本實施形態可獲得半導體晶片17c之靜電電容 及電感之影響非常小的半導體裝置。 其次，說明體型晶片區域17之探針墊丨9、電極墊丨8及各 配線層的構造。圖7及圖8係顯示體型晶片區域17之探針墊 19電極墊18及各配線層之構造的部分剖面圖。 如圖7(a)所示，本實施形態之體型晶片區域17具備：具有 形成於上面上之擴散層39的基板54 ;及形成於基板54上的 、”邑緣膜5 1，52及53。連接設置成露出於絕緣膜53之開口部 53a内之探針墊19與電極墊18(突起電極25)之配線21，通過 形成於絕緣膜52上之通孔38，連接於配線44，該配線44連 接於在基板54上所形成之擴散層39。 此外，如圖7(b)所示，亦可藉由絕緣膜52及53分離連接探 針墊19與電極墊18(突起電極25)的配線21 ,以自位於第二分 離線20正下方之多晶石夕所形成的配線41連接。藉此，可抑 制被刀片切斷後發生改變，可防止電性短路。 再者’如圖7(c)所示，亦可將連接電極墊丨8(突起電極25) 與擴散層39之配線42形成於連接探針塾19與電極塾1 8之配 線43更下層的配線層。藉此，與上述圖7(a)及圖7(b)比較， 可縮短自積體電路至電極墊18的配線長。因此可減少配線 電容。 此外，如圖8所示，亦可採用在探針墊丨9之正下方形成擴 散層3V，經由插塞38'直接連接探針墊19與擴散層39,的配線 構造。 其次，參照圖9及圖10說明本發明之半導體裝置的製造方 -18- 本紙張尺度適用中國國家標準(CNS) Α4規格(210Χ297公釐） 558772 五、發明説明（16 ) 法。圖9及圖1〇係顯示本實施形態之半導體裝置之製造方法 之各步驟的剖面圖。 百先，於圖9(a)所示的步驟中，準備具有被第一分離線16 分割之數個體型晶片區域17的半導體晶圓15。在體型晶片 區域17上形成有積體電路（無圖式）、電極墊18、與探針墊 數個彳木針墊19經由橫切第二分離線2〇的配線2丨，與電極 塾18連接。繼續，藉由使探針44接觸於半導體晶圓15上面 上的探針墊19，執行各體型晶片區域17的檢查。 其次，於圖9(b)所示的步驟中，在形成於半導體晶圓㈠之 數個體型晶片區域17上面上之電極塾18上形成突起電極25 。此處係以熔融金屬材料之錫·銀合金形成突起電極乃。錫-銀合金之組成為銀對錫的含量為3·5%,錫-銀合金的厚度約 3〇#m。包含錫_銀合金之突起電極25的形成方法如電解鍍 f無電解鑛法、印刷法、浸潰法及間柱凸塊法等。基於 提同電極墊18與突起電極25之密合性及防止金屬擴散的目 的，在電極塾1 8上形成按照鈦、銅、錄、錫_銀合金的順序 所堆疊的疊層膜，作為隔離不足金屬層（無圖式卜另外， 錫·銀合金亦可進一步含銅、鉍。此外，亦可使用錫_鉛合金 、錫、銦取代錫-銀合金，以形成突起電極25。 其次，於圖9(c)所示的步驟中，在半導體晶圓15的下面上 貼附切割膠帶45後，藉由旋轉刀片沿著第二分離線2〇加以 切斷’藉由分離形成有探針墊丨9之切斷區域丨7b ;及形成有 電極墊18及積體電路（無圖式）之半導體晶片區域i7a，以形 成半導體晶片17c。 558772 A7 B7 五、發明説明（17 ) 其-人，於圖9(d)所示的步驟中，拾取半導體晶片i7c。 其次，於圖10(a)所示的步驟中，準備半導體晶圓（無圖式） ，其係具有構成被分離線（無圖式）分割，而分離之半導體晶 片22的數個體型晶片區域22a。此處，為求簡化代表性地顯 示體型晶片區域22a。在各體型晶片區域22a上形成有形成 於上面上之内部電極墊26及外部電極墊24 ;及連接於内部 電極墊26及外部電極墊24之内部電路（無圖式）。繼續，在各 體型晶片區域22a之上面上的内部電極墊26上形成突起電極 23。本實施形態係使用鎳膜形成突起電極23。此時鎳膜之 厚度約為8"m，基於防止氧化的目的，亦可在鎳表面以 〇.〇5//m的厚度形成金。包含鎳及金之突起電極25的形成方 法，如使用電解鍍法、無電解鍍法、印刷法、浸潰法及間 柱凸塊法等。此外，形成突起電極23之熔融金屬材料，除 鎳之外，亦可使用錫-銀合金、錫_鉛合金、錫、銦、金或銅 的任何一種。 其次，於圖io(b)所示的步驟中，在體型晶片區域22a的上 面上塗敷絕緣性樹脂27。本實施形態之絕緣性樹脂27的材 料係塗敷環氧系熱硬化型樹脂。絕緣性樹脂27的材料宜使 用在室溫下黏度為〇·3〜l〇Pa · s者。另外，基於確保硬化後 之絶緣性树脂2 7之特性的目的，亦可在絕緣性樹脂2 7的材 料中添加球形填料。此外，絕緣性樹脂27的材料亦可為丙 稀系、紛酸系樹脂，亦可使用熱硬化性樹脂、熱可塑性樹 月曰、兩液混合之常溫硬化性樹脂、UV硬化性樹脂與熱硬化 性樹脂之併用的任何一種。本實施形態之絕緣性樹脂27的 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公爱） 裝 訂 -20- 558772
供給方法係使用分配器裝置，自注射器46在體型晶片區域 22a之突起電極23上滴下絕緣性樹脂27。亦可依據體型晶片 區域22a之形狀及大小分成數次滴下。絕緣性樹脂27之其他 供給方法，亦可採用轉印法及印刷法。 其次，在圖10(c)所示的步驟中，以體型晶片區域22a之突 起電極23之溶點溫度與半導體晶片17c之突起電極之溶點 /jhl度中較低之炫點溫度以上的溫度加熱，將半導體晶片17c 擠壓在體型晶片區域22a上。藉此，產生熔融之突起電極23 或25的機械性變形，突起電極23或25之表面氧化膜破損， It由金屬擴散谷易接合突起電極25與突起電極23。 本實施形態係使用脈衝加熱工具47在221〜3〇(rc的溫度下 加熱及擠壓1〜3秒。體型晶片區域22a之突起電極23以錫·鉛 合金形成時，宜藉由脈衝加熱工具47在183〜25〇。(：溫度下加 熱及擠壓，將半導體晶片17c接合於體型晶片區域22a上。 體型晶片區域22a之突起電極23以錫形成時，宜藉由脈衝加 熱工具47在290〜400°C溫度下加熱及擠壓，將半導體晶片 17c接合於體型晶片區域22&上。體型晶片區域22&之突起電 極23以銦形成時，宜藉由脈衝加熱工具47在190〜250°C溫度 下加熱及擠壓’將半導體晶片17c接合於體型晶片區域22a 上。 繼續’解除脈衝加熱工具47之加熱及擠壓後，以熱硬化 爐將絕緣性樹脂27予以熱硬化。之後，將切割膠帶貼附在 半導體晶圓下面上後，藉由旋轉刀片沿著第二分離線2〇加 以切斷’藉由分別分離體型晶片區域22a，形成接合有半導 -21 - 本紙張尺度適财関家標準(CNS) 規格(21()χ297公以----— 558772 19 五、發明説明（ 體晶片17c的半導體晶片22。 其次，如® 10(d)所示，藉由金屬細線3〇連接 22之外部電極墊24與引導框架之内部引線29後 = :旨31封裝半導體晶片17c'半導體晶片22、晶片物:裝： 引線29及金屬細線30。，繼續’藉由形成自封裝樹脂η突 出之引導框架的外部引線，獲得半導體裝置100。 另外’本實施形態於_⑷所示的步驟中，係分別分離 體型晶片區域22a，不過並不限定於此。例如，亦可於圖 10(a)所示的步驟中，藉由分別分離體型晶片區域22&，μ 半，體晶片22後，同樣地執行圖1〇(b)以後的步驟。 猎由將本實施形態所獲得之半導體晶片17c與半導體晶片 2/之C0C型之半導體裝⑻搭載於引導框架、、印刷電^板 等上，亦可形成半導體封裝體。 訂 另外，本實施形態之半導體晶片17c與半導體晶片22之組 合，如包含DRAM等記憶體之半導體晶片與包含微電腦等 邏輯電路之半導體晶片的組合，包含彼此不同之邏輯電路 之各半導體晶片的組合，或是使用化合物半導體基板製成 之半導體晶片與使用矽基板製成之半導體晶片的組合等。 此外，亦可為藉由彼此不同製程所形成之各半導體晶片， 或是分割藉由一個製程而製成之大面積的一個半導體晶片 成兩個，作為兩個半導體晶片而組合者。 發明之功效 採用本發明可提供小型且高性能的半導體裝置。 圖式之簡單說明 本紙張尺度a a家鮮(CNS) Α·^(2ι()χ297公爱） -22- 558772 A7
圖⑷係顯示形成有數個半導體晶片之半導體晶圓的模式 回’圖Ub)係放大顯示圖1(a)之半導體晶圓上面的平面圖。 圖2係顯示本發明之半導體晶片的平面圖。 圖3⑷(b)係顯示本發明之半導體晶片另外例的平面圖。 圖4(a)(b)係顯示本發明之半導體晶片另外例的平面圖。 圖5(a)(b)係顯示本發明之半導體晶片另外例的平面圖。 圖6(a)(b)係顯示本發明之半導體裝置的構造圖。 ·； 裝 圖7(a)〜(c)係顯示半導體晶片之探針塾、電極塾及各配線 層之構造的部分剖面圖。 圖8係顯不半導體晶片之探針墊、電極墊及各配線層之構 造的部分剖面圖。 圖9(a)〜(d)係顯示本發明之半導體裝置之製造方法之各步 驟的剖面圖。 圖10(a)〜(d)係顯示本發明之半導體裝置之製造方法之各 步驟的剖面圖。 圖11(a)係顯示形成有數個半導體晶片之半導體晶圓的模 式圖，圖11(b)係放大顯示圖11(a)之半導體晶圓上面的平面 圖。 圖12(a)(b)係顯示先前之半導體裝置的構造圖。 元件符號之說明 1, 15 2, 17a 2a，17c，22 半導體晶圓 半導體晶片區域 半導體晶片 -23 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 558772 A7 B7 五、發明説明（21 ) 3 分離線 - 4, 18 電極墊 5 半導體晶片 6 突起電極 7 外部電極墊 9 突起電極 10 絕緣性樹脂 11 晶片焊墊 12 内部引線 13 金屬細線 14 封裝樹脂 16 第一分離線 17, 22a 體型晶片區域 17b 切斷區域 19 探針墊 20 第二分離線 21 配線 23, 25 突起電極 24 外部電極墊 26 内部電極墊 27 絕緣性樹脂 28 晶片焊墊 29 内部引線 30 金屬細線 -24- 本紙張尺度適用中國國家標準(CNS) A4規格(210 x 297公釐） 558772 A7 B7 五、發明説明（22 ) 31 封裝樹脂 32, 33 間距 34, 35 寬度 36 保護電路 37 突起電極 38 通孔 38， 插塞 39, 39， 擴散層 41 配線 42 配線層 43 配線層 44 探針 45 切割膠帶 46 注射器 47 脈衝加熱工具 51， 52, 53 絕緣膜 53a 開口部 54 基板 100, 200 半導體裝置 -25- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐）

Claims (1)

  1. 六、申請專利範圍 1· -種半導體晶11，其具備：數個半導體晶片區域，其係 分別構成半導體晶片；及切斷區域，其係將上述數個半 導體晶片區域分離成各個半導體晶片； 上述數個半導體晶片區域上設有積體電路與連接於上 述積體電路的電極藝， 上述切斷區域上設有連接於上述電極墊的探針墊。 2 ·如申請專利範圍第1項之半導體晶圓， 其中形成於上述各個半導體晶片區域之上述電極墊的 數2：多於連接於上述電極墊之上述探針墊的數量。 3 ·如申請專利範圍第1項之半導體晶圓， 其中形成於上述各個半導體晶片區域之上述電極墊的 間距小於連接於上述電極墊之上述探針墊的間距。 4·如申請專利範圍第1項之半導體晶圓， 其中形成於上述各個半導體晶片區域之上述電極墊的 尺寸小於連接於上述電極墊之上述探針墊的尺寸。 5·如申請專利範圍第1項之半導體晶圓， 其中連接於上述電極墊之上述探針墊係沿著上述半導 體晶片區域的一邊、兩邊或三邊形成。 6·如申請專利範圍第1項之半導體晶圓， 其中上述切斷區域上設有上述探針塾的保護電路。 7·如申請專利範圍第1項之半導體晶圓， 其中連接於形成於上述各個半導體晶片區域之上述電 極墊的配線，係使用連接於上述探針墊之配線更下層的 配線層而形成。 -26- 本紙張尺歧财g g家標準(CNS) A4規格(210X297公笼) 、申請專利範圍 & 一種半導體裝置，其特徵係具備：第—半導體 係具有：第一積體電路；連 片，其 電極塾；及形成於上述第-電極塾上的第一突起電： ，及第二半導體晶片，其係且古·贫— (電極 於上述第二積體電路之第-電墊積體電路；連接 電極塾上的第二突起電】Γ ，及嫩上述第二 於上述第一半導體晶片的側端面，連接於上述第 極墊之檢查用配線的剖面露出，連接於上这弟-電 9. 土述第一突起電極與上述第二突起電極電性連接。 σ申凊專利範圍第8項之半導體裝置， 其中上述第-半導體晶片上未設置探針塾。 ίο·如申請專利範圍第8項之半導體裝置， ，中上述第二半導體晶片的周邊部上形成有與外部電 路連接用的外部電極墊。 Π·如申請專利範圍第8項之半導體裝置， 其中在上述第一半導體晶片與上述第二半導體晶片之 間介有絕緣性樹脂。 12·如申請專利範圍第8項之半導體裝置， 其中上述第一半導體晶片與上述第二半導體晶片係藉 由封裝樹脂封裝。 13 一：t導體裝置之製造方法，其具備：分別構成第-半 導曰日片之數個第一半導體晶片區域·，及將上述數個第 一半導體晶片區域分別分離成第一半導體晶片帛的切斷 區域； -27- 558772
    -BCD 並包含：第一半導體晶圓準備步驟⑷，其係上述數個 第—半導體晶片區域上設有第—積體電路及連接於上述 第-積體電路之第-電極墊，上述切斷區域上設有連接 於上述第一電極墊的探針墊； 上述數個第一半導體晶片的檢查步驟⑻，其係使探針 接觸於上述探針墊來實施檢查； 第一突起電極形成步驟（c)，其係形成於上述第一電極 墊上； 數個第一半導體晶片形成步驟（句，其係藉由除去上述 第一半導體晶圓之上述切斷區域，自上述數個第一半導 體晶片區域形成； 第一半導體晶圓準備步驟（e)，其係具有··第二積體電 路；及連接於上述第二積體電路之第二電極墊；並具備 分別構成第二半導體晶片的數個第二半導體晶片區域； 第二突起電極形成步驟⑴，其係形成於上述數個第二 半導體晶片區域上所形成的上述第二電極墊上； 電性連接步驟（g)，其係藉由加熱及擠壓電性連接上述 第一突起電極與上述第二突起電極；及 切斷步驟（h)，其係將上述第二半導體晶圓切斷成上述 數個第二半導體晶片區域。 14·如申請專利範圍第13項之半導體裝置之製造方法， 其中上述步驟（g)係在上述第一半導體晶片與上述第二 半導體晶片之間供給絕緣性樹脂。 15·如申請專利範圍第13項之半導體裝置之製造方法， -28 本紙張尺度適用中國國家標準(CNS) A4規格(21〇χ 297公釐) 558772 六、 16. A8 B8 C8 D8 申請專利範圍 其中上述步驟（C)及上述步驟（f)係藉由電解鍍法、無電 解鍍法、印刷法、浸潰法或間柱凸塊法等任何一種方法 形成上述第一突起電極及上述第二突起電極。 如申請專利範圍第13項之半導體裝置之製造方法， 其中上述步驟（c)係採用含錫及銀之合金、含錫及鉛之 合金、錫、鎳、銅、銦及金中之任何一種形成上述第一 突起電極。
    -29- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)
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