TW525252B - Connecting material for anisotropically electroconductive connection - Google Patents

Connecting material for anisotropically electroconductive connection Download PDF

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Publication number
TW525252B
TW525252B TW089121104A TW89121104A TW525252B TW 525252 B TW525252 B TW 525252B TW 089121104 A TW089121104 A TW 089121104A TW 89121104 A TW89121104 A TW 89121104A TW 525252 B TW525252 B TW 525252B
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TW
Taiwan
Prior art keywords
particles
resin
electrode
electrodes
conductive particles
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Application number
TW089121104A
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English (en)
Inventor
Yasuhiro Suga
Motohide Takeichi
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Sony Chemicals Corp
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Publication of TW525252B publication Critical patent/TW525252B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J9/00—Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
    • C09J9/02—Electrically-conducting adhesives
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Non-Insulated Conductors (AREA)

Description

525252 A7 -------B7_ 五、發明說明（/ ) 〔發明所屬之技術領域〕 本發明有關於各向異性導電連接材料，用來連接在比 鈍化膜低之位置具有電極之半導體元件和電路基板。 (請先閱讀背面之注意事項再填寫本頁) 〔習知之技術〕 在將半導體組裝到電路基板之技術中，所使用之方法 是利用各向異性導電連接材料（以下亦稱爲ACF )，將如 同裸晶片之半導體元件機械連接和電連接到基板。在此種 方法中，使半導體元件和電路基板之電極互相面對，在其 間介入ACF，利用熱壓著使兩者機構式的固定，和使面 對之電極之間產生電連接，鄰接之電極之間保持絕緣狀 態。適於使用此種方法之半導體元件具備有由被稱爲突 塊（bump)之突起形成之電極作爲其電極，基板側之電極 亦形成突起狀作爲導體圖型。因此習知技術一般是進行 突起電極之間之連接。 但是隨著電極之間距之變狹，突塊之形成變爲困難， 因此提案有將半導體元件（所具有之電極未形成有突塊 ，亦即突起物）直接連接到基板之方法。此種未具有突 塊之半導體元件因爲在比鈍化膜低之位置具有電極，所 以需要有與習知技術不同之連接材料。 經濟部智慧財產局員工消費合作社印製 作爲此種連接材料者，在日本國專利案特開平4 - 30542 號揭示有各向異性導電連接材料，包含有硬度比電極之 硬度大，但比鈍化膜之硬度小之導電性粒子，此種導電性 粒子使用鎳粒子。但是只限於使用硬度比鎳大之鈍化膜， 不能使用由如同聚醯亞胺樹脂之樹脂構成之鈍化膜。 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 525252 A7 B7 五、發明說明（> ) 〔發明之槪要〕 本發明之目的是提供各向異性導電連接材料，對於具 有樹脂製之鈍化膜和在比該膜低之位置具有電極之半導 體元件，即使在使其與電路基板連接之情況時，亦不會 使鈍化膜受傷，可以機械式固定，可以獲得面對之電極 % 間之電連接，和可以保持鄰接之電極間之絕緣。 本發明是下面所述之各向異性導電連接材料。 (1 ) 一種各向異性導電連接材料，其連接材料用來連 接：半導體元件，在比鈍化膜低之位置具有電極；和電 路基板，具有與該電極對應之電極；其中 包含有絕緣性之接著劑和導電性粒子； 該導電性粒子是以金屬層被覆高分子核材粒子之表面 所形成之粒子； 導電性粒子之平均粒徑是鈍化膜之高度和半導體元件之 電極之高度之差之1.5倍以上。 (2)和（1)項之各向異性導電連接材料，其中導電性粒 子之平均粒徑是鄰接之電極間之間隔之0 . 5倍以下。 (3 )如（1 )或（2 )項之各向異性導電連接材料，其中導 電性粒子是在被覆高分子核材粒子之金屬層之表面，更 以絕緣性樹脂被覆所形成者。 (4 )如（1 )至（3 )項之各向異性導電連接材料，其中導 電性粒子之硬度（k値）爲500〜1 0000N/mm2。 (5 )如（1 )至（4 )項之各向異性導電連接材料，其中導 電性粒子中之金屬層之Mohs硬度爲1〜6。 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) ---------訂---------線 經濟部智慧財產局員工消費合作社印製 經濟部智慧財產局員工消費合作社印製 525252 A7 —------_B7_ 五、發明說明（4 ) 〔圖式之簡單說明〕 第1圖是模式方式剖面圖，用來表示實施例之連接體 之連接狀態。 第2圖之圖形表示導電粒子之壓縮變位移和負載之關 係。 弟3圖之圖形表不導電粒子之壓縮應變和k値之關係。 〔發明之詳細說明〕 成爲本發明之各向異性導電連接材料之連接對象之被 連接構件之一方是半導體元件，在半導體元件上之比鈍 化膜低之位置具有電極。此種半導體元件之實例有被稱 爲無突塊1C之在電極未具有突塊等之突起物之半導體元 件。此種半導體元件在電極之周圍具有鈍化膜，電極比 該鈍化膜低。作爲鈍化膜者可以使用聚醯亞胺樹脂，聚 苯并環丁烯，聚四氟乙烯（鐵氟龍）等之樹脂。作爲電極 者可以使用銘’銅等。在銘之情況於表面形成氧化膜。 此種半導體元件之實例有被稱爲裸晶片之裸露之半導體 晶片，此種裸晶片以面向下之形式連接在電路基板。 連接此種半導體元件之另外一方之被連接體是電路基 板，在與該半導體元件之電極對應之位置具有電極，來 自該電極之電路圖型形成沿著基板之其他部份延伸。電 路基板可以使用環氧樹脂/玻璃基板等之樹脂基板，玻 璃基板，由聚醯亞胺樹脂等構成之軟性樹脂基板等。電 極可以使用銅，銀，鋁等之一般之導體。 用以連接此種被連接構件之半導體元件和電路基板之 各向異性導電材料包含具有熱硬化性樹脂之絕緣性接著 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 525252 A7 B7 五、發明說明（4 ) 劑和導電性粒子。該連接材料存在於被連接構件之間， 從兩側相對的加壓，用來按壓電極使其與導電性粒子接 觸，將樹脂集中在未存在有電極之部份，在該部份以導 電性粒子被分散之狀態產生硬化和進行連接，可以獲得 被連接構件間之機械固定和面對之電極間之電連接，和 可以保持鄰之電極之間之絕緣性。 本發明之連接材料之絕緣性接著劑成分所使用之熱硬 化性樹脂之主劑樹脂可以使用環氧樹脂，尿烷樹脂，酚 醛樹脂，含有氫氧基之聚酯樹脂，含有氫氧基之丙烯酸 樹脂，只要倂用硬化劑在加熱下或以UV等之光之照射下 可以硬化之樹脂均可使用，並沒有特別之限制，但是從 硬化溫度，時間，保持穩定性等之平衡來看，最好使用 環氧樹脂。該環氧樹脂可以使用雙酚醛型環氧樹脂，環 氧漆用酚醛樹脂，或在分子內具有2個以上之環氧乙烷 基之環氧化合物等。除此之外亦可以使用游離基聚合型 之樹脂。該等樹脂爲市售販賣品，可以直接使用。 上述之熱硬化性樹脂之主劑樹脂一般可以倂用硬化劑 用來進行硬化反應，但是在主劑樹脂結合具有硬化反應 功能之基之情況時，硬化劑可以省略。硬化劑可以使用 咪唑，胺，氧無水物，醯胼，脒基脲，和該等之變性物 等，可以使用經由加熱，光照射等能夠進行與主劑樹脂 反應之硬化性反應者，可以使用市售販賣品◊此種硬化 劑最好使用潛在性硬化劑。 潛在性硬化劑在常溫製造，保存，和以較低溫（40〜 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 525252 經濟部智慧財產局員工消費合作社印製 A7 ___B7___ 發明說明（r) 8〇°C)乾燥時不會進行硬化反應，經由以硬化溫度加熱 加壓（熱壓著）或以UV等之光照射，可以進行硬化反應 。此種潛在性硬化劑最好是使咪唑，胺等之上述之硬化 劑成分微粒化，市售販賣品可以直接使用。在熱活性之 情況，硬化開始溫度最好爲80〜150°C。 在本發明中，爲著使連接材料具有塗布性或膜形成性 ’可以將熱可塑性高分子材料調配在接著劑成分。此種 熱可塑性高分子材料可以使用苯氧樹脂，聚酯樹脂，丙 烯酸樹脂，NBR，SBR等。 另外，在本發明之接著劑成分亦可以調配界面活性劑， 耦合劑，老化防止劑等之添加劑。 調配在接著劑成分中之該等成分之調配比例是熱可塑 性高分子材料對熱硬化性樹脂爲0〜40重量％，較好爲1 〜30重量％，其他之添加劑對樹脂成分之合計量爲〇〜1〇 重量％，較好爲1〜5重量％。 調配在上述之接著劑成分和連接材料之導電性粒子是 利用電鍍等將導電材料覆蓋在高分子核材粒子所形成之 導電被覆粒子，亦可以使用以絕緣性樹脂覆蓋在該等導 電性粒子所形成之絕緣被覆導電粒子。此種導電性粒子 對接著劑成分之比例可以調配成爲2〜40容量％，較好 爲5〜25容量％。 構成該導電被覆粒子之高分子核材粒子可以使用環氧 樹脂，苯乙烯樹脂，矽樹脂，丙烯酸樹脂，丙烯酸/苯 乙烯樹脂（丙烯酸和苯乙烯之共聚體），聚烯烴樹脂，三 本纸張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -----------裝--------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 525252 A7 B7 1、發明說明（) (請先閱讀背面之注意事項再填寫本頁) 聚氰胺樹脂或苯胺樹脂等之合成樹脂，二乙烯苯交聯體 ;NBR或SBR等之合成樹膠；由該等之混合物等所構成之 粒子。在該等之中最好使用苯乙烯樹脂，丙烯酸樹脂， 丙烯酸/苯乙烯樹脂，苯胺樹脂，二乙烯苯交聯體。高 分子核材粒子之硬度或彈性等沒有特別之限制，可以選 擇具有所希望之硬度或彈性者。 用以被覆該高分子核材粒子之金屬層可以使用鎳，金 ，銅，銀等之金屬之1種或2種以上，最好使用鎳。該等 之金屬最好經由無電解或電解電鑛，以膜狀覆蓋在高分 子核材粒子表面。金屬層之膜厚爲5〜300nm，較好爲1〇 〜200nm。特別是最好對底層施加鍍鎳，在其上施加鑛 金，在此種情況，最好使鍍鎳之底層之膜厚爲10〜 300nm，較好爲30〜200nm，鍍金之膜厚爲5〜100nm，較 好爲1 0〜30ηηι。 以絕緣性樹脂被覆該導電被覆粒子時之絕緣性樹脂， 不溶於或難溶於該絕緣性接著劑，只要能夠經由熱壓著 使被覆熔融或被破壞而具有導電性之絕緣性樹脂均可以 使用，沒有特別之限制，但是最好使用丙烯酸樹脂，苯 乙烯樹脂或丙烯酸/苯乙烯樹脂。 經濟部智慧財產局員工消費合作社印制衣 絕緣性樹脂最好以膜狀絕緣被覆在導電被覆分子之表 面，特別是最好以丙烯酸樹脂交聯膜，苯乙烯樹脂交聯 膜或丙烯酸/苯乙烯樹脂交聯膜進行絕緣被覆。 絕緣性樹脂之膜厚爲0.05〜2i/ro，最好爲0.1〜 0.5 // m 〇 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 525252 A7B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（7 ) 在本發明中此種導電性粒子之平均粒徑（d)爲鈍化膜 之高度和半導體元件之電極之高度之差（h)之1.5倍以上 ，最好使用1.5〜5倍者。本發明所使用之導電性粒子因 爲以金屬層被覆高分子核材粒子之表面，所以具有彈性 ，在對電極間加壓時就被壓縮。因此，即使使用平均粒 徑比鈍化膜和電極之高$差（h)稍大之導電性粒子時， 亦不能獲得充分之電連接，但是經由使用具有平均粒徑 爲該差（h)之1.5倍以上之導電性粒子，可以獲得充分之 電連接。 在本發明中，導電性粒子之平均粒徑（d)爲鄰接之電 極間之間隔（s)之0.5倍以下，較好爲0.01〜0.5倍。在 粒徑變大之情況時，鄰接之電極間，導電性粒子可能橫 向的接觸造成短路，經由採用上述之平均粒徑，可以防 止由於鄰接之電極間之短路所造成之絕緣不良。 在本發明中，導電性粒子之硬度（K値）爲500〜10000 N/mm2,較好爲1000〜8000N/mm2。聚醯亞胺樹脂等之樹 脂製之鈍化膜容易由於金屬粒子而受傷，但是經由採用 上述之硬度（K値）可以防止鈍化膜之受傷。 下面將說明上述之硬度（Κ値）。 依照蘭多（Undau)—列普謝茲（Lipschitz)理論物理 學教程「彈性理論」（東京圖書1972年發行）第42頁，半 徑分別爲R，R’之二個彈性球體之接觸問題具有下式之 關係。 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） I _ --------------------訂---------線· (請先閱讀背面之注意事項再填寫本頁) 525252 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（^ ) 〔數1〕 h = F2/3[D2( 1/R+ 1/Rf )]1/3 ...(1) D=(3/4) [( 1 - σ 2)/E+( 1 · σ ’2)/Ε· ] .-.(2) (在上式中，h表示R+fT和兩球之中心間距離之差，F 表示壓縮力，E，Ef表示二個彈性球之彈性率，σ，σ· 表示彈性球之卜松（Poisson)比。） 將一方之球替換成爲剛體之板，使其與另外一方之球 接觸，和從兩側進行壓縮時，成爲ΙΓ —⑺，E>>E ’，可 以近似的獲得下式。 〔數2〕 F=(21/2/3)(S3/2)(E · R1/2)(l- 〇 2) ..,(3) (在上式中s表示壓縮變形量） 其中，利用下式用來定義k値。 〔數3〕 k=E/( 1 - (7 2) ...(4) 由式（3)和式（4)可以很容易獲得下式。 〔數4〕 k=(3/，2) · F · S-3,2 · R.1/2 ...(5) 該k値普遍的定量的表示球體之硬度。因此，利用k値 可以定量的和一個意思的表示微粒子之硬度。 k値可以以下面所述之測定方法測定。 在具有平滑表面之鋼板之上散布試料粒子，從其中選 擇1個之試料粒子◊其次，使用粉體壓縮試驗機（例如， PCT-200型，島津製作所製），利用鑽石製之直徑5〇em -ία- 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ---------------------訂---------線 d^· (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 525252 A7 B7 五、發明說明（？） 之圓柱之平滑之端面，壓縮試料粒子。這時，使壓縮負 載成爲電磁力，進行電的檢測，利用動作變換，以電檢 測壓縮位移。然後求得第2圖所示之壓縮位移一負載之 關係。從第2圖分別求得測料粒子之1 0%壓縮應變形時 之負載値和壓縮位移，利用該等之値和式（5 )求得第3圖 所示之k値和壓縮應變之關係。其中，以試粒子之粒子直 徑除壓縮變位移，所獲得之値以％表示壓縮應變。測定之 條件如下所述。 壓縮速度：以定負載速度壓縮方式，每秒2.7mN之比 例增加。
試驗負載：最大100mN
測定溫度：20°C 另外，當使用在半導體元件之電極形成有如同鋁等之 氧化膜之絕緣性膜之電極材料時，容易由於絕緣性膜而 產生導電不良，但是當在高分子核材粒子之表面被覆具 有能夠突破此種絕緣膜之硬度之金屬層時，可以防止導 通不良。在此種情況，該金屬層用來使鈍化膜不會受傷 。因此，本發明所使用之導電性粒子中，金屬層之Mohs 硬度爲1〜6，最好使用2〜4者。 本發明之連接材料可以使用糊狀或膜狀形態之製品。 在成爲糊狀之情況時，選擇上述之各種成分可以以無溶 媒成爲糊狀，但是一般可以使各個成分溶解或分散在溶 媒藉以成爲糊狀。溶媒可以使用乙醇，酮，酯，醚，酚 醛類，聚甲醛，含有氮之碳氫溶媒，例如甲苯，MEK， -11 - 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱） --------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 525252 A7 B7 五、發明說明（p) 乙基酢酸，溶織丙酮等。溶媒之使用量是對樹脂成分爲 20〜4®重量％程度。 在成爲膜狀之情況時，可以將上述之糊塗布在剝離片 成爲膜狀，使溶媒揮發而形成。 使上述之連接材料存在於具有面對之電極之作爲被連 接構件之半導體元件和電路基板之間，在此種狀態從被 連接構件之兩側加壓和加熱，經由使樹脂硬化用來進行 連接。在連接材料爲糊狀之情況時，將連接材料塗布在 包含半導體元件和電路基板之電極之連接區域，乾燥後 或不進行乾燥使兩者重疊，進行壓著和硬化。在連接材 料爲膜狀之情況時，使連接材料存在於電路基板和半導 體元件之間，進行加壓，加熱和硬化。硬化之進行除了 加熱外亦可經由照射UV等之光。 在上述之連接工程中，當以連接材料存在於電路基板 和半導體元件間之狀態進行加熱，使連接材料之樹脂溶 解和對其加壓時，在熱硬化性樹脂進行熱硬化成爲固定 接合體之前，連接材料之樹脂從電極之互相面對部份流 到沒有電極之部份，導電粒子殘留在電極間，在電極間 進行接觸和壓著。流到沒有電極之部份之接著劑成分在 該部份進行硬化，用來固定電路基板和半導體元件。利 用此種方式進行互相面對之電極間之電連接，和基板與 半導體元件間之機械固定，鄰接之電極間保持電絕緣。 經由使用本發明之連接材料，在將比鈍化膜低之位置具 有電極之半導體元件，連接到電路基板之情況時，可以 -12 · 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 525252 A7 B7____ 1、發明說明（〃） 良好的進行機械式之固定和電連接。 以上述方式將半導體元件連接到電路基板之連接體， 因爲使用以金屬層被覆高分子核材粒子之導電性粒子， 所以即使在樹脂製之鈍化膜之情況時亦不會使其受傷， 而且可以將位於比鈍化膜低之位置之電極有效的連接到 電路基板。利用此種方式可以獲得優良之接著性和電連 接之可靠度，經過長期間亦不會發生電極間之導通不良。 依照本發明之各向異性導電連接材料時，因爲包含有 接著劑成分（含有熱硬化性樹脂）和導電性粒子（以金屬 層被覆高分子核材粒子），導電性粒子之平均粒徑爲半 導體元件之電極和鈍化膜之高度之差之1.5倍以上，所 以即使在使用樹脂製之鈍化膜之情況時，亦可以製造具 有優良之接著強度和電連接性及絕緣保持性之連接體。 另外，經由使導電性粒子之平均粒徑成爲鄰接之電極 間隙之0 · 5倍以下，可以防止由於短路造成導通不良， 經由以絕緣性樹脂被覆導電性粒子之金屬層，可以更進 一步的增大其效果。另外，經由使用特定之硬度（k値） 者作爲導電性粒子，可以防止鈍化膜之受傷。另外，使 用以具有特定之Mohs硬度之金屬層被覆之導電性粒子， 則即使在電極形成有絕緣被膜之情況時亦可以獲得良好 之電連接。 〔發明之實施例〕 下面將依照圖面用來說明本發明之實施例。 第1圖是模式方式之剖面圖，用來表示實施例之連接 • 13 - 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ------------费------- 丨訂---------線 (請先閱讀背面之注意事項再填寫本頁) 525252 經濟部智慧財產局員工消費合作社印製 A7 1^_ B7___ 五、發明說明（^ ) 體之連接中之狀態。另外，在第1圖中，爲著容易理解 ，導電性粒子8之大小比實際者大，但數目比實際者 少0 在第1圖中，符號1是電路基板，具有電極2。3是1C 晶片等之半導體元件，具有電極4和位於其周圍之聚醯亞 胺樹脂製之鈍化膜5。電極4設在比鈍化膜5低之位置， 其高度之差爲h。電極2和4設在互相面對之位置，該等 以互相面對之狀態連接成包夾膜狀之連接材料6。連接 材料6由含有熱硬化性樹脂之絕緣性之接著劑成分7和導 電性粒子8形成。當使用糊狀連接材料時，將其塗布在 電路基板1。導電性粒子8形成爲以金屬層Sb被覆高分 子核材粒子8a之表面之構造，平均粒徑d爲鈍化膜5和 電極4之高度差h之1.5倍以上，和成爲鄰接之電極4之 間隔s之0.5倍以下。 連接方法是將連接材料6裝載在電路基板1之連接區域 ，以包夾該連接材料6之方式將半導體元件3配置成使電 極互相面對，對連接材料6進行加熱，同時依箭頭X，y 方向進行加壓。利用此種方式使連接材料6之接著劑成 分7溶融，流到未存在有電極2, 4之部份之電路基板1 和半導體元件3之間之間隙，使熱硬化性樹脂硬化，利用 機械固定用來獲得連接體10。導電性粒子8被包夾在電 極2, 4間用來進行電連接，和保持鄰接之電極2, 2間或 4，4間之絕緣性。 在此種情況，因爲導電性粒子8具有在上述範圍之硬 -14- 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ------------11^--------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 525252 A7 B7 五、發明說明（u) 度（K値），所以鈍化膜5不會受傷。另外，因爲具有高度 差h之1.5倍以上之粒徑d，所以被壓縮在互相面對之電 極2, 4間保持接觸，用來進行電連接。這時，即使在電 極2或4形成有氧化膜等之絕緣被膜之情況時，亦可以利 用上述範圍之Mohs硬度，突破絕緣被膜的進行電連接。 該導電性粒子8在鄰接之電極2, 2間或4, 4間分散在接 著劑成分7中用來維持絕緣性，但是經由使粒徑d成爲電 極間隔s之0.5倍以下，可以防止由於粒子之橫方向接觸 所造成之路徑。 (實施例） 下面將說明本發明之實施例。 實施例1 使環氧樹脂（頁比克1009，油化司耶路頁伯克司（股） 公司製，商品名）50重量部份和潛在性硬化劑（Hx 3 721 ，旭達伍（股）公司製，商品名）45重量部份混合，在所 形成之熱硬化型之絕緣性接著成分中，均勻的分散導電 性粒子（日本化學工業（股）公司製，平均粒子直徑d = 5从m，硬度（K値）7490N/mm2)5重量部份，用來製作厚度 20 之各向異性導電連接材料膜，該導電性粒子是在 苯胺樹脂粒子之表面形成鍍鎳層而構成。 該膜被包夾在電極部表面之材質爲鋁（厚度l#m)之1C 晶片（外形6.3mm2，h=1.4//m，s = 100从m)和玻璃/環氧 製電路基板（電極材質銅（鍍鎳/金）電極厚度18// m)之 間，以180°C，150N，熱壓著20秒鐘。連接後之導通電 -15 - 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） .II· 丨-線 ----------------------- (請先閱讀背面之注意事項再填寫本頁) 525252 A7 B7 五、發明說明（α) 阻每1個端子爲5〜10m Ω，鄰接電極間之絕緣電阻爲 108Ω以上，可獲得良好之連接。 實施例2 在實施例1所製作之熱硬化型之絕緣性接著劑成分中 ，均勻的分散相同材質之平均粒徑不同之導電性粒子 (曰本化學工業（股）公司製，平均粒子直徑d=3/zm)5重 量部份，用來製作厚度20//m之連接材料膜，將其包夾 在與實施例1所使用之評估材料相同規格之1C晶片和電 路基板之間，以與實施例1相同之條件進行熱壓著。連 接後之導通電阻每1個端子爲5〜10m Ω，鄰接電極間之 絕緣電阻爲108Ω以上，可以獲得良好之連接。 實施例3 在實施例1所製作之熱硬化型之絕緣性接著劑成分中 ，均勻的分散相同材質之平均粒徑不同之導電性粒子（日 本化學工業（股）公司製，平均粒子直徑d = 10# m)5重 量部份，用來製作厚度20/zm之連接材料膜，將其包夾 在與實施例1所使用之評估材料相同規格之1C晶片和電 路基板之間，以與實施例1相同之條件進行熱壓著。連 接後之導通電阻每1個端子爲5〜10m Ω，鄰接電極間之 絕緣電阻爲10δΩ以上，可以獲得良好之連接。 實施例4 在實施例1所製作之熱硬化型之絕緣性接著劑成分中 ，均勻的分散相同材質之平均粒徑不同之導電性粒子 (曰本化學工業（股）公司製，平均粒子直徑d = 20//m)5 • 16- 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 if------- —訂------ ----手_------------------- 經濟部智慧財產局員工消費合作社印製 525252 Α7 Β7 五、發明說明（π ) 重量部份，用來製作厚度20//m之連接材料膜，將其包 夾在與實施例1所使用之評估材料相同規格之1C晶片和 電路基板之間，以與實施例1相同之條件進行熱壓著。 連接後之導通電阻每1個端子爲5〜1 0m Ω，鄰接電極間 之絕緣電阻爲1〇8Ω以上，可以獲得良好之連接。 實施例5 在實施例1所製作之各向異性導電連接材料，被包夾 在電極部表面爲金（厚度l//ro)之1C晶片（外形6.3mm2， h=1.4//m，s = 100"m)，和玻璃/環氧樹脂製電路基板 (電極材質爲銅（鑛鎳/金），電極厚度18/zm)之間，以 180°C，150N熱壓著20秒鐘。連接後之導通電阻每1個 端子爲3〜8ιηΩ，鄰接電極間之絕緣電阻爲108Ω以上， 可以獲得良好之連接。 比較例1 在實施例1所製作之熱硬化型之絕緣性接著劑成分中 ，均勻的分散無定形鎳粒子 < 英克公司製，粒子直徑 5#m以下，硬度（Κ値）40000N/mm2)5重量部份，用來製 作厚度20 之膜，將其包夾在與實施例1所使用之評估 材料相同規格之1C晶片和電路基板之間，以與實施例1 相同之條件進行熱壓著，鎳粒子突破鈍化膜，破壞1C晶 片之電路發生斷線不良。這時之連接電阻爲5-ΐΟΟΘ αιΩ， 變化很大，而且不穩定。因此，不能獲得良好之連接。 比較例2 在實施例1所製作之熱硬化型之絕緣性接著劑成分中 •17· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ---------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 525252 A7 B7 i、發明說明（4) (請先閱讀背面之注意事項再填寫本頁) ，均勻的分散傾斜合金粒子（旭化成（股）公司製，平均 粒子直徑5/zm，硬度（K値）20000N/mm2)5重量部份，用 來製作厚度20//m之膜，將其包夾在與實施例1所使用之 評估材料相同規格之1C晶片和電路基板之間，以與實施 例1相同之條件進行熱壓著，傾斜合金粒子突破鈍化膜， 破壞1C晶片之電路發生斷線不良。這時之連接電阻在 5〜ΙΟΟΟιηΩ之間測定不到，不能測定端子之連接電阻。 因此，不能獲得良好之連接。 上述之結果是如實施例1〜5所示，成爲以金屬層被覆 高分子核材粒子之表面所形成之導電性粒子，經由使用 平均粒徑d爲鈍化膜的電極之高度差d之1.5倍以上之導 電性粒子，可以進行在比鈍化膜低之位置具有電極之1C 晶片和電路基板之良好之電連接和機械式連接，但是在使 用比較例1，2之金屬粒子時，鈍化膜會受傷，不能進行 良好之連接。 實施例6 經濟部智慧財產局員工消費合作社印製 使具有ITO(Indium Tin Oxide)電極排成1列之玻璃基 板，和具有作爲電極之突塊（50μ mx 150/z m，間距80// m ，90個接腳）排成1列之1C晶片，互相面對的包夾實施 例所製作之各向異性導電連接材料，使面對IT0電極之突 塊之位置在列方向變化，用來變化IT0電極和突塊之間 ®，對於此種群體以與實施例1相同之條件進行熱壓著藉 以獲得連接體。在這種連接體之鄰接端子之間施加20V之 電壓，依照突塊/電極間之距離檢査短路發生率。在此種 • 18· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 525252 A7
五、發明說明（^ ) 情況，絕緣電阻小於108Ω者視爲短路。其結果如表1所 表1 Wm/mmm mm ΠΓ^)- 0〜5 6〜10 11 〜15 1 6 〜20 21 〜25 短路發 生率（％) 85 Ί6 70 58 32 實施例7 將實施例6中之導電性粒子變更成爲在實施例1之導電 性粒子之表面以丙烯酸系之熱可塑性樹脂被覆，除此之 外，與實施例6同樣的進行。其結果如表2所示。 表2 突塊/電極間距離m) 0〜5 6〜10 11 〜15 16〜20 21 〜25 短路發 生率（％) 12 5 0 0 0 -------------— (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 依照實施例6〜7之結果可以明白，導電性粒子之粒徑 爲突塊/電極間距離之0 · 5倍以下，特別是在〇，2〜0.5 倍時短路之發生率很小。 符號之說明 1.....電路基板 2,4...電極 3.....1C晶片 5 .....鈍化膜 6 .....連接材料 7 .....接著劑成分 8 .....導電性粒子 -19- 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 訂---------線

Claims (1)

  1. 525252 六、申請專利範圍 第8 9 1 2 1 1 04號「各向異性導電連接材料」專利案 (91年4月25日修正） 六申請專利範圍： 1 . 一種各向異性導電連接材料，其連接材料用來連接： 半導體元件，在比鈍化膜低之位置具有電極；和電路 基板，具有與該電極對應之電極；其特徵是： 包含有絕緣性之接著劑和導電性粒子； 該導電性粒子是以金屬層被覆高分子核材粒子之表 面所形成之粒子； 導電性粒子之平均粒徑是鈍化膜之高度和半導體元 件之電極之高度之差1 . 5倍以上。 2 ·如申請專利範圍第1項之各向異性導電連接材料，其 中導電性粒子之平均粒徑是鄰接之電極間之間隔之0 : 5 倍以下。 3 ·如申請專利範圍第1項之各向異性導電連接材料，其 中導電性粒子是在被覆高分子核材粒子之金屬層之表 面，更以絕緣性樹脂被覆所形成者。 4 .如申請專利範圍第2項之各向異性導電連接材料，其 中導電性粒子是在被覆高分子核材粒子之金屬層之表 面’更以絕緣性樹脂被覆所形成者。 5 .如申請專利範圍第1至4項中任一項之各向異性導電 連接材料，其中導電性粒子之硬度（K値）爲500〜 10000N/mm2。
    525252 六、申請專利範圍 6 .如申請專利範圍第1至4項中任一項之各向異性導電 •連接材料，其中導電性粒子中之金屬層之Mohs硬度爲 1〜6 〇 7 .如申請專利範圍第5項之各向異性導電連接材料，其〃 中導電性粒子中之金屬層之Mohs硬度爲1〜6。
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8043709B2 (en) 2003-06-25 2011-10-25 Hitachi Chemical Co., Ltd. Circuit connecting material, film-like circuit connecting material using the same, circuit member connecting structure, and method of producing the same
TWI391953B (zh) * 2007-11-08 2013-04-01 Cheil Ind Inc 各向異性導電膜組成物、包含該組成物之各向異性導電 膜以及相關的方法
TWI663900B (zh) * 2014-07-22 2019-06-21 日商積水化學工業股份有限公司 連接構造體之製造方法
TWI671921B (zh) * 2018-09-14 2019-09-11 頎邦科技股份有限公司 晶片封裝構造及其晶片

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1010781A4 (en) * 1997-04-17 2007-04-25 Sekisui Chemical Co Ltd CONDUCTIVE PARTICLES AND METHOD AND DEVICE FOR PRODUCING THE SAME ANISOTROPIC CONDUCTIVE ADHESIVE AND CONDUCTIVE CONNECTION STRUCTURE, AND ELECTRICAL SWITCHING COMPONENTS AND METHOD FOR THE PRODUCTION THEREOF
JP3417354B2 (ja) * 1999-08-19 2003-06-16 ソニーケミカル株式会社 接着材料及び回路接続方法
JP3738655B2 (ja) * 2000-03-31 2006-01-25 ソニーケミカル株式会社 異方性導電接着材料及び接続方法
DE10059765A1 (de) * 2000-11-30 2002-06-06 Koninkl Philips Electronics Nv Baugruppe mit Verbindungsstruktur
US8932632B2 (en) * 2003-10-21 2015-01-13 Ppg Industries Ohio, Inc. Adhesives and sealants nanotechnology
JP2005251654A (ja) * 2004-03-05 2005-09-15 Jst Mfg Co Ltd 異方導電性シート及びその製造方法
DE102004029589A1 (de) * 2004-06-18 2005-12-29 Tesa Ag Elektrisch anisotrop leitfähiger Schmelzkleber zur Implantierung von elektrischen Modulen in einen Kartenkörper
TWI323901B (en) * 2004-11-26 2010-04-21 Hon Hai Prec Ind Co Ltd Anisotropic conductive material
KR101134168B1 (ko) * 2005-08-24 2012-04-09 삼성전자주식회사 반도체 칩 및 그 제조 방법과, 그를 이용한 표시 패널 및그 제조 방법
DE102009037627A1 (de) * 2009-08-14 2011-02-17 Giesecke & Devrient Gmbh Portabler Datenträger
US9070851B2 (en) 2010-09-24 2015-06-30 Seoul Semiconductor Co., Ltd. Wafer-level light emitting diode package and method of fabricating the same
KR101952844B1 (ko) * 2011-09-14 2019-02-28 삼성전기주식회사 전력 모듈 패키지 및 그 제조방법
TWI467718B (zh) 2011-12-30 2015-01-01 Ind Tech Res Inst 凸塊結構以及電子封裝接點結構及其製造方法
FR3029530B1 (fr) * 2014-12-05 2018-11-09 Scapa Group Plc. Ruban adhesif conducteur d'electricite
CN205944139U (zh) 2016-03-30 2017-02-08 首尔伟傲世有限公司 紫外线发光二极管封装件以及包含此的发光二极管模块
JP6945276B2 (ja) * 2016-03-31 2021-10-06 デクセリアルズ株式会社 異方性導電接続構造体
JP7160302B2 (ja) * 2018-01-31 2022-10-25 三国電子有限会社 接続構造体および接続構造体の作製方法
JP7046351B2 (ja) * 2018-01-31 2022-04-04 三国電子有限会社 接続構造体の作製方法
JP7185252B2 (ja) 2018-01-31 2022-12-07 三国電子有限会社 接続構造体の作製方法
KR102091938B1 (ko) * 2018-10-01 2020-03-20 전자부품연구원 반도체소자 실장재 및 제조방법
GB2584106B (en) * 2019-05-21 2024-03-27 Pragmatic Printing Ltd Flexible electronic structure
CN116190337B (zh) * 2023-04-23 2023-07-14 深圳平创半导体有限公司 电子器件及其制备方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2911927B2 (ja) 1989-11-29 1999-06-28 株式会社町田製作所 可撓管の製造方法
JP2835145B2 (ja) * 1990-05-28 1998-12-14 株式会社東芝 電子装置
EP0539211B1 (en) 1991-10-24 1997-10-01 Fujitsu Limited Method for production of microcapsule type conductive filler
WO1996037913A1 (en) * 1995-05-22 1996-11-28 Hitachi Chemical Company, Ltd. Semiconductor device having a semiconductor chip electrically connected to a wiring substrate
TW459032B (en) * 1998-03-18 2001-10-11 Sumitomo Bakelite Co An anisotropic conductive adhesive and method for preparation thereof and an electronic apparatus using said adhesive

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8043709B2 (en) 2003-06-25 2011-10-25 Hitachi Chemical Co., Ltd. Circuit connecting material, film-like circuit connecting material using the same, circuit member connecting structure, and method of producing the same
US8202622B2 (en) 2003-06-25 2012-06-19 Hitachi Chemical Co., Ltd. Circuit connecting material, film-form circuit connecting material using the same, circuit member connecting structure and method of manufacturing the same
TWI396487B (zh) * 2003-06-25 2013-05-11 Hitachi Chemical Co Ltd 電路連接材料、使用其之薄膜狀電路連接材料、電路構件之連接構造及其製造方法
US8501045B2 (en) 2003-06-25 2013-08-06 Hitachi Chemical Company, Ltd. Circuit connecting material, film-form circuit connecting material using the same, circuit member connecting structure and method of manufacturing the same
TWI391953B (zh) * 2007-11-08 2013-04-01 Cheil Ind Inc 各向異性導電膜組成物、包含該組成物之各向異性導電 膜以及相關的方法
TWI663900B (zh) * 2014-07-22 2019-06-21 日商積水化學工業股份有限公司 連接構造體之製造方法
TWI671921B (zh) * 2018-09-14 2019-09-11 頎邦科技股份有限公司 晶片封裝構造及其晶片
US10797213B2 (en) 2018-09-14 2020-10-06 Chipbond Technology Corporation Chip package and chip thereof

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EP1093160A3 (en) 2001-12-05
DE60018873T2 (de) 2006-02-23
EP1093160B1 (en) 2005-03-23
KR20010050963A (ko) 2001-06-25
KR100861757B1 (ko) 2008-10-06
DE60018873D1 (de) 2005-04-28
US6451875B1 (en) 2002-09-17
EP1093160A2 (en) 2001-04-18

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