TW451461B - Semiconductor integrated circuit device and method of manufacturing the same - Google Patents
Semiconductor integrated circuit device and method of manufacturing the same Download PDFInfo
- Publication number
- TW451461B TW451461B TW088113676A TW88113676A TW451461B TW 451461 B TW451461 B TW 451461B TW 088113676 A TW088113676 A TW 088113676A TW 88113676 A TW88113676 A TW 88113676A TW 451461 B TW451461 B TW 451461B
- Authority
- TW
- Taiwan
- Prior art keywords
- wiring
- insulating film
- film
- forming
- integrated circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10250162A JP2000156480A (ja) | 1998-09-03 | 1998-09-03 | 半導体集積回路装置およびその製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW451461B true TW451461B (en) | 2001-08-21 |
Family
ID=17203754
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW088113676A TW451461B (en) | 1998-09-03 | 1999-08-10 | Semiconductor integrated circuit device and method of manufacturing the same |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US6258649B1 (enExample) |
| JP (1) | JP2000156480A (enExample) |
| KR (1) | KR100681851B1 (enExample) |
| TW (1) | TW451461B (enExample) |
Families Citing this family (46)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6201272B1 (en) * | 1999-04-28 | 2001-03-13 | International Business Machines Corporation | Method for simultaneously forming a storage-capacitor electrode and interconnect |
| JP3998373B2 (ja) * | 1999-07-01 | 2007-10-24 | 株式会社ルネサステクノロジ | 半導体集積回路装置の製造方法 |
| JP3472738B2 (ja) * | 1999-12-24 | 2003-12-02 | Necエレクトロニクス株式会社 | 回路製造方法、半導体装置 |
| JP2001185552A (ja) * | 1999-12-27 | 2001-07-06 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
| US20070114631A1 (en) * | 2000-01-20 | 2007-05-24 | Hidenori Sato | Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device |
| JP2001203263A (ja) * | 2000-01-20 | 2001-07-27 | Hitachi Ltd | 半導体集積回路装置の製造方法および半導体集積回路装置 |
| JP2001291844A (ja) * | 2000-04-06 | 2001-10-19 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| KR100331568B1 (ko) * | 2000-05-26 | 2002-04-06 | 윤종용 | 반도체 메모리 소자 및 그 제조방법 |
| KR100340883B1 (ko) * | 2000-06-30 | 2002-06-20 | 박종섭 | 에스램 디바이스의 제조방법 |
| US6383868B1 (en) * | 2000-08-31 | 2002-05-07 | Micron Technology, Inc. | Methods for forming contact and container structures, and integrated circuit devices therefrom |
| KR100338781B1 (ko) * | 2000-09-20 | 2002-06-01 | 윤종용 | 반도체 메모리 소자 및 그의 제조방법 |
| JP2002134715A (ja) * | 2000-10-23 | 2002-05-10 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
| US6617248B1 (en) * | 2000-11-10 | 2003-09-09 | Micron Technology, Inc. | Method for forming a ruthenium metal layer |
| KR100354441B1 (en) * | 2000-12-27 | 2002-09-28 | Samsung Electronics Co Ltd | Method for fabricating spin-on-glass insulation layer of semiconductor device |
| KR100399769B1 (ko) * | 2001-03-13 | 2003-09-26 | 삼성전자주식회사 | 엠아이엠 캐패시터를 채용한 캐패시터 오버 비트 라인 구조의 반도체 메모리 소자의 제조 방법 |
| US6710425B2 (en) * | 2001-04-26 | 2004-03-23 | Zeevo, Inc. | Structure to increase density of MIM capacitors between adjacent metal layers in an integrated circuit |
| KR100363100B1 (en) * | 2001-05-24 | 2002-12-05 | Samsung Electronics Co Ltd | Semiconductor device including transistor and fabricating method thereof |
| JP2003297956A (ja) * | 2002-04-04 | 2003-10-17 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
| JP2004140198A (ja) * | 2002-10-18 | 2004-05-13 | Oki Electric Ind Co Ltd | 半導体装置およびその製造方法 |
| KR100930336B1 (ko) * | 2002-12-27 | 2009-12-08 | 후지쯔 마이크로일렉트로닉스 가부시키가이샤 | 반도체 장치, dram 집적 회로 장치 및 그 제조 방법 |
| TWI226101B (en) * | 2003-06-19 | 2005-01-01 | Advanced Semiconductor Eng | Build-up manufacturing process of IC substrate with embedded parallel capacitor |
| JP4591809B2 (ja) * | 2003-06-27 | 2010-12-01 | エルピーダメモリ株式会社 | 微細化に対応したメモリアレイ領域のレイアウト方法 |
| JP4658486B2 (ja) * | 2003-06-30 | 2011-03-23 | ルネサスエレクトロニクス株式会社 | 半導体装置とその製造方法 |
| US7037840B2 (en) * | 2004-01-26 | 2006-05-02 | Micron Technology, Inc. | Methods of forming planarized surfaces over semiconductor substrates |
| US7279379B2 (en) * | 2004-04-26 | 2007-10-09 | Micron Technology, Inc. | Methods of forming memory arrays; and methods of forming contacts to bitlines |
| JP4897201B2 (ja) * | 2004-05-31 | 2012-03-14 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US7772108B2 (en) * | 2004-06-25 | 2010-08-10 | Samsung Electronics Co., Ltd. | Interconnection structures for semiconductor devices and methods of forming the same |
| KR100626378B1 (ko) * | 2004-06-25 | 2006-09-20 | 삼성전자주식회사 | 반도체 장치의 배선 구조체 및 그 형성 방법 |
| US8012847B2 (en) * | 2005-04-01 | 2011-09-06 | Micron Technology, Inc. | Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry |
| JP2006302987A (ja) * | 2005-04-18 | 2006-11-02 | Nec Electronics Corp | 半導体装置およびその製造方法 |
| JP5096669B2 (ja) | 2005-07-06 | 2012-12-12 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
| JP4205734B2 (ja) * | 2006-05-25 | 2009-01-07 | エルピーダメモリ株式会社 | 半導体装置の製造方法 |
| US20080128813A1 (en) * | 2006-11-30 | 2008-06-05 | Ichiro Mizushima | Semiconductor Device and Manufacturing Method Thereof |
| KR100811442B1 (ko) * | 2007-02-09 | 2008-03-07 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조 방법 |
| KR101406225B1 (ko) * | 2008-04-11 | 2014-06-13 | 삼성전자주식회사 | 반도체 소자의 제조방법 |
| US20100224960A1 (en) * | 2009-03-04 | 2010-09-09 | Kevin John Fischer | Embedded capacitor device and methods of fabrication |
| KR101195268B1 (ko) * | 2011-02-14 | 2012-11-14 | 에스케이하이닉스 주식회사 | 커패시터 및 복층 금속 콘택을 포함하는 반도체 소자 및 형성 방법 |
| JP5797595B2 (ja) * | 2012-03-23 | 2015-10-21 | 東京エレクトロン株式会社 | 成膜装置のパーツ保護方法および成膜方法 |
| KR20140130594A (ko) * | 2013-05-01 | 2014-11-11 | 삼성전자주식회사 | 콘택 플러그를 포함하는 반도체 소자 및 그 제조 방법 |
| US9478490B2 (en) * | 2014-09-10 | 2016-10-25 | Qualcomm Incorporated | Capacitor from second level middle-of-line layer in combination with decoupling capacitors |
| US10566334B2 (en) | 2018-05-11 | 2020-02-18 | Micron Technology, Inc. | Methods used in forming integrated circuitry including forming first, second, and third contact openings |
| US12171104B2 (en) | 2018-09-28 | 2024-12-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and structures pertaining to improved ferroelectric random-access memory (FeRAM) |
| US11723213B2 (en) | 2018-09-28 | 2023-08-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and structures pertaining to improved ferroelectric random-access memory (FeRAM) |
| US10777456B1 (en) * | 2019-03-18 | 2020-09-15 | Tokyo Electron Limited | Semiconductor back end of line (BEOL) interconnect using multiple materials in a fully self-aligned via (FSAV) process |
| US20220293743A1 (en) * | 2021-03-10 | 2022-09-15 | Invention And Collaboration Laboratory Pte. Ltd. | Manufacture method for interconnection structure |
| DE102021118788A1 (de) * | 2021-07-15 | 2023-01-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | VERFAHREN UND STRUKTUREN FÜR VERBESSERTEN FERROELEKTRISCHEN DIREKTZUGRIFFSSPEICHER (FeRAM) |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100212098B1 (ko) * | 1987-09-19 | 1999-08-02 | 가나이 쓰도무 | 반도체 집적회로 장치 및 그 제조 방법과 반도체 집적 회로 장치의 배선기판 및 그 제조 방법 |
| KR960003864B1 (ko) | 1992-01-06 | 1996-03-23 | 삼성전자주식회사 | 반도체 메모리장치 및 그 제조방법 |
| JPH07235537A (ja) * | 1994-02-23 | 1995-09-05 | Mitsubishi Electric Corp | 表面が平坦化された半導体装置およびその製造方法 |
| JP2682455B2 (ja) * | 1994-07-07 | 1997-11-26 | 日本電気株式会社 | 半導体記憶装置およびその製造方法 |
| JPH09107082A (ja) * | 1995-08-09 | 1997-04-22 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
| KR100375428B1 (ko) * | 1995-11-20 | 2003-05-17 | 가부시끼가이샤 히다치 세이사꾸쇼 | 반도체기억장치 및 그 제조방법 |
| SG54456A1 (en) * | 1996-01-12 | 1998-11-16 | Hitachi Ltd | Semconductor integrated circuit device and method for manufacturing the same |
| TW377495B (en) * | 1996-10-04 | 1999-12-21 | Hitachi Ltd | Method of manufacturing semiconductor memory cells and the same apparatus |
| JP3869089B2 (ja) * | 1996-11-14 | 2007-01-17 | 株式会社日立製作所 | 半導体集積回路装置の製造方法 |
| US6255685B1 (en) * | 1996-11-22 | 2001-07-03 | Sony Corporation | Semiconductor device and method of manufacturing the same |
| US6838320B2 (en) * | 2000-08-02 | 2005-01-04 | Renesas Technology Corp. | Method for manufacturing a semiconductor integrated circuit device |
| JP3577195B2 (ja) * | 1997-05-15 | 2004-10-13 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
| JPH1117140A (ja) * | 1997-06-25 | 1999-01-22 | Sony Corp | 半導体装置及びその製造方法 |
| JP3697044B2 (ja) * | 1997-12-19 | 2005-09-21 | 株式会社ルネサステクノロジ | 半導体集積回路装置およびその製造方法 |
| JP3686248B2 (ja) * | 1998-01-26 | 2005-08-24 | 株式会社日立製作所 | 半導体集積回路装置およびその製造方法 |
| US6384446B2 (en) * | 1998-02-17 | 2002-05-07 | Agere Systems Guardian Corp. | Grooved capacitor structure for integrated circuits |
| US5895239A (en) * | 1998-09-14 | 1999-04-20 | Vanguard International Semiconductor Corporation | Method for fabricating dynamic random access memory (DRAM) by simultaneous formation of tungsten bit lines and tungsten landing plug contacts |
-
1998
- 1998-09-03 JP JP10250162A patent/JP2000156480A/ja active Pending
-
1999
- 1999-08-10 TW TW088113676A patent/TW451461B/zh not_active IP Right Cessation
- 1999-09-02 KR KR1019990037064A patent/KR100681851B1/ko not_active Expired - Fee Related
- 1999-09-03 US US09/389,231 patent/US6258649B1/en not_active Expired - Lifetime
-
2001
- 2001-06-15 US US09/880,959 patent/US20010028082A1/en not_active Abandoned
-
2003
- 2003-01-03 US US10/335,874 patent/US20030132479A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US20010028082A1 (en) | 2001-10-11 |
| US6258649B1 (en) | 2001-07-10 |
| US20030132479A1 (en) | 2003-07-17 |
| JP2000156480A (ja) | 2000-06-06 |
| KR100681851B1 (ko) | 2007-02-12 |
| KR20000022861A (ko) | 2000-04-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW451461B (en) | Semiconductor integrated circuit device and method of manufacturing the same | |
| TW508798B (en) | Semiconductor integrated circuit device and its manufacturing method | |
| TW454339B (en) | Semiconductor integrated circuit apparatus and its fabricating method | |
| JP4343571B2 (ja) | 半導体装置の製造方法 | |
| JP3090198B2 (ja) | 半導体装置の構造およびその製造方法 | |
| JP2956482B2 (ja) | 半導体記憶装置及びその製造方法 | |
| TW417281B (en) | Semiconductor device and its manufacturing method and manufacturing apparatus | |
| JP3701469B2 (ja) | 半導体集積回路装置の製造方法 | |
| TW508802B (en) | Semiconductor integrated circuit device and its manufacturing process | |
| TW451460B (en) | Semiconductor integrated circuit device and method for making the same | |
| TW209913B (enExample) | ||
| JPWO1998059372A1 (ja) | 半導体集積回路装置およびその製造方法 | |
| JPH01179449A (ja) | 半導体記憶装置 | |
| US5523542A (en) | Method for making dynamic random access memory cell capacitor | |
| JP2004119958A (ja) | 1t1r型抵抗メモリアレイを製造する方法 | |
| TW201039408A (en) | Semiconductor memory device and method for manufacturing the same | |
| US20030162357A1 (en) | Semiconductor device and process thereof | |
| TW527693B (en) | Semiconductor integrated circuit device and its manufacturing method | |
| JP2001274350A (ja) | 強誘電体メモリ及びその製造方法 | |
| JP2002289703A (ja) | 半導体記憶装置およびその製造方法 | |
| JP2006245625A (ja) | 半導体集積回路装置およびその製造方法 | |
| JP4729609B2 (ja) | 半導体装置の製造方法 | |
| JPH11297951A (ja) | 半導体集積回路装置およびその製造方法 | |
| JP2000332105A (ja) | 半導体装置の製造方法 | |
| JPH0529571A (ja) | 半導体記憶装置およびその製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |