TW429609B - Trench capacitor with EPI buried layer - Google Patents

Trench capacitor with EPI buried layer

Info

Publication number
TW429609B
TW429609B TW088110547A TW88110547A TW429609B TW 429609 B TW429609 B TW 429609B TW 088110547 A TW088110547 A TW 088110547A TW 88110547 A TW88110547 A TW 88110547A TW 429609 B TW429609 B TW 429609B
Authority
TW
Taiwan
Prior art keywords
trench capacitor
trench
buried layer
epi layer
epi
Prior art date
Application number
TW088110547A
Other languages
English (en)
Inventor
Martin Schrems
Jack Mandelman
Joachim Hoepfner
Herbert Schaefer
Reinhard Stengl
Original Assignee
Siemens Ag
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag, Ibm filed Critical Siemens Ag
Application granted granted Critical
Publication of TW429609B publication Critical patent/TW429609B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945—Trench capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW088110547A 1998-06-26 1999-06-23 Trench capacitor with EPI buried layer TW429609B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/105,945 US5945704A (en) 1998-04-06 1998-06-26 Trench capacitor with epi buried layer

Publications (1)

Publication Number Publication Date
TW429609B true TW429609B (en) 2001-04-11

Family

ID=22308666

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088110547A TW429609B (en) 1998-06-26 1999-06-23 Trench capacitor with EPI buried layer

Country Status (6)

Country Link
US (1) US5945704A (zh)
EP (1) EP0967653A3 (zh)
JP (1) JP2000031427A (zh)
KR (1) KR100621714B1 (zh)
CN (1) CN1222999C (zh)
TW (1) TW429609B (zh)

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US6376324B1 (en) 2000-06-23 2002-04-23 International Business Machines Corporation Collar process for reduced deep trench edge bias
US6373086B1 (en) * 2000-06-29 2002-04-16 International Business Machines Corporation Notched collar isolation for suppression of vertical parasitic MOSFET and the method of preparing the same
DE10034003A1 (de) * 2000-07-07 2002-01-24 Infineon Technologies Ag Grabenkondensator mit Isolationskragen und entsprechendes Herstellungsverfahren
US6391720B1 (en) * 2000-09-27 2002-05-21 Chartered Semiconductor Manufacturing Ltd. Process flow for a performance enhanced MOSFET with self-aligned, recessed channel
US6261894B1 (en) * 2000-11-03 2001-07-17 International Business Machines Corporation Method for forming dual workfunction high-performance support MOSFETs in EDRAM arrays
JP3808700B2 (ja) * 2000-12-06 2006-08-16 株式会社東芝 半導体装置及びその製造方法
US6544838B2 (en) 2001-03-13 2003-04-08 Infineon Technologies Ag Method of deep trench formation with improved profile control and surface area
US6518118B2 (en) 2001-03-15 2003-02-11 International Business Machines Corporation Structure and process for buried bitline and single sided buried conductor formation
US6809368B2 (en) * 2001-04-11 2004-10-26 International Business Machines Corporation TTO nitride liner for improved collar protection and TTO reliability
DE10121778B4 (de) * 2001-05-04 2005-12-01 Infineon Technologies Ag Verfahren zur Erzeugung eines Dotierprofils bei einer Gasphasendotierung
DE10128718B4 (de) * 2001-06-13 2005-10-06 Infineon Technologies Ag Grabenkondensator einer DRAM-Speicherzelle mit metallischem Collarbereich und nicht-metallischer Leitungsbrücke zum Auswahltransistor
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US20030107111A1 (en) * 2001-12-10 2003-06-12 International Business Machines Corporation A 3-d microelectronic structure including a vertical thermal nitride mask
DE10205077B4 (de) * 2002-02-07 2007-03-08 Infineon Technologies Ag Halbleiterspeicherzelle mit einem Graben und einem planaren Auswahltransistor und Verfahren zu ihrer Herstellung
US6885080B2 (en) * 2002-02-22 2005-04-26 International Business Machines Corporation Deep trench isolation of embedded DRAM for improved latch-up immunity
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US7291541B1 (en) 2004-03-18 2007-11-06 National Semiconductor Corporation System and method for providing improved trench isolation of semiconductor devices
US7041553B2 (en) * 2004-06-02 2006-05-09 International Business Machines Corporation Process for forming a buried plate
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US7199020B2 (en) * 2005-04-11 2007-04-03 Texas Instruments Incorporated Nitridation of STI liner oxide for modulating inverse width effects in semiconductor devices
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TWI278069B (en) * 2005-08-23 2007-04-01 Nanya Technology Corp Method of fabricating a trench capacitor having increased capacitance
US20100229482A1 (en) * 2006-03-14 2010-09-16 Jae-ho Lee Connecting Structure
US20080124890A1 (en) * 2006-06-27 2008-05-29 Macronix International Co., Ltd. Method for forming shallow trench isolation structure
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US6265741B1 (en) 1998-04-06 2001-07-24 Siemens Aktiengesellschaft Trench capacitor with epi buried layer

Also Published As

Publication number Publication date
US5945704A (en) 1999-08-31
JP2000031427A (ja) 2000-01-28
EP0967653A3 (en) 2003-07-02
KR20000006496A (ko) 2000-01-25
KR100621714B1 (ko) 2006-09-06
CN1248066A (zh) 2000-03-22
CN1222999C (zh) 2005-10-12
EP0967653A2 (en) 1999-12-29

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Legal Events

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GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees