TW335530B - Redundant circuit for decoding fuse semiconductor memory - Google Patents

Redundant circuit for decoding fuse semiconductor memory

Info

Publication number
TW335530B
TW335530B TW085111370A TW85111370A TW335530B TW 335530 B TW335530 B TW 335530B TW 085111370 A TW085111370 A TW 085111370A TW 85111370 A TW85111370 A TW 85111370A TW 335530 B TW335530 B TW 335530B
Authority
TW
Taiwan
Prior art keywords
circuit
output
input
data
transmitter
Prior art date
Application number
TW085111370A
Other languages
English (en)
Inventor
Lee Jung-Hwa
Han Jin-Man
Seo Dong-Il
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW335530B publication Critical patent/TW335530B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
TW085111370A 1995-10-04 1996-09-17 Redundant circuit for decoding fuse semiconductor memory TW335530B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950033821A KR100192574B1 (ko) 1995-10-04 1995-10-04 디코디드 퓨즈를 사용한 반도체 메모리 장치의 컬럼 리던던시 회로

Publications (1)

Publication Number Publication Date
TW335530B true TW335530B (en) 1998-07-01

Family

ID=19429132

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085111370A TW335530B (en) 1995-10-04 1996-09-17 Redundant circuit for decoding fuse semiconductor memory

Country Status (6)

Country Link
US (1) US5812466A (zh)
JP (1) JP3763085B2 (zh)
KR (1) KR100192574B1 (zh)
DE (1) DE19640437B4 (zh)
GB (1) GB2307570B (zh)
TW (1) TW335530B (zh)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100248350B1 (ko) * 1996-12-31 2000-03-15 김영환 메모리 장치용 휴즈 옵션 회로
DE19729579C2 (de) * 1997-07-10 2000-12-07 Siemens Ag Verfahren zum Aktivieren einer redundanten Wortleitung bei Inter-Segment-Redundanz bei einem Halbleiterspeicher mit in Segmenten organisierten Wortleitungen
US5982693A (en) * 1997-12-10 1999-11-09 Programmable Microelectronics Corporation Sense amplifier with improved bit line initialization
JPH11185469A (ja) * 1997-12-25 1999-07-09 Mitsubishi Electric Corp 半導体集積回路
KR100268433B1 (ko) * 1997-12-29 2000-10-16 윤종용 열 리던던시 구조를 가지는 반도체 메모리 장치
US6041007A (en) * 1998-02-02 2000-03-21 Motorola, Inc. Device with programmable memory and method of programming
US6077211A (en) * 1998-02-27 2000-06-20 Micron Technology, Inc. Circuits and methods for selectively coupling redundant elements into an integrated circuit
KR100333720B1 (ko) * 1998-06-30 2002-06-20 박종섭 강유전체메모리소자의리던던시회로
US6061291A (en) * 1998-07-14 2000-05-09 Winbond Electronics Corporation America Memory integrated circuit supporting maskable block write operation and arbitrary redundant column repair
KR100301042B1 (ko) * 1998-07-15 2001-09-06 윤종용 레이아웃면적을최소화하는리던던시회로
KR100297716B1 (ko) * 1998-09-03 2001-08-07 윤종용 높은멀티비트자유도의반도체메모리장치
US5956276A (en) * 1998-09-16 1999-09-21 Mosel Vitelic Corporation Semiconductor memory having predecoder control of spare column select lines
KR100370232B1 (ko) * 1999-04-28 2003-01-29 삼성전자 주식회사 결함 셀을 리던던시 셀로의 대체를 반복 수행할 수 있는 리던던시 회로
JP3866451B2 (ja) * 1999-06-24 2007-01-10 Ｎｅｃエレクトロニクス株式会社 冗長プログラム回路及びこれを内蔵した半導体記憶装置
KR20010004536A (ko) * 1999-06-29 2001-01-15 김영환 자동 리던던시 회로
JP3581953B2 (ja) * 1999-07-26 2004-10-27 沖電気工業株式会社 半導体記憶装置
US6574763B1 (en) 1999-12-28 2003-06-03 International Business Machines Corporation Method and apparatus for semiconductor integrated circuit testing and burn-in
US6307787B1 (en) * 2000-07-25 2001-10-23 Advanced Micro Devices, Inc. Burst read incorporating output based redundancy
KR100351992B1 (ko) * 2000-12-30 2002-09-12 주식회사 하이닉스반도체 반도체 메모리장치의 데이타 입/출력 패스 변경장치
KR100800105B1 (ko) * 2001-11-30 2008-02-01 매그나칩 반도체 유한회사 임베디드 디램
US7012827B2 (en) * 2004-05-07 2006-03-14 Taiwan Semiconductor Manufacturing Co., Ltd. Multiple electrical fuses shared with one program device
US7271988B2 (en) * 2004-08-04 2007-09-18 Taiwan Semiconductor Manufacturing Company Method and system to protect electrical fuses
JP2009043328A (ja) * 2007-08-08 2009-02-26 Toshiba Corp 半導体集積回路
US8976604B2 (en) 2012-02-13 2015-03-10 Macronix International Co., Lt. Method and apparatus for copying data with a memory array having redundant memory
US9165680B2 (en) 2013-03-11 2015-10-20 Macronix International Co., Ltd. Memory integrated circuit with a page register/status memory capable of storing only a subset of row blocks of main column blocks
US9773571B2 (en) 2014-12-16 2017-09-26 Macronix International Co., Ltd. Memory repair redundancy with array cache redundancy
US20160218286A1 (en) 2015-01-23 2016-07-28 Macronix International Co., Ltd. Capped contact structure with variable adhesion layer thickness
US9514815B1 (en) 2015-05-13 2016-12-06 Macronix International Co., Ltd. Verify scheme for ReRAM
US9691478B1 (en) 2016-04-22 2017-06-27 Macronix International Co., Ltd. ReRAM array configuration for bipolar operation
US9959928B1 (en) 2016-12-13 2018-05-01 Macronix International Co., Ltd. Iterative method and apparatus to program a programmable resistance memory element using stabilizing pulses

Family Cites Families (8)

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Publication number Priority date Publication date Assignee Title
JPH02146195A (ja) * 1988-11-28 1990-06-05 Nec Corp 半導体記憶装置
JP2600018B2 (ja) * 1990-09-29 1997-04-16 三菱電機株式会社 半導体記憶装置
US5343429A (en) * 1991-12-06 1994-08-30 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having redundant circuit and method of testing to see whether or not redundant circuit is used therein
JPH05166396A (ja) * 1991-12-12 1993-07-02 Mitsubishi Electric Corp 半導体メモリ装置
JP2856645B2 (ja) * 1993-09-13 1999-02-10 株式会社東芝 半導体記憶装置
JPH07282597A (ja) * 1994-04-12 1995-10-27 Mitsubishi Electric Corp 半導体記憶装置
KR960016807B1 (ko) * 1994-06-30 1996-12-21 삼성전자 주식회사 반도체 메모리 장치의 리던던시 회로
US5548553A (en) * 1994-12-12 1996-08-20 Digital Equipment Corporation Method and apparatus for providing high-speed column redundancy

Also Published As

Publication number Publication date
DE19640437A1 (de) 1997-04-10
JPH09128994A (ja) 1997-05-16
GB9620723D0 (en) 1996-11-20
KR970023456A (ko) 1997-05-30
JP3763085B2 (ja) 2006-04-05
DE19640437B4 (de) 2006-01-19
GB2307570A (en) 1997-05-28
US5812466A (en) 1998-09-22
GB2307570B (en) 1997-11-26
KR100192574B1 (ko) 1999-06-15

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees