TW284884B - Method for programming a nonvolatile memory - Google Patents

Method for programming a nonvolatile memory

Info

Publication number
TW284884B
TW284884B TW084111580A TW84111580A TW284884B TW 284884 B TW284884 B TW 284884B TW 084111580 A TW084111580 A TW 084111580A TW 84111580 A TW84111580 A TW 84111580A TW 284884 B TW284884 B TW 284884B
Authority
TW
Taiwan
Prior art keywords
programming
drain
voltage
source
nonvolatile memory
Prior art date
Application number
TW084111580A
Other languages
English (en)
Inventor
Woong-Lim Choi
Original Assignee
Lg Semicon Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Semicon Co Ltd filed Critical Lg Semicon Co Ltd
Application granted granted Critical
Publication of TW284884B publication Critical patent/TW284884B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3486—Circuits or methods to prevent overprogramming of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G11C11/5635—Erasing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5624—Concurrent multilevel programming and programming verification

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
TW084111580A 1995-09-18 1995-11-02 Method for programming a nonvolatile memory TW284884B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950030440A KR0172831B1 (ko) 1995-09-18 1995-09-18 비휘발성 메모리를 프로그램하는 방법

Publications (1)

Publication Number Publication Date
TW284884B true TW284884B (en) 1996-09-01

Family

ID=19427071

Family Applications (1)

Application Number Title Priority Date Filing Date
TW084111580A TW284884B (en) 1995-09-18 1995-11-02 Method for programming a nonvolatile memory

Country Status (10)

Country Link
US (1) US5566111A (zh)
EP (1) EP0763829B1 (zh)
JP (1) JP3211146B2 (zh)
KR (1) KR0172831B1 (zh)
CN (1) CN1104010C (zh)
DE (1) DE69636063T2 (zh)
MY (1) MY115787A (zh)
RU (1) RU2111555C1 (zh)
SG (1) SG68590A1 (zh)
TW (1) TW284884B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101373584B (zh) * 2007-08-21 2011-07-06 联咏科技股份有限公司 源极驱动装置

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6222762B1 (en) 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5440505A (en) * 1994-01-21 1995-08-08 Intel Corporation Method and circuitry for storing discrete amounts of charge in a single memory element
US5687114A (en) 1995-10-06 1997-11-11 Agate Semiconductor, Inc. Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell
KR0172401B1 (ko) * 1995-12-07 1999-03-30 김광호 다수상태 불휘발성 반도체 메모리 장치
KR100217917B1 (ko) * 1995-12-20 1999-09-01 김영환 플래쉬 메모리셀의 문턱전압 조정회로
TW338158B (en) * 1996-02-29 1998-08-11 Sanyo Electric Co Non volatile semiconductor memory device
KR100205309B1 (ko) 1996-07-23 1999-07-01 구본준 비휘발성 메모리셀 및 이 비휘발성 메모리셀을 프로그래밍하는 방법
JPH1055690A (ja) * 1996-08-07 1998-02-24 Nec Corp 電気的書込可能な不揮発性半導体記憶装置
KR100232190B1 (ko) * 1996-10-01 1999-12-01 김영환 비휘발성 메모리장치
US5907855A (en) * 1996-10-15 1999-05-25 Micron Technology, Inc. Apparatus and method for reducing programming cycles for multistate memory system
US6728825B1 (en) 1996-10-15 2004-04-27 Micron Technology, Inc. Apparatus and method for reducing programming cycles for multistate memory system
KR100226769B1 (ko) * 1996-11-19 1999-10-15 김영환 다중 비트 셀의 데이타 센싱장치 및 방법
US5870335A (en) 1997-03-06 1999-02-09 Agate Semiconductor, Inc. Precision programming of nonvolatile memory cells
US6487116B2 (en) 1997-03-06 2002-11-26 Silicon Storage Technology, Inc. Precision programming of nonvolatile memory cells
US5852578A (en) * 1997-06-17 1998-12-22 Hoang; Loc B. Flash cell having self-timed programming
US6178118B1 (en) 1997-08-26 2001-01-23 Macronix International Co., Ltd. Electrically programmable semiconductor device with multi-level wordline voltages for programming multi-level threshold voltages
US5959892A (en) * 1997-08-26 1999-09-28 Macronix International Co., Ltd. Apparatus and method for programming virtual ground EPROM array cell without disturbing adjacent cells
US6046934A (en) * 1999-01-12 2000-04-04 Macronix International Co., Ltd. Method and device for multi-level programming of a memory cell
DE69726136T2 (de) * 1997-08-29 2004-08-26 Stmicroelectronics S.R.L., Agrate Brianza Verfahren und Schaltung zur Erzeugung einer Gatterspannung für nichtfluchtige Speicheranordnungen
US5877984A (en) * 1997-09-05 1999-03-02 Information Storage Devices, Inc. Method and apparatus for adjustment and control of an iterative method of recording analog signals with on chip selection of a voltage ramp amplitude
KR100521320B1 (ko) * 1997-11-25 2006-01-12 삼성전자주식회사 불 휘발성 메모리 장치 및 그것의 프로그램 방법
KR100327421B1 (ko) * 1997-12-31 2002-07-27 주식회사 하이닉스반도체 비휘발성 메모리 소자의 프로그램 시스템 및 그의 프로그램 방법
US6038166A (en) * 1998-04-01 2000-03-14 Invox Technology High resolution multi-bit-per-cell memory
JPH11306775A (ja) * 1998-04-17 1999-11-05 Tadahiro Omi 半導体メモリ装置
US5909394A (en) * 1998-08-24 1999-06-01 Taiwan Semiconductor Manufacturing Co., Ltd. Precharge circuit for preventing invalid output pulses caused by current sensing circuits in flash memory devices
US6282145B1 (en) 1999-01-14 2001-08-28 Silicon Storage Technology, Inc. Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system
KR100301817B1 (ko) * 1999-06-29 2001-11-01 김영환 레퍼런스 메모리셀의 초기화 회로 및 그를 이용한 초기화 방법
US6396742B1 (en) 2000-07-28 2002-05-28 Silicon Storage Technology, Inc. Testing of multilevel semiconductor memory
JP3848064B2 (ja) 2000-08-07 2006-11-22 シャープ株式会社 半導体不揮発性メモリの試験方法
KR100386296B1 (ko) * 2000-12-30 2003-06-02 주식회사 하이닉스반도체 멀티레벨을 가지는 플래쉬 메모리를 프로그램/리드하기위한 회로 및 그 방법
US7345791B2 (en) * 2002-02-13 2008-03-18 Konica Corporation Image processing device and image processing method
JP2004046991A (ja) * 2002-07-12 2004-02-12 Fujitsu Ltd 不揮発性半導体記憶装置の閾値電圧調整方法、および不揮発性半導体記憶装置
US6903979B1 (en) * 2003-09-17 2005-06-07 National Semiconductor Corporation Efficient method of PMOS stacked-gate memory cell programming utilizing feedback control of substrate current
US7366030B2 (en) * 2004-01-29 2008-04-29 Micron Technology, Inc. Simultaneous read circuit for multiple memory cells
JP4804359B2 (ja) * 2004-10-29 2011-11-02 スパンション エルエルシー 半導体装置及び半導体装置の制御方法
US7085168B2 (en) * 2004-12-30 2006-08-01 Macronix International Co., Ltd. Programming method for controlling memory threshold voltage distribution
KR100780773B1 (ko) * 2006-11-03 2007-11-30 주식회사 하이닉스반도체 플래시 메모리소자의 프로그램 시작 바이어스 설정방법 및이를 이용한 프로그램 방법
KR101311499B1 (ko) 2007-08-23 2013-09-25 삼성전자주식회사 가변 저항 메모리 장치 및 그것의 프로그램 방법
US8467245B2 (en) 2010-03-24 2013-06-18 Ememory Technology Inc. Non-volatile memory device with program current clamp and related method
US8369154B2 (en) 2010-03-24 2013-02-05 Ememory Technology Inc. Channel hot electron injection programming method and related device
JP2014049151A (ja) * 2012-08-30 2014-03-17 Ememory Technology Inc フラッシュメモリ
KR102535414B1 (ko) * 2016-05-17 2023-05-24 에스케이하이닉스 주식회사 균일한 프로그램 특성을 갖도록 하는 이피롬 메모리 장치 및 그 이피롬 메모리 장치의 프로그램 방법

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4331968A (en) * 1980-03-17 1982-05-25 Mostek Corporation Three layer floating gate memory transistor with erase gate over field oxide region
JPS60236195A (ja) * 1984-05-08 1985-11-22 Nec Corp 不揮発性半導体メモリ
JPS626493A (ja) * 1985-06-29 1987-01-13 Ricoh Co Ltd 書込みと消去が可能な半導体メモリ装置
JPS6478494A (en) * 1987-09-19 1989-03-23 Mitsubishi Electric Corp Nonvolatile semiconductor memory
US5043940A (en) * 1988-06-08 1991-08-27 Eliyahou Harari Flash EEPROM memory systems having multistate storage cells
US5268318A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
FR2635410B1 (fr) * 1988-08-11 1991-08-02 Sgs Thomson Microelectronics Memoire de type eprom a haute densite d'integration avec une organisation en damier et un facteur de couplage ameliore et procede de fabrication
JPH02260298A (ja) * 1989-03-31 1990-10-23 Oki Electric Ind Co Ltd 不揮発性多値メモリ装置
US5163021A (en) * 1989-04-13 1992-11-10 Sundisk Corporation Multi-state EEprom read and write circuits and techniques
US5258949A (en) * 1990-12-03 1993-11-02 Motorola, Inc. Nonvolatile memory with enhanced carrier generation and method for programming the same
US5218569A (en) * 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
KR960002006B1 (ko) * 1991-03-12 1996-02-09 가부시끼가이샤 도시바 2개의 기준 레벨을 사용하는 기록 검증 제어기를 갖는 전기적으로 소거 가능하고 프로그램 가능한 불휘발성 메모리 장치
US5386132A (en) * 1992-11-02 1995-01-31 Wong; Chun C. D. Multimedia storage system with highly compact memory device
US5422842A (en) * 1993-07-08 1995-06-06 Sundisk Corporation Method and circuit for simultaneously programming and verifying the programming of selected EEPROM cells

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101373584B (zh) * 2007-08-21 2011-07-06 联咏科技股份有限公司 源极驱动装置

Also Published As

Publication number Publication date
EP0763829B1 (en) 2006-04-26
MY115787A (en) 2003-09-30
SG68590A1 (en) 1999-11-16
JPH0991980A (ja) 1997-04-04
JP3211146B2 (ja) 2001-09-25
EP0763829A3 (en) 1998-10-21
CN1104010C (zh) 2003-03-26
KR970016941A (ko) 1997-04-28
EP0763829A2 (en) 1997-03-19
CN1146052A (zh) 1997-03-26
RU2111555C1 (ru) 1998-05-20
DE69636063T2 (de) 2006-11-23
DE69636063D1 (de) 2006-06-01
KR0172831B1 (ko) 1999-03-30
US5566111A (en) 1996-10-15

Similar Documents

Publication Publication Date Title
TW284884B (en) Method for programming a nonvolatile memory
MY119029A (en) Nonvolatile memory and method of programming the same.
RU96101895A (ru) Способ программирования ячейки энергонезависимой памяти
TW334633B (en) Extended-life method for soft-programming floating-gate memory cells
AU2002311936A1 (en) Dual-cell soft programming for virtual-ground memory arrays
TW357336B (en) Non-voltile memory device, non-volatile memory cell and method of adjusting the threshold value of the non-volatile memory cell and each of plural transistors
DE69614223D1 (de) PMOS-Flash-Speicherzelle mit mehrstufiger Schwellspannung
TW331037B (en) Method of programming nonvolatile memory
DE3587799T2 (de) Elektrisch programmierbare Eintransistorvorrichtung und Verfahren.
EP1022746A3 (en) Method of operating a two-transistor flash memory cell
EP1313148A3 (en) A scalable flash eeprom memory cell, method of manufacturing and operation thereof
TW287321B (en) A PMOS flash memory cell with hot electron injection programming and tunnelling erasing
DE69130163D1 (de) Verfahren zur Herstellung einer MOS-EEPROM-Transistorzelle mit schwebendem Gate
DE69619321T2 (de) Verfahren zum Programmieren einer Flash-EEPROM-Speicherzelle unter Optimierung des niedrigen Leistungsverbrauchs und Verfahren zum Löschen dieser Zelle
WO2001084552A3 (en) Programming of nonvolatile memory cells
EP0649178A3 (en) Flash EEPROM cell with a gap between the floating gate and the drain to increase the efficiency of hot electron injection during programming.
US5576991A (en) Multistepped threshold convergence for a flash memory array
KR970702560A (ko) 정-바이어스된 소스-대-기판 접합을 사용한 다중레벨의 데이터를 저장하기 위한 단일 eprom 또는 플래시 메모리셀의 프로그래밍 방법(a method for programming a single eprom or flash memory cell to store multiple levels of data that utilizes a forward-biased source-to-substrate junction)
DE69231300T2 (de) Verfahren zur Programmierung einer Halbleiterspeicheranordnung
TW288207B (en) Process of fabricating erasable and un-erasable programmable memory cell
KR950011652B1 (ko) 하층 소거 게이트를 사용한 플래쉬 eprom셀 구조 및 그 제조 방법
TW247971B (en) Flash memory cell process
TW358975B (en) Triple floating gate memory and acoustic channel program, pre-program and cleaning method
ES2130817T3 (es) Fuente de corriente constante con una celula eeprom.
TW239235B (en) Process for erasable nonvolatile memory cell structure

Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent