JPS5647992A - Nonvolatile semiconductor memory - Google Patents
Nonvolatile semiconductor memoryInfo
- Publication number
- JPS5647992A JPS5647992A JP12435179A JP12435179A JPS5647992A JP S5647992 A JPS5647992 A JP S5647992A JP 12435179 A JP12435179 A JP 12435179A JP 12435179 A JP12435179 A JP 12435179A JP S5647992 A JPS5647992 A JP S5647992A
- Authority
- JP
- Japan
- Prior art keywords
- erasure
- memory cell
- transistor
- voltage
- column
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 239000011159 matrix material Substances 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
PURPOSE:To make electric erasure possible even when a memory cell is made of one transistor, by controlling column and row voltages of floating gate type MOS transistor ROM cells of matrix constitution according to readout, write-in and erasure modes. CONSTITUTION:When terminal 18 of control part 11a1 is applied with a fixed negative voltage, row line 91, etc., selected by decoder 241 are held at a negative potential, which corresponds to a control voltage, through N-Well layer 131, etc. Column line 11, etc., selected by column decoder 30, on the other hand, are held at a fixed positive potential by erasure control circuit 4. Then, the control voltage and drain voltage of the floating gate type MOS trasistor forming ROM memory cell C11 matrix-connected to lines 91 and 11 cause cell C11 controlled to a fixed value by lines 91 and 11 to break down. In write-in and erasure modes, a memory cell formed by one transistor is similarly erased electrically in a short time without using ultraviolet rays, etc.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12435179A JPS5647992A (en) | 1979-09-27 | 1979-09-27 | Nonvolatile semiconductor memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12435179A JPS5647992A (en) | 1979-09-27 | 1979-09-27 | Nonvolatile semiconductor memory |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5647992A true JPS5647992A (en) | 1981-04-30 |
JPS6120958B2 JPS6120958B2 (en) | 1986-05-24 |
Family
ID=14883222
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12435179A Granted JPS5647992A (en) | 1979-09-27 | 1979-09-27 | Nonvolatile semiconductor memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5647992A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5827372A (en) * | 1981-08-12 | 1983-02-18 | Hitachi Ltd | Non-volatile memory device |
JPS58501563A (en) * | 1981-09-28 | 1983-09-16 | モトロ−ラ・インコ−ポレ−テツド | Column and row erasable EEPROM |
US4797856A (en) * | 1987-04-16 | 1989-01-10 | Intel Corporation | Self-limiting erase scheme for EEPROM |
JPH02108293A (en) * | 1988-10-15 | 1990-04-20 | Sony Corp | Address decoder circuit for non-volatile memory |
JPH02127585A (en) * | 1988-10-31 | 1990-05-16 | Albany Internatl Corp | Transformation of pressed woven fabric in paper-making machine |
JPH02127590A (en) * | 1988-10-31 | 1990-05-16 | Albany Internatl Corp | Fabric having hydrophilic and hydrophobic coating |
JPH02127591A (en) * | 1988-10-31 | 1990-05-16 | Albany Internatl Corp | Fabric for paper-making machine, discharge of which is controlled |
JPH03501374A (en) * | 1987-10-07 | 1991-03-28 | タンフェルト インコーポレイテッド | Compressed felt for paper making |
JPH0561720B2 (en) * | 1981-09-28 | 1993-09-06 | Motorola Inc |
-
1979
- 1979-09-27 JP JP12435179A patent/JPS5647992A/en active Granted
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5827372A (en) * | 1981-08-12 | 1983-02-18 | Hitachi Ltd | Non-volatile memory device |
JPS58501563A (en) * | 1981-09-28 | 1983-09-16 | モトロ−ラ・インコ−ポレ−テツド | Column and row erasable EEPROM |
JPH0561720B2 (en) * | 1981-09-28 | 1993-09-06 | Motorola Inc | |
US4797856A (en) * | 1987-04-16 | 1989-01-10 | Intel Corporation | Self-limiting erase scheme for EEPROM |
JPH03501374A (en) * | 1987-10-07 | 1991-03-28 | タンフェルト インコーポレイテッド | Compressed felt for paper making |
JPH02108293A (en) * | 1988-10-15 | 1990-04-20 | Sony Corp | Address decoder circuit for non-volatile memory |
JPH02127585A (en) * | 1988-10-31 | 1990-05-16 | Albany Internatl Corp | Transformation of pressed woven fabric in paper-making machine |
JPH02127590A (en) * | 1988-10-31 | 1990-05-16 | Albany Internatl Corp | Fabric having hydrophilic and hydrophobic coating |
JPH02127591A (en) * | 1988-10-31 | 1990-05-16 | Albany Internatl Corp | Fabric for paper-making machine, discharge of which is controlled |
Also Published As
Publication number | Publication date |
---|---|
JPS6120958B2 (en) | 1986-05-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3167919B2 (en) | Nonvolatile semiconductor memory having NAND structure and method of programming the same | |
US4561004A (en) | High density, electrically erasable, floating gate memory cell | |
US4377818A (en) | High density electrically programmable ROM | |
US4258466A (en) | High density electrically programmable ROM | |
US4122544A (en) | Electrically alterable floating gate semiconductor memory device with series enhancement transistor | |
US5742542A (en) | Non-volatile memory cells using only positive charge to store data | |
JPS57105889A (en) | Semiconductor storage device | |
US4317272A (en) | High density, electrically erasable, floating gate memory cell | |
TW328179B (en) | Non-volatile semiconductor memory device | |
JPS5542307A (en) | Semiconductor memory unit | |
EP0083194A3 (en) | Electrically erasable programmable read only memory cell having a single transistor | |
JPH02240960A (en) | Semiconductor device | |
JPS63211767A (en) | Semiconductor storage device | |
JPS5647992A (en) | Nonvolatile semiconductor memory | |
JPS5792488A (en) | Nonvolatile memory | |
JPH0360079A (en) | Nonvolatile semiconductor memory | |
JPS5798191A (en) | Semiconductor storage device | |
JPS57150192A (en) | Non-volatile semiconductor memory device | |
JPS55111173A (en) | Semiconductor memory device | |
JP2839718B2 (en) | Method for selectively programming non-volatile memory | |
JPS57120297A (en) | Semiconductor storage device | |
JPS57105890A (en) | Semiconductor storage device | |
JPS5727493A (en) | Semiconductor storage device and its write-in method | |
JPS6433961A (en) | Mos composite memory device | |
JPH065873A (en) | Nonvolatile semiconductor memory |