TW202001843A - 顯示裝置 - Google Patents

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Publication number
TW202001843A
TW202001843A TW107122363A TW107122363A TW202001843A TW 202001843 A TW202001843 A TW 202001843A TW 107122363 A TW107122363 A TW 107122363A TW 107122363 A TW107122363 A TW 107122363A TW 202001843 A TW202001843 A TW 202001843A
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Taiwan
Prior art keywords
light
emitting element
connection
display device
substrate
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TW107122363A
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English (en)
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TWI679627B (zh
Inventor
奚鵬博
林振祺
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友達光電股份有限公司
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Application filed by 友達光電股份有限公司 filed Critical 友達光電股份有限公司
Priority to TW107122363A priority Critical patent/TWI679627B/zh
Priority to CN201811056847.6A priority patent/CN109273436B/zh
Priority to US16/172,880 priority patent/US10468394B1/en
Application granted granted Critical
Publication of TWI679627B publication Critical patent/TWI679627B/zh
Publication of TW202001843A publication Critical patent/TW202001843A/zh

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    • H—ELECTRICITY
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    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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Abstract

一種顯示裝置，包括陣列基板、兩個發光元件基板、多個第一連接元件以及多個第二連接元件。陣列基板包括兩個畫素電路。每個畫素電路包括三個子畫素電路、三個第一導電接墊以及一第二導電接墊。每個發光元件基板包括三個發光元件、三個第一連接墊以及一第二連接墊。多個第一連接元件分別電性連接對應的一個第一導電接墊至對應的一個第一連接墊。多個第二連接元件分別電性連接對應的一個第二導電接墊至對應的一個第二連接墊。

Description

顯示裝置
本發明是有關於一種顯示裝置，且特別是有關於一種包括陣列基板以及至少兩個發光元件基板的顯示裝置。
目前，顯示裝置在製造過程中常會使用到巨量轉移技術，巨量轉移技術被用來將大量的發光元件（例如發光二極體）轉置於電路基板上，接著使發光元件與電路基板上之畫素電路電性連接。然而，在轉置大量的發光元件時，發光元件容易對位失敗，使發光元件不能正確的電性連接至電路基板。這些對位失敗之發光元件嚴重的影響了顯示裝置的生產良率。因此，目前亟需一種可以解決前述問題的方法。
本發明提供一種顯示裝置，具有較佳之生產良率。
本發明的一種顯示裝置包括陣列基板、至少兩個發光元件基板、多個第一連接元件以及多個第二連接元件。陣列基板包括載板以及主動元件層。主動元件層位於載板上，且包括兩個畫素電路、第一電源線與第二電源線。各畫素電路包括至少三個子畫素電路、至少三個第一導電接墊以及第二導電接墊。每個子畫素電路包含驅動元件、切換元件及訊號線。驅動元件具有第一端、第二端與控制端。驅動元件之控制端電性連接於訊號線及切換元件。驅動元件之第一端電性連接於第一電源線。各第一導電接墊對應且電性連接於各驅動元件之第二端。第二導電接墊電性連接第二電源線。兩個發光元件基板分別電性連接於對應的一個畫素電路。各發光元件基板包括基板、至少三個發光元件、至少三個第一連接墊以及第二連接墊。三個發光元件位於基板上，且分別具有第一連接端以及第二連接端。三個第一連接墊分別電性連接對應的一個發光元件的第一連接端。第二連接墊電性連接三個發光元件的第二連接端，且各第一連接墊與第二連接墊相互分隔開來。多個第一連接元件，分別電性連接對應的一個第一導電接墊至對應的一個第一連接墊。多個第二連接元件，分別電性連接對應的一個第二導電接墊至對應的一個第二連接墊。
基於上述，本發明可以降低顯示裝置之製程難度，並改善顯示裝置生產良率不足的問題。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
以下將以圖式揭露本發明之多個實施方式，為明確說明，許多實務上的細節將在以下敘述中一併說明。然而，應瞭解的是，這些實務上的細節不應用被以限制本發明。也就是說，在本發明部分實施方式中，這些實務上的細節是非必要的。此外，為簡化圖式起見，一些習知的結構與元件在圖式中將省略或以簡單示意的方式為之。
在整個說明書中，相同的附圖標記表示相同或類似的元件。在附圖中，為了清楚起見，放大了層、膜、面板、區域等的厚度。應當理解，當諸如層、膜、區域或基板的元件被稱為在另一元件「上」或「連接到」另一元件時，其可以直接在另一元件上或與另一元件連接，或者所述元件與所述另一元件中間可以也存在其他元件。相反，當元件被稱為「直接在另一元件上」或「直接連接到」另一元件時，所述元件與所述另一元件中間不存在其他元件。如本文所使用的，「連接」可以指物理及/或電性連接。再者，二元件互相「電性連接」或「耦合」”係可為二元件間存在其它元件。
應當理解，儘管術語「第一」與「第二」等在本文中可以用於描述各種元件、部件、區域、層及/或部分，但是這些元件、部件、區域、及/或部分不應受這些術語的限制。這些術語僅用於將一個元件、部件、區域、層或部分與另一個元件、部件、區域、層或部分區分開。
本文使用的術語僅僅是為了描述本發明特定的實施例，而不是用來限制本發明。舉例來說，本文使用的「一」、「一個」和「該」並非限制元件為單數形式或複數形式。本文使用的「或」表示「及/或」。如本文所使用的，術語「及/或」包括一個或多個相關所列項目的任何和所有組合。還應當理解，當在本說明書中使用時，術語「包括」或「包含」指定所述特徵、區域、整體、步驟、操作、元件的存在及/或部件，但不排除一個或多個其它特徵、區域、整體、步驟、操作、元件、部件及/或其組合的存在或添加。
此外，諸如「下」或「底部」和「上」或「頂部」的相對術語可在本文中用於描述一個元件與另一元件的關係，如圖所示。應當理解，相對術語旨在包括除了圖中所示的方位之外的裝置的不同方位。例如，如果一個附圖中的裝置翻轉，則原本被描述為在元件的「下」側的其他元件將變成被定向在元件的「上」側。因此，取決於附圖的特定取向，示例性術語「下」可以包括「下」和「上」的取向。類似地，如果一個附圖中的裝置翻轉，則被描述為原本在元件「下」或「下方」的其他元件將變成被定向為在其它元件「上方」。因此，示例性術語「下」或「下方」可以包括上方和下方的取向。
本文使用的「約」或「實質上」包括所述值和在本領域普通技術人員確定的特定值的可接受的偏差範圍內的平均值，考慮到所討論的測量和與測量相關的誤差的特定數量(即，測量系統的限制)。例如，「約」可以表示在所述值的一個或多個標準偏差內，或±30％、±20％、±10％、±5％內。再者，本文使用的「約」或「實質上」可依光學性質、蝕刻性質或其它性質，來選擇較可接受的偏差範圍或標準偏差，而可不用一個標準偏差適用全部性質。
除非另有定義，本文使用的所有術語(包括技術和科學術語)具有與本發明所屬領域的普通技術人員通常理解的相同的含義。將進一步理解的是，諸如在通常使用的字典中定義的那些術語應當被解釋為具有與它們在相關技術和本發明的上下文中的含義一致的含義，並且將不被解釋為理想化的或過度正式的意義，除非本文中明確地這樣定義。
圖1A~圖1D是依照本發明的一實施例的一種顯示裝置的製造方法的上視示意圖。
請先參考圖1A，於生長基板GS上形成多個發光元件LED。
請參考圖1B，利用巨量轉移技術將生長基板GS上之多個發光元件LED轉置於基板B上。需注意的是，圖1B省略繪示了基板B上之部分構件。
請參考圖1C，切割基板B及部分位於其上之構件，以形成多個基板B’。雖然在圖1C中，以每個發光元件基板LS具有三個發光元件LED為例，但本發明不以此為限。發光元件基板LS包括三個發光元件LED，也可以說發光元件基板LS具有三個以上之發光元件LED。每個發光元件LED，較佳地，可為微型發光元件。微型發光元件之尺寸例如小於100微米，較佳地，小於50微米，但大於0微米。微型發光元件可例如是有機發光元件或無機發光元件，較佳地，可為無機發光元件，但不限於此。微型發光元件之結構可為P-N二極體、P-I-N二極體、或其它合適的結構。微型發光元件可為有機材料(例如：有機高分子發光材料、有機小分子發光材料、有機配合物發光材料、或其它合適的材料、或前述材料之組合)、無機材料(例如：鈣鈦礦材料、稀土離子發光材料、稀土螢光材料、半導體發光材料、或其它合適的材料、或前述材料之組合)、或其它合適的材料、或前述材料之組合。
在一些實施例中，將發光元件LED轉置於基板B上之後，還會於基板B上形成擋牆、連接墊、或其他合適的構件、或前述元件至少一者，接著才切割基板B，但本發明不以此為限。於一些實施例中，將發光元件LED轉置於基板B上之前，會先在基板B上形成擋牆、連接墊、或其他合適的構件、或前述元件至少一者。
在一些實施例中，切割基板B之前或切割基板B之後可選擇性的對轉置後之發光元件LED進行檢測，以確定發光元件LED是否對位正確。
請參考圖1D，將多個發光元件基板LS置於陣列基板AS上以完成顯示裝置10。在本實施例中，發光元件基板LS藉由陣列基板AS之至少一訊號線SL(例如：訊號線SL1以及訊號線SL2)而電性連接至驅動電路DC1以及驅動電路DC2。於一實施例中，驅動電路DC1及驅動電路DC2其中至少一者或者是整合驅動電路DC1與DC2之驅動電路可位於多個發光元件LED之間。於其它實施例中，驅動電路DC1或DC2可為晶片壓合於陣列基板AS上或者是製造陣列基板時，一起製作的電路。
圖2是沿著圖1D剖面線11’的剖面示意圖。圖3是依照本發明的一實施例的一種顯示裝置的局部電路示意圖。圖3例如是圖2之顯示裝置的局部電路示意圖。請參考圖2與圖3，陣列基板AS包括載板110以及主動元件層120。
主動元件層120位於載板110上且其可包括至少兩個畫素電路PX、第一電源線PL1、第二電源線PL2、多個第一導電接墊CP1以及多個第二導電接墊CP2。各畫素電路PX包括多個子畫素電路SP、多個第一導電接墊CP1以及至少一個第二導電接墊CP2。在較佳的實施例中，各畫素電路PX包括至少三個子畫素電路SP、至少三個第一導電接墊CP1以及至少一個第二導電接墊CP2。雖然圖2之剖面圖是以主動元件層120包括六個第一導電接墊CP1以及六個第二導電接墊CP2為例，但本發明不以此為限。在一些實施例中，較佳地，主動元件層120上包括六個第一導電接墊CP1以及兩個第二導電接墊CP2，可提升後續發光元件基板LS與主動元件層120對位之容計度。然而，本發明不限於前述之第一導電接墊CP1及/或第二導電接墊CP2之個數。
在陣列基板AS中，每個子畫素電路SP至少包含驅動元件T1、切換元件T2、至少二訊號線SL(例如：訊號線SL1及訊號線SL2)。驅動元件T1與切換元件T2分別具有第一端SD1、第二端SD2與控制端GA。驅動元件T1之控制端GA電性連接於切換元件T2，例如：驅動元件T1之控制端GA電性連接於切換元件T2之第二端SD2。在本實施例中，驅動元件T1之控制端GA透過切換元件T2而電性連接於訊號線SL1及訊號線SL2，例如：驅動元件T1之控制端GA分別透過切換元件T2之控制端GA與第一端SD1而電性連接於訊號線SL1及訊號線SL2，但不限於此。訊號線SL1及訊號線SL2例如可分別為資料線及掃描線，但不限於此。驅動元件T1之第一端SD1電性連接於第一電源線PL1。在本實施例中，驅動元件T1與切換元件T2之電晶體的極性可例如為P型薄膜電晶體，但本發明不以此為限。在本實施例中，每個子畫素電路SP還可包含電容CA，電容CA的一端電性連接於驅動元件T1之控制端GA，例如：電容CA的一端電性連接於驅動元件T1之控制端GA與切換元件T2之第二端SD2，且電容CA的另一端電性連接於第一電源線PL1以及驅動元件T1之第一端SD1。
於一實施例中，依照驅動元件T1與切換元件T2之電晶體的極性可例如為N型薄膜電晶體，且可參閱圖4，圖4是依照本發明的一實施例的一種顯示裝置的局部電路示意圖。在此必須說明的是，圖4的實施例沿用圖3的實施例的元件標號與部分內容，其中採用相同或近似的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，在此不贅述。在本實施例中，驅動元件T1之第一端SD1電性連接於第一電源線PL3。電容CA的一端電性連接於驅動元件T1之控制端GA，例如：電容CA的一端電性連接於驅動元件T1之控制端GA與切換元件T2之第二端SD2，且電容CA的另一端電性連接於第一電源線PL3以及驅動元件T1之第一端SD1。於其它實施例中，驅動元件T1與切換元件T2之電晶體的極性其中一者可例如為N型薄膜電晶體，驅動元件T1與切換元件T2之電晶體的極性其中另一者可例如為P型薄膜電晶體。
此外，可將前述實施例之驅動元件T1、切換元件T2與電容CA簡稱為二個主動元件與一個電容(可表示為2T1C)。於其他實施例中，每個子畫素電路SP也可包含其他的主動元件，且每個子畫素電路SP所包含之驅動元件T1、切換元件T2以及其他的主動元件與電容之個數可依設計變更，而可例如被簡稱為三個主動元件和一個或兩個電容（可表示為3T1C/2C）、四個主動元件和一個或兩個電容（可表示為4T1C/2C）、五個主動元件和一個或兩個電容（可表示為5T1C/2C）、六個主動元件和一個或兩個電容（可表示為6T1C/2C）、或是其他適合的電路配置。
於本實施例中，各第一導電接墊CP1對應且電性連接於各驅動元件T1之第二端SD2。第二導電接墊CP2電性連接第二電源線PL2(參閱圖3)或第二電源線PL4(參閱圖4)。
請參考圖2、圖3及圖4，在一些實施例中，陣列基板AS更包括絕緣層130。絕緣層130覆蓋各畫素電路PX的三個子畫素電路SP，各畫素電路PX的第一導電接墊CP1分別透過絕緣層130的第一開口H1電性連接於對應的一個驅動元件T1之第二端SD2，且各畫素電路PX的第二導電接墊CP2透過絕緣層130的第二開口H2電性連接於第二電源線PL2(參閱圖3)或第二電源線PL4(參閱圖4)。
兩個發光元件基板LS分別電性連接於對應的一個畫素電路PX中之子畫素電路SP。在本實施例中，每個發光元件基板LS電性連接於對應的至少三個子畫素電路SP。發光元件基板LS包括基板B’、多個發光元件LED、多個第一連接墊P1以及多個第二連接墊P2。多個發光元件LED可以包括實質上相同或不同顏色之發光二極體，例如包括紅色發光二極體、綠色發光二極體及藍色發光二極體。雖然圖2是以發光元件基板LS包括三個第一連接墊P1以及三個第二連接墊P2為例，但本發明不以此為限。在一些實施例中，較佳地，發光元件基板LS上包括三個第一連接墊P1以及一個第二連接墊P2，可提升後續發光元件基板LS與主動元件層120對位之容計度。然而，本發明不限於前述之第一導電接墊CP1及/或第二導電接墊CP2之個數與位置。兩個發光元件基板LS之間具有一空隙G，但本發明不以此為限。換句話說，每個發光元件基板LS所對應之畫素電路PX所佔據的面積可以大於單個發光元件基板LS的面積，但本發明不以此為限。
至少三個發光元件LED位於基板B’上，且分別具有第一連接端E1以及第二連接端E2。在本實施例中，發光元件LED是水平式發光二極體，第一連接端E1以及第二連接端E2例如對應發光元件LED不同極性之半導體層，第一連接端E1以及第二連接端E2可以是發光元件LED不同極性之半導體層的一部分，亦可以是連接至發光元件LED不同極性之半導體層的電極。在本實施例中，發光元件LED的第一連接端E1以及第二連接端E2朝向對應的基板B’，因此發光元件LED可以輕易的電性連接至第一連接墊P1以及第二連接墊P2。
多個第一連接墊P1，分別電性連接於對應的發光元件LED的第一連接端E1。多個第二連接墊P2，分別電性連接於對應的發光元件LED的第二連接端E2。在一些較佳的實施例中，每個發光元件LED的第二連接端E2皆連接至實質上相同的共用電壓，因此每個發光元件LED的第二連接端E2可以電性連接至同一個第二連接墊P2。從另一方面觀之，一個第二連接墊P2可以電性連接至少三個發光元件LED的第二連接端E2。各第一連接墊P1與第二連接墊P2相互分隔開來。在一些實施例中，第一連接墊P1與第二連接墊P2其中至少一者可為單層或多層結構，且其材料包括導電膠、銲料、非透明導電材料、透明或半透明導電材料、或其他合適的導電材料，但本發明不以此為限。非透明導電材料包含金屬、合金、或其它合適的材料、前述材料之氧化物、前述材料之氮化物、前述材料之氮氧化物、或前述至少二種材料之組合。透明或半透明導電材料包含銦錫氧化物、銦鋅氧化物、銦鎵鋅氧化物、銦鎵氧化物、厚度小於60埃之金屬或合金、奈米碳管/桿、或其它合適的材料、或前述至少二種材料之組合。
在本實施例中，發光元件基板LS之發光元件LED藉由陣列基板AS驅動。發光元件基板LS可不包括驅動發光元件LED之元件，例如：主動元件，因此，發光元件基板LS的重工成本較低。
多個第一連接元件CE1，分別電性連接於對應的一個第一導電接墊CP1至對應的一個第一連接墊P1。多個第二連接元件CE2，分別電性連接對應的一個第二導電接墊CP2至對應的一個第二連接墊P2。第一連接元件CE1與第二連接元件CE2其中至少一者可為單層或多層結構，且其材料，較佳地，包括導電膠、銲料、或其他合適的導電材料，但不限於此。於其它實施例中，非透明導電材料、透明或半透明導電材料、或被前述至少一者之導電材料包覆之絕緣突柱(絕緣突柱往載板110延伸)、或其他合適的導電材料。非透明導電材料包含金屬、合金、或其它合適的材料、前述材料之氧化物、前述材料之氮化物、前述材料之氮氧化物、或前述至少二種材料之組合。透明或半透明導電材料包含銦錫氧化物、銦鋅氧化物、銦鎵鋅氧化物、銦鎵氧化物、厚度小於60埃之金屬或合金、奈米碳管/桿、或其它合適的材料、或前述至少二種材料之組合。絕緣突柱可為單層或多層結構，且其材料包含有機材料、無機材料、或其它合適的材料。
基於上述，由於發光元件LED是位於發光元件基板LS中，可以直接選擇將發光元件LED在轉置過程後有正確對位之發光元件基板LS電性連接至陣列基板AS。即使發光元件LED在轉置過程後沒有正確對位，頂多需要對發光元件基板LS進行重工。因此，相較於直接利用巨量轉移技術將發光元件LED轉置於陣列基板AS上，顯示裝置10可以有較高的生產良率。
圖5是依照本發明的一實施例的一種顯示裝置的剖面示意圖。在此必須說明的是，圖5的實施例沿用圖2的實施例的元件標號與部分內容，其中採用相同或近似的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，在此不贅述。
圖5之顯示裝置20與圖2之顯示裝置10的主要差異在於，發光元件LED有不同的設置方式。請參考圖5，顯示裝置20之發光元件LED藉由黏著層AL固定於基板B’上。各發光元件LED的第一連接端E1以及第二連接E2端朝向該陣列基板AS。
在本實施例中，先將發光元件LED轉置於基板B’上且經由黏著層AL固定於基板B’上以後，才於發光元件LED上形成多個第一連接墊P1以及多個第二連接墊P2。多個第一連接墊P1，分別電性連接於對應的發光元件LED的第一連接端E1。多個第二連接墊P2分別電性連接於對應的發光元件LED的第二連接端E2。在本實施例中，第一連接墊P1與第二連接墊P2可為單層或多層結構，且其材料例如包括非透明導電材料、透明或半透明導電材料或其他合適的導電材料。非透明導電材料包含金屬、合金、或其它合適的材料、前述材料之氧化物、前述材料之氮化物、前述材料之氮氧化物、或前述至少二種材料之組合。透明或半透明導電材料包含銦錫氧化物、銦鋅氧化物、銦鎵鋅氧化物、銦鎵氧化物、厚度小於60埃之金屬或合金、奈米碳管/桿、或其他合適的材料、或前述至少二種材料之組合。
在本實施例中，若發光元件LED的發光方向例如朝向陣列基板AS的載板110。陣列基板AS可選擇性的更包括位於發光元件LED的發光方向上的偏光板PL。舉例而言，偏光板PL位於載板110之表面(例如：外表面)，藉此降低環境光對顯示裝置20之顯示品質的影響，但不限於此。使用者係觀看載板110之外表面或偏光板PL外表面，而不是觀看基板B’的外表面，因此，載板110之外表面或偏光板PL外表面可視為顯示面。
此外，本實施例之偏光板PL亦可運用於前述實施例中，例如圖2中。若偏光板PL運用於圖2之發光元件LED，且圖2之發光元件LED的發光方向例如朝向發光元件基板LS的基板B’，則偏光板PL設置於基板B’之表面(例如：外表面)，且使用者係觀看基板B’之外表面或偏光板PL之外表面，而不是觀看陣列基板AS的載板110之外表面，此時基板B’之外表面或偏光板PL之外表面可視為顯示面。若偏光板PL運用於圖2之發光元件LED，且圖2之發光元件LED的發光方向例如朝向陣列基板AS的載板110，則偏光板PL設置於載板110之表面(例如：外表面)，且使用者係觀看載板110之外表面或偏光板PL之外表面，而不是觀看發光元件基板LS的基板B’之外表面，此時載板110之外表面或偏光板PL外表面可視為顯示面。
基於上述，由於發光元件LED是位於發光元件基板LS中，可以直接選擇將發光元件LED在轉置過程後有正確對位之發光元件基板LS電性連接至陣列基板AS。即使發光元件LED在轉置過程後沒有正確對位，頂多需要對發光元件基板LS進行重工。因此，相較於直接利用巨量轉移技術將發光元件LED轉置於陣列基板AS上，顯示裝置20可以有較高的生產良率。
圖6是依照本發明的一實施例的一種顯示裝置的剖面示意圖。在此必須說明的是，圖6的實施例沿用圖2的實施例的元件標號與部分內容，其中採用相同或近似的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，在此不贅述。圖6之顯示裝置30與圖2之顯示裝置10的主要差異在於，發光元件LED有不同的設置方式。請參考圖6，顯示裝置30之發光元件LED例如為垂直式發光二極體，各發光元件LED的第一連接端E1與第二連接端E2中的一者朝向對應的基板B’，且各發光元件LED的第一連接端E1與第二連接端E2中的另一者朝向陣列基板AS。在本實施例中，各發光元件LED的第一連接端E1朝向對應的基板B’，且第二連接端E2朝向陣列基板AS。在一些實施例中，發光元件LED的表面可具有暴露出第一連接端E1與第二連接端E2的絕緣層IL。
在本實施例中，將發光元件LED轉置於基板B’上，並使發光元件LED之第一連接端E1電性連接至對應的第一連接墊P1。接著形成連接結構I於發光元件LED上，以使發光元件LED之第二連接端E2電性連接至對應的第二連接墊P2。
基於上述，由於發光元件LED是位於發光元件基板LS中，可以直接選擇將發光元件LED在轉置過程後有正確對位之發光元件基板LS電性連接至陣列基板AS。即使發光元件LED在轉置過程後沒有正確對位，頂多需要對發光元件基板LS進行重工。因此，相較於直接利用巨量轉移技術將發光元件LED轉置於陣列基板AS上，顯示裝置30可以有較高的生產良率。
圖7是依照本發明的一實施例的一種顯示裝置的剖面示意圖。在此必須說明的是，圖7的實施例沿用圖5的實施例的元件標號與部分內容，其中採用相同或近似的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，在此不贅述。圖7之顯示裝置40與圖5之顯示裝置20的主要差異在於，主動元件層120有不同的設置方式。
在本實施例中，主動元件層120包括對應各發光元件LED的光穿透區TR。子畫素電路SP中的導線、主動元件及被動元件例如未設置於光穿透區TR中。藉由光穿透區TR的設計，可以提升顯示裝置40的發光效率。於部份實施例中，光穿透區TR中可設置色彩轉換層(未繪示)，可更為改善顯示裝置40各色之色純度或色飽合度。
基於上述，由於發光元件LED是位於發光元件基板LS中，可以直接選擇將發光元件LED在轉置過程後有正確對位之發光元件基板LS電性連接至陣列基板AS。即使發光元件LED在轉置過程後沒有正確對位，頂多需要對發光元件基板LS進行重工。因此，相較於直接利用巨量轉移技術將發光元件LED轉置於陣列基板AS上，顯示裝置40可以有較高的生產良率。
圖8A是依照本發明的一實施例的一種顯示裝置的上視示意圖。圖8B是沿著圖8A剖面線22’的剖面示意圖，其中圖8B繪示了發光元件LED及遮光層BM，並省略繪示其他構件。在此必須說明的是，圖8A與圖8B的實施例沿用圖2的實施例的元件標號與部分內容，其中採用相同或近似的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，在此不贅述。
請參考圖8A與圖8B，顯示裝置50更包括遮光層BM。遮光層BM設置於至少兩個發光元件基板LS上且遮蔽至少兩個發光元件基板LS之間的空隙G。遮光層BM具有多個開口O分別暴露出發光元件基板LS之發光元件LED。
在本實施例中，遮光層BM設置於基板SB上，一個基板SB對應多個發光元件基板LS設置。多個發光元件基板LS位於基板SB以及陣列基板AS之間。在本實施例中，基板SB與發光元件基板LS之間可選擇性的更具有支撐構件ST，支撐構件ST例如對應遮光層BM設置，但本發明不以此為限。
在本實施例中，顯示裝置50可選擇性的更包括第一色彩轉換元件X1。第一色彩轉換元件X1位於發光元件基板LS上，且發光元件LED的發光方向朝向各發光元件基板LS之基板B’。在一些實施例中，第一色彩轉換元件X1可以包括紅色濾光元件、綠色濾光元件及藍色濾光元件，且不同顏色的濾光元件可分別對應不同的發光元件LED設置。舉例而言，若三個子畫素分別為紅色子畫素、綠色子畫素與藍色子畫素，則第一色彩轉換元件X1包括分別對應於紅色子畫素、綠色子畫素及藍色子畫素的紅色濾光元件、綠色濾光元件及藍色濾光元件，且各色子畫素的發光元件可分別選擇為紅光、藍光或綠光之發光元件。於部份實施例中，各色子畫素的發光元件可選擇白光，則可經由前述第一色彩轉換元件X1的紅色濾光元件、綠色濾光元件及藍色濾光元件來顯示出不同的色彩。於其它實施例中，各色子畫素的發光元件可選擇藍光及/或紫外光，則可經由前述第一色彩轉換元件X1的紅色轉換元件、綠色轉換元件及藍色轉換元件來顯示出不同的色彩。若，發光元件LED之光色為藍光，則藍色轉換元件也可依選擇而不設置。
在本實施例中，顯示裝置50可選擇性的更包括第二色彩轉換元件X2。第二色彩轉換元件X2位於發光元件基板LS上，且第二色彩轉換元件X2位於第一色彩轉換元件X1與發光元件LED之間。在一些實施例中，第二色彩轉換元件X2可以包括紅色量子點材料、綠色量子點材料及藍色量子點材料，且不同顏色的量子點材料可分別對應不同的發光元件LED設置。此時，發光元件LED可選用為紫外光或藍光之發光元件。於其他實施例，顯示裝置50也可選擇性的更包括第二色彩轉換元件X2且不包括第一色彩轉換元件X1。第二色彩轉換元件X2位於發光元件基板LS上，發光元件LED可選用為紫外光或藍光之發光元件。若，發光元件LED之光色為藍光，則藍色量子點材料也可依選擇而不設置。
基於上述，由於發光元件LED是位於發光元件基板LS中，可以直接選擇將發光元件LED在轉置過程後有正確對位之發光元件基板LS電性連接至陣列基板AS。即使發光元件LED在轉置過程後沒有正確對位，頂多需要對發光元件基板LS進行重工。因此，相較於直接利用巨量轉移技術將發光元件LED轉置於陣列基板AS上，顯示裝置50可以有較高的生產良率。
圖9A是依照本發明的一實施例的一種畫素電路的上視示意圖。圖9B是依照本發明的一實施例的一種發光元件基板的上視示意圖。在此必須說明的是，圖9A與圖9B的實施例沿用圖2的實施例的元件標號與部分內容，其中採用相同或近似的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，在此不贅述。
請參考圖9A，各畫素電路PX包括至少三個子畫素電路SP、至少三個第一導電接墊CP1以及一個第二導電接墊CP2。請參考圖2、圖3與圖9A，各畫素電路的第一導電接墊CP1分別透過絕緣層130的第一開口H1電性連接於對應的一個驅動元件T1之第二端SD2，且各畫素電路PX的第二導電接墊CP2透過絕緣層130的第二開口H2電性連接於第二電源線PL2。在本實施例中，每個子畫素電路SP具有一個第一開口H1以及一個第二開口H2，但本發明不以此為限。相鄰兩個子畫素電路SP之間具有節距S1。畫素電路PX的寬度約等於三倍的節距S1。在本實施例中，兩相鄰之子畫素電路SP之間具有邊界，第一導電接墊CP1其中至少一者及/或第二導電接墊CP2與兩相鄰之子畫素電路SP之間的邊界部份重疊。
請參考圖9B，各發光元件基板LS包括基板B’、至少三個發光元件LED、至少三個第一連接墊P1以及第二連接墊P2。在本實施例中，各發光元件基板LS包括至少一個發光單元LU，每個發光單元LU包括至少三個發光區L，每個發光區L中具有至少一個發光元件LED。發光區L的寬度約等於相鄰兩個發光元件LED的節距S2。發光單元LU的寬度約等於三倍的節距S2。
在本實施例中，相鄰兩個發光元件LED的節距S2小於相鄰兩個子畫素電路之間的節距S1，也就是說發光單元LU的寬度小於畫素電路PX的寬度。藉此，在製造發光元件基板LS的過程中，切割載板時可以有較寬的切割道CR，且每個發光元件LED所對應之子畫素電路SP具有較大的線路佈局空間。
圖10是依照本發明的一實施例的一種畫素電路的上視示意圖。在此必須說明的是，圖10的實施例沿用圖9A與圖9B的實施例的元件標號與部分內容，其中採用相同或近似的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，在此不贅述。
在本實施例中，兩相鄰的畫素電路PX之間具有佈線空間LO。在一些實施例中，第一電源線PL1與第二電源線PL2的至少其中一者，位於兩個畫素電路PX之間的佈線空間LO中。
在一些實施例中，相鄰兩個發光元件LED的節距S2約等於相鄰兩個子畫素電路之間的節距S1，也就是說發光單元LU的寬度約等於畫素電路PX的寬度。
藉由將第一電源線PL1與第二電源線PL2的至少其中一者設置於位於兩個畫素電路PX之間，可以減少第一電源線PL1與第二電源線PL2對顯示裝置之發光效率所造成的影響。
圖11是依照本發明的一實施例的一種顯示裝置的局部剖面示意圖。在此必須說明的是，圖11的實施例沿用圖6的實施例的元件標號與部分內容，其中採用相同或近似的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，在此不贅述。
請參考圖3與圖11，在本實施例中，陣列基板AS包括載板110以及主動元件層120。主動元件層120位於載板110上，且包括至少兩個畫素電路PX、第一電源線與第二電源線(例如：第一電源線PL1與第二電源線PL2)，其中圖11省略繪示了陣列基板AS的的部分構件。各畫素電路PX包括至少三個子畫素電路SP、至少三個第一導電接墊CP1以及第二導電接墊CP2。每個子畫素電路PX至少包含驅動元件T1、切換元件T2及訊號線SL。
請參考圖3與圖11，在本實施例中，驅動元件T1具有半導體通道層CH、第一端SD1、第二端SD2與控制端GA。半導體通道層CH重疊於控制端GA，且與控制端GA之間夾有絕緣層GI。驅動元件T1之控制端GA電性連接於訊號線SL（例如：訊號線SL1及訊號線SL2）及切換元件T2。絕緣層ILD覆蓋絕緣層GI，驅動元件T1之第一端SD1與第二端SD2貫穿絕緣層GI以及絕緣層ILD，並電性連接至半導體通道層CH。驅動元件T1之第一端SD1電性連接於第一電源線PL1。絕緣層130覆蓋絕緣層ILD。第一導電接墊CP1位於絕緣層130上，且藉由絕緣層130第一開口H1而電性連接至驅動元件T1之第二端SD2。第二導電接墊CP2位於絕緣層130上，且藉由絕緣層130第二開口H2而電性連接至第二電源線PL2(可參閱圖2與圖9A)。
在一些實施例中，陣列基板AS還可以選擇性包括絕緣層140、接墊CP1a以及接墊CP2a。絕緣層140覆蓋絕緣層130，並暴露出第一導電接墊CP1以及第二導電接墊CP2。接墊CP1a以及接墊CP2a位於絕緣層140上，且分別電性連接至第一導電接墊CP1以及第二導電接墊CP2。
陣列基板AS還可以選擇性包括第一導電層M1以及第二導電層M2。第一導電層M1可例如與驅動元件T1之控制端GA屬於同一導電膜層，第二導電層M2可例如與驅動元件T1之第一端SD1與第二端SD2屬於同一導電膜層，但本發明不以此為限。第一導電層M1以及第二導電層M2例如可作為訊號線、電源線、電容或其他構件。
在本實施例中，陣列基板AS更包括多個第一色彩轉換元件X1。第一色彩轉換元件X1對應各發光元件基板LS之該發光元件LED設置。舉例來說，三個第一色彩轉換元件X1對應三個發光元件LED設置。
發光元件基板LS電性連接於對應的畫素電路PX。各發光元件基板LS包括基板B’、至少三個發光元件LED、至少三個第一連接墊P1以及第二連接墊P2。發光元件LED位於基板B’上。在本實施例中，發光元件LED為垂直式發光二極體，發光元件LED具有堆疊的第一連接端E1、半導體層SM1、發光層EL、半導體層SM2以及第二連接端E2。發光元件LED藉由黏著層AL固定於基板B’上。在一些實施例中，黏著層AL與基板B’之間具有對位標記MK，對位標記MK可用於轉置發光元件LED時，作為瞄準的標記。
至少三個第一連接墊P1分別電性連接對應的發光元件LED的第一連接端E1。第二連接墊P2電性連接三個發光元件LED的第二連接端E2，且各第一連接墊E1與第二連接墊E2相互分隔開來。圖11中雖然繪出了三個分離的第二連接墊P2，但實際上電性連接至三個發光元件LED的第二連接端E2互連在一起，也可以說發光元件基板LS的一個第二連接端E2對應了三個發光元件LED。
發光元件基板LS可選擇性的更包括三個擋牆D1，各擋牆D1對應且設置於各發光元件LED之至少一部份。各發光元件LED對應之第一連接墊P1的一部份以及各發光元件LED對應之第二連接墊P2的一部份設置於各發光元件LED對應之擋牆的一部份上。在一些實施例中，較佳地，擋牆D1環繞發光元件LED，但不限於此。在一些實施例中，較佳地，位於擋牆D1之第一連接墊P1以及第二連接墊P2也可作為反射層，使發光元件LED發出的光線更集中。
在本實施例中，擋牆D1上可選擇性的還包括絕緣層D2，接墊P1a以及接墊P2a位於絕緣層D2上，且分別電性連接至第一連接墊P1以及第二連接墊P2。在本實施例中，第一連接元件CE1藉由接墊P1a電性連接對應的第一連接墊P1。在本實施例中，第二連接元件CE2藉由接墊P2a電性連接對應的第二連接墊P2。
多個第一連接元件CE1分別電性連接於對應的一個第一導電接墊CP1至對應的一個第一連接墊P1。多個第二連接元件CE2分別電性連接對應的一個第二導電接墊CP2至對應的一個第二連接墊P2。於一實施例中，擋牆D1係往載板110內表面延伸，可使得第一連接墊P1的一部份與第二連接墊P2的一部份較接近於第一導電接墊CP1以及第二導電接墊CP2或者是接墊P1a以及接墊P2a較接近於第一導電接墊CP1與第二導電接墊CP2，可減少第一連接元件CE1與第二連接元件CE2使用量。更甚而，可讓不同基板上的第一連接墊P1較容易經由第一連接元件CE1接觸第一導電接墊CP1，且第二連接墊P2較容易經由第二連接元件CE2接觸第二導電接墊CP2，以改善連接穩定性。
各發光元件基板LS上可選擇性的更包括三個第二色彩轉換元件X2。第二色彩轉換元件X2位於三個發光元件LED以及三個第一色彩轉換元件X1之間。在一些實施例中，第一色彩轉換元件X1可以包括紅色濾光元件、綠色濾光元件及藍色濾光元件，且不同顏色的濾光元件可分別對應不同的發光元件LED設置。在一些實施例中，第二色彩轉換元件X2可以包括紅色量子點材料、綠色量子點材料及藍色量子點材料，且不同顏色的量子點材料可分別對應不同的發光元件LED設置。在本實施例中，發光元件LED的發光方向朝向陣列基板AS。於一實施例中，顯示裝置可選擇性的更包含位於發光元件LED的發光方向上的偏光板PL。舉例而言，偏光板PL位於載板110之外表面，但不限於此。因此，使用者係觀看載板110之外表面或偏光板PL外表面，而不是觀看基板B’的外表面，此時載板110之外表面或偏光板PL外表面可視為顯示面。
圖12是依照本發明的一實施例的一種顯示裝置的局部剖面示意圖。在此必須說明的是，圖12的實施例沿用圖11的實施例的元件標號與部分內容，其中採用相同或近似的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，在此不贅述。
圖12之實施例與圖11之實施例的主要差異在於發光元件基板LS的發光元件LED不同。
請參考圖12，在本實施例中，發光元件LED為水平式發光二極體，發光元件LED的第一連接端E1以及第二連接端E2朝向基板B’。在本實施例中，發光元件LED具有堆疊的半導體層SM1、發光層EL以及半導體層SM2。發光元件LED表面具有絕緣層IL，絕緣層IL暴露出部分半導體層SM1以及半導體層SM2第一連接端E1以及第二連接端E2分別電性連接至半導體層SM1以及半導體層SM2。
在本實施例中，發光元件LED藉由黏著層AL固定於基板B’上，黏著層AL例如為異方性導電膠，且能傳導流通方向垂直於基板B’法線方向的電流。在本實施例中，發光元件LED的第一連接端E1以及第二連接端E2藉由黏著層AL電性連接至對位標記MK，再藉由對位標記MK而分別電性連接至第一連接墊P1以及第二連接墊P2。
再者，前述實施例中，驅動元件T1、切換元件T2與其它主動元件其中至少一者可採用薄膜電晶體（TFT），例如底閘型電晶體、頂閘型電晶體、立體型電晶體、或其它合適的電晶體。底閘型的電晶體之閘極位於半導體層之下方，頂閘型電晶體之閘極位於半導體層之上方，而立體型電晶體之半導體層通道延伸非位於一平面。半導體層可為單層或多層結構，且其材料包含非晶矽、微晶矽、奈米晶矽、多晶矽、單晶矽、有機半導體材料、氧化物半導體材料、奈米碳管/桿、鈣鈦礦材料、或其它合適的材料或前述之組合。前述實施例中，偏光板PL可為一般偏光膜、多個實質上平行之柵狀結構、或其它合適結構的偏光板。
綜上所述，由於發光元件是位於發光元件基板中，可以直接選擇將發光元件在轉置過程後有正確對位之發光元件基板電性連接至陣列基板。即使發光元件在轉置過程後沒有正確對位，頂多需要對發光元件基板進行重工。因此，相較於直接利用巨量轉移技術將發光元件轉置於陣列基板上，顯示裝置可以有較高的生產良率。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
10、20、30、40、50‧‧‧顯示裝置110‧‧‧載板120‧‧‧主動元件層AL‧‧‧黏著層AS‧‧‧陣列基板B、B’‧‧‧基板BM‧‧‧遮光層CA‧‧‧電容CE1‧‧‧第一連接元件CE2‧‧‧第二連接元件CP1‧‧‧第一導電接墊CP2‧‧‧第二導電接墊CP1a、CP2a、P1a、P2a‧‧‧接墊CR‧‧‧切割道D‧‧‧第二端D1‧‧‧擋牆D2、2IL、GI、ILD、130、140‧‧‧絕緣層DC1、DC2‧‧‧驅動電路E1‧‧‧第一連接端E2‧‧‧第二連接端EL‧‧‧發光層G‧‧‧空隙GA‧‧‧控制端GS‧‧‧生長基板H1‧‧‧第一開口H2‧‧‧第二開口I‧‧‧連接結構LED‧‧‧發光元件L‧‧‧發光區LO‧‧‧佈線空間LS‧‧‧發光元件基板LU‧‧‧發光單元M1‧‧‧第一導電層M2‧‧‧第二導電層MK‧‧‧對位標記O‧‧‧開口P1‧‧‧第一連接墊P2‧‧‧第二連接墊PL‧‧‧偏光板PL1、PL3‧‧‧第一電源線PL2、PL4‧‧‧第二電源線PX‧‧‧畫素電路S‧‧‧第一端SB‧‧‧基板S1、S2‧‧‧節距SL、SL1、SL2‧‧‧訊號線SM1、SM2‧‧‧半導體層SP‧‧‧子畫素電路ST‧‧‧支撐構件T1‧‧‧驅動元件T2‧‧‧切換元件X1‧‧‧第一色彩轉換元件X2‧‧‧第二色彩轉換元件
圖1A~圖1D是依照本發明的一實施例的一種顯示裝置的製造方法的上視示意圖。 圖2是沿著圖1D剖面線11’的剖面示意圖。 圖3是依照本發明的一實施例的一種顯示裝置的局部電路示意圖。 圖4是依照本發明的一實施例的一種顯示裝置的局部電路示意圖。 圖5是依照本發明的一實施例的一種顯示裝置的剖面示意圖。 圖6是依照本發明的一實施例的一種顯示裝置的剖面示意圖。 圖7是依照本發明的一實施例的一種顯示裝置的剖面示意圖。 圖8A是依照本發明的一實施例的一種顯示裝置的上視示意圖。 圖8B是沿著圖8A剖面線22’的剖面示意圖。 圖9A是依照本發明的一實施例的一種畫素電路的上視示意圖。 圖9B是依照本發明的一實施例的一種發光元件基板的上視示意圖。 圖10是依照本發明的一實施例的一種畫素電路的上視示意圖。 圖11是依照本發明的一實施例的一種顯示裝置的局部剖面示意圖。 圖12是依照本發明的一實施例的一種顯示裝置的局部剖面示意圖。
10‧‧‧顯示裝置
AS‧‧‧陣列基板
DC1、DC2‧‧‧驅動電路
LS‧‧‧發光元件基板
SL、SL1、SL2‧‧‧訊號線

Claims (17)

  1. 一種顯示裝置，包括： 一陣列基板，包括： 一載板； 一主動元件層，位於該載板上，且包括兩個畫素電路、一第一電源線與一第二電源線，其中各該畫素電路包括： 至少三個子畫素電路，每個子畫素電路包含一驅動元件、一切換元件及一訊號線，且該驅動元件具有一第一端、一第二端與一控制端，該驅動元件之該控制端電性連接於該訊號線及該切換元件，且該驅動元件之該第一端電性連接於該第一電源線； 至少三個第一導電接墊，各該第一導電接墊對應且電性連接於各該驅動元件之該第二端；以及 一第二導電接墊，電性連接該第二電源線； 至少兩個發光元件基板，分別電性連接於對應的一個該畫素電路，各該發光元件基板包括： 一基板； 至少三個發光元件，位於該基板上，且分別具有一第一連接端以及一第二連接端； 至少三個第一連接墊，分別電性連接對應的一個該發光元件的該第一連接端；以及 一第二連接墊，電性連接該至少三個發光元件的該第二連接端，且各該第一連接墊與該第二連接墊相互分隔開來； 多個第一連接元件，分別電性連接對應的一個該第一導電接墊至對應的一個該第一連接墊；以及 多個第二連接元件，分別電性連接對應的一個該第二導電接墊至對應的一個該第二連接墊。
  2. 如申請專利範圍第1項所述的顯示裝置，其中該至少兩個發光元件基板不包括主動元件。
  3. 如申請專利範圍第1項所述的顯示裝置，其中各該發光元件的該第一連接端以及該第二連接端朝向對應的該基板。
  4. 如申請專利範圍第1項所述的顯示裝置，其中各該發光元件的該第一連接端以及該第二連接端朝向該陣列基板。
  5. 如申請專利範圍第1項所述的顯示裝置，其中各該發光元件的該第一連接端與該第二連接端中的一者朝向對應的該基板，且各該發光元件的該第一連接端與該第二連接端中的另一者朝向該陣列基板。
  6. 如申請專利範圍第1項所述的顯示裝置，其中該至少兩個發光元件基板之間具有一空隙。
  7. 如申請專利範圍第6項所述的顯示裝置，更包括一遮光層，設置於該至少兩個發光元件基板上且遮蔽該空隙，其中該遮光層具有多個開口分別暴露出該至少兩個發光元件基板之該至少三個發光元件。
  8. 如申請專利範圍第1項所述的顯示裝置，其中該主動元件層包括對應各該發光元件的一光穿透區。
  9. 如申請專利範圍第1項所述的顯示裝置，更包括一偏光板，位於該載板上，且該至少三個發光元件的發光方向朝向該載板。
  10. 如申請專利範圍第1項所述的顯示裝置，其中該陣列基板更包括多個第一色彩轉換元件，對應各該發光元件基板之該至少三個發光元件設置，且該至少三個發光元件的發光方向朝向該陣列基板。
  11. 如申請專利範圍第10項所述的顯示裝置，其中各該發光元件基板上更包括多個第二色彩轉換元件，位於該至少三個發光元件以及該些第一色彩轉換元件之間。
  12. 如申請專利範圍第1項所述的顯示裝置，其中各該發光元件基板更包括三個擋牆，各該擋牆對應且設置於各該發光元件之至少一部份。
  13. 如申請專利範圍第12項所述的顯示裝置，其中各該發光元件對應之該第一連接墊以及各該發光元件對應之該第二連接墊的一部份設置於各該發光元件對應之該擋牆的一部份上。
  14. 如申請專利範圍第1項所述的顯示裝置，更包括一色彩轉換元件，位於該至少兩個發光元件基板上，且該至少三個發光元件的發光方向朝向各該發光元件基板之該基板。
  15. 如申請專利範圍第1項所述的顯示裝置，其中該第一電源線與該第二電源線的至少其中一者，位於該兩個畫素電路之間。
  16. 如申請專利範圍第1項所述的顯示裝置，其中該陣列基板更包括一絕緣層，覆蓋各該畫素電路的該至少三個子畫素電路，各該畫素電路的該至少三個第一導電接墊分別透過該絕緣層的至少三個第一開口電性連接於對應的一個該驅動元件之該第二端，且各該畫素電路的該第二導電接墊透過該絕緣層的一第二開口電性連接於該第二電源線。
  17. 如申請專利範圍第1項所述的顯示裝置，其中兩相鄰之該些子畫素電路之間具有一邊界，該至少三個第一導電接墊其中至少一者及/或該第二導電接墊與該邊界部份重疊。
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