TW201831991A - 蝕刻方法及基板處理系統 - Google Patents

蝕刻方法及基板處理系統 Download PDF

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TW201831991A
TW201831991A TW106143304A TW106143304A TW201831991A TW 201831991 A TW201831991 A TW 201831991A TW 106143304 A TW106143304 A TW 106143304A TW 106143304 A TW106143304 A TW 106143304A TW 201831991 A TW201831991 A TW 201831991A
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etching
layer
breakthrough
treatment
main etching
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TWI745504B (zh
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黃祖虹
林軍
折居武彥
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日商東京威力科創股份有限公司
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Abstract

本發明提供一種可防止由基板所製造的元件受到損傷之蝕刻方法。
該蝕刻方法係對表層形成有矽氧化膜之晶圓施予將該矽氧化膜加以去除之第1突破處理，在第1突破處理後會施予將多晶矽層加以蝕刻之第1主蝕刻處理，在第1主蝕刻處理後會施予將露出的矽氧化膜加以去除之第2突破處理，在第2突破處理後會施予將殘餘的多晶矽層加以蝕刻之第2主蝕刻處理。

Description

蝕刻方法及基板處理系統
本發明係關於一種蝕刻方法及實行該方法之基板處理系統。
電子元件製造用之具有特定圖案的晶圓(以下稱作「圖案晶圓」。)中，會有多晶矽層的表面存在有因CMP(Chemical Mechanical Polishing)處理等而產生的矽氧化膜情況。由於矽氧化膜在蝕刻多晶矽層時會作為遮罩而作用，阻礙到多晶矽層的蝕刻，故在多晶矽層的蝕刻前會先對圖案晶圓施予為了去除矽氧化膜之蝕刻處理。將上述般為了去除矽氧化膜之蝕刻處理稱作突破處理。
在已施有突破處理之圖案晶圓中，雖會接續著突破處理而施予為了去除多晶矽層之蝕刻處理(以下稱作「主蝕刻處理」。)，但在主蝕刻處理中仍會有多晶矽層未被完全去除的情況，而在圖案晶圓殘留有矽所構成的殘渣。
為了去除上述般的殘渣，在多晶矽層幾乎被去除後，仍會進行持續主蝕刻處理之過蝕刻處理。又，亦已被提出有一種在主蝕刻處理後，為了去除殘渣而進行電漿清潔氣體的導入(參閱例如專利文獻1。)，或為了使殘渣變質為水溶性來加以去除而對圖案晶圓施予氣體電漿處理(參閱例如專利文獻2。)之方法。
[先前技術文獻]
[專利文獻]
專利文獻1：日本特表平7-508313號公報
專利文獻2：日本特開平11-260785號公報
然而，若是進行過蝕刻處理，或是主蝕刻處理後之電漿清潔氣體的導入或氣體電漿處理，便會有電子元件受到損傷之虞。
本發明之目的為提供一種可防止由基板所製造的元件受到損傷之蝕刻方法及基板處理系統。
為達成上述目的，本發明之蝕刻方法係將形成於電子元件製造用基板的被處理層加以去除之蝕刻方法，具有以下處理：第1突破處理，係去除該被處理層表面所形成的氧化膜；第1主蝕刻處理，係在該第1突破處理後蝕刻該被處理層；第2突破處理，係在該第1主蝕刻處理後去除露出的氧化膜；以及第2主蝕刻處理，係在該第2突破處理後蝕刻該被處理層。
為達成上述目的，本發明之基板處理系統係對電子元件製造用基板施予蝕刻處理之基板處理系統，具備有：第1突破單元，係去除該基板之被處理層表面所形成的氧化膜；第1主蝕刻單元，係在該第1突破單元之去除後蝕刻該被處理層；第2突破單元，係在該第1主蝕刻單元之蝕刻後去除露出的氧化膜；以及第2主蝕刻單元，係在該第2突破單元之去除後蝕刻該被處理層。
依據本發明，由於蝕刻被處理層後所露出的氧化膜會被去除，故可防止已進入被處理層之氧化膜在後續被處理層的蝕刻中作為遮罩而作用，從而可防止未被去除之被處理物的產生。亦即，由於可防止殘渣的產生，故可不需在過蝕刻處理或被處理層之蝕刻後進行電漿清潔氣體的導入等，從而可防止由基板所製造之元件受到損傷。
W‧‧‧晶圓
10‧‧‧基板處理系統
13‧‧‧製程模組
28‧‧‧溝槽
29‧‧‧殘渣
31‧‧‧多晶矽層
32‧‧‧矽氧化膜
圖1係概略顯示本發明之實施型態相關的基板處理系統構成之俯視圖。
圖2係顯示傳統的蝕刻方法實行後，所殘留之殘渣的型態之剖視圖。
圖3係用以說明傳統的蝕刻方法中，殘渣的產生機制之工序圖。
圖4係顯示作為本實施型態相關之蝕刻方法的多晶矽層去除方法之工序圖。
圖5係概略顯示習知的多晶矽層去除方法及圖4的多晶矽層去除方法實行後，所觀察到之溝槽底部處的殘渣殘留型態之圖式。
以下，針對本發明之實施型態，參閱圖式來詳細地說明。
圖1係概略顯示本發明之實施型態相關的基板處理系統構成之俯視圖。此外，圖1中，為了容易理解乃穿透內部構成的一部份來加以顯示。
圖1中，基板處理系統10係具備有保管複數晶圓W之晶圓保管部11、可同時搬送2片晶圓W之作為搬送室的轉移模組12、以及對從轉移模組12所搬入之晶圓W施予突破處理或主蝕刻處理之複數製程模組13(第1突破單元、第1主蝕刻單元、第2突破單元、第2主蝕刻單元)。各製程模組13及轉移模組12係內部被維持在真空氛圍。
基板處理系統10中，係藉由轉移模組12所內建之搬送臂14來搬送晶圓保管部11所保管的晶圓W，並將晶圓W一片片地載置於製程模組13內部所配置的各2個台座15。接下來，基板處理系統10中，以製程模組13來對台座15所載置的各晶圓W施予突破處理或主蝕刻處理後，會藉由搬送臂14來將處理後的晶圓W搬出至晶圓保管部11。
晶圓保管部11具有：晶圓匣盒16(保管複數晶圓W的容器)的載置台，即複數載置埠17；會從各載置埠17所載置之晶圓匣盒16來收取所保管的晶圓W，或是將以製程模組13施予特定處理後的晶圓W傳遞至晶圓匣盒16之載置模組18；在載置模組18及轉移模組12之間為了傳遞晶圓W而暫時地保持晶圓W之2個加載互鎖模組19；以及，會將施予PHT處理後的晶圓W予以冷卻之冷卻儲存器20。
載置模組18係由內部為大氣壓氛圍的矩形框體所構成，且構成其矩形長邊之一側面乃並設有複數載置埠17。再者，載置模組18係在內部中具有可移動於其矩形的長邊方向之搬送臂(圖中未顯示)。該搬送臂會從各載置埠 17所載置之晶圓匣盒16來將晶圓W搬入至加載互鎖模組19，或是從加載互鎖模組19將晶圓W搬出至各晶圓匣盒16。
各加載互鎖模組19為了將收納在大氣壓氛圍的各載置埠17所載置之晶圓匣盒16的晶圓W傳遞至內部為真空氛圍之製程模組13，而會暫時地保持晶圓W。各加載互鎖模組19係具有會保持2片晶圓W之緩衝板21。又，各加載互鎖模組19係具有為了相對於載置模組18來確保氣密性之閘閥22a，以及為了相對於轉移模組12來確保氣密性之閘閥22b。再者，加載互鎖模組19係藉由配管而連接有氣體導入系統及氣體排氣系統(圖中未顯示)，則內部便會被控制為大氣壓氛圍或真空氛圍。
轉移模組12會將未處理的晶圓W從晶圓保管部11搬入至製程模組13，並將處理後的晶圓W從製程模組13搬出至晶圓保管部11。轉移模組12係由內部為真空氛圍之矩形框體所構成，包含有：會保持並移動2片晶圓W之2個搬送臂14、可旋轉地支撐各搬送臂14之旋轉台23、搭載了旋轉台23之旋轉載置台24、以及可使旋轉載置台24移動於轉移模組12的長邊方向來加以引導之導軌25。又，轉移模組12係透過閘閥22a、22b，甚至後述的各閘閥26而朝晶圓保管部11的加載互鎖模組19、以及各製程模組13來被加以連接。轉移模組12中，搬送臂14會從加載互鎖模組19來將2片晶圓W朝各製程模組13搬送，並將施予處理後的2片晶圓W從各製程模組13搬出至其他製程模組13或加載互鎖模組19。
基板處理系統10中，各製程模組13會實行突破處理或主蝕刻處理。具體來說，突破處理中，一製程模組13會實行COR(Chemical Oxide Removal)處理，而其他的製程模組13則會實行PHT(Post Heat Treatment)處理。COR處理中，會使被導入至製程模組13內部的處理氣體(例如HF氣體及NH3氣體)吸附在晶圓W，來使存在於多晶矽層表面的矽氧化膜及處理氣體反應而生成生成物，即AFS(氟矽酸銨)。又，PHT處理中，係加熱晶圓W來使生成於晶圓W之AFS氣化而加以去除。此外，COR處理及PHT處理中皆未使用電漿。再者，主蝕刻處理中，一製程模組13係藉由自處理氣體所生成之電漿，例如自F2氣體所生成之電漿中的氟自由基來蝕刻晶圓W的多晶 矽層。此外，主蝕刻處理中，除了F2氣體以外，亦會將NH3氣體或N2氣體朝一製程模組13的內部導入。亦包含了該等突破處理或主蝕刻處理中的動作，基板處理系統10之各構成要素的動作係藉由控制器27而依據特定的程式來受到控制。
圖2係顯示傳統的蝕刻方法實行後，所殘留之殘渣的型態之剖視圖。
對晶圓W施予傳統的突破處理及主蝕刻處理時，如圖2所示，確認到會有多晶矽層被去除而形成的構造，例如，溝槽28的底部部分地殘留有矽的殘渣29。此時，即便溝槽28的底部形成有複數鰭部30，殘渣29仍會無關於各鰭部30的位置而殘留。
有關對晶圓W施予突破處理及主蝕刻處理後會殘留有矽的殘渣之理由，本案發明人推測了以下的機制。具體來說，在晶圓W中形成多晶矽層31(被處理層)後，若對包含有該多晶矽層31之晶圓W的表層施予CMP處理，則多晶矽層31的矽與研磨劑或大氣中的氧便會反應，而在晶圓W的表層形成矽氧化膜32。此處，多晶矽層31的表面附近容易產生矽的晶粒(塊)，矽氧化膜32會進入各晶粒的邊界(圖3(A))。
之後，若對晶圓W施予突破處理，由於形成於晶圓W表層的矽氧化膜32可接觸到處理氣體，故雖會變質為AFS而被去除，但由於進入各晶粒的間隙之矽氧化膜32不易接觸到處理氣體，故不會變質為AFS而殘留(圖3(B))。
接下來，若對晶圓W施予主蝕刻處理，則進入各晶粒的間隙之矽氧化膜32雖會隨著多晶矽層31的蝕刻進展而露出，但該露出的矽氧化膜32會作為氧化膜遮罩33而作用，便會部分地阻礙到後續多晶矽層31的蝕刻。亦即，多晶矽層31中，被氧化膜遮罩33覆蓋之部分的蝕刻率與未被氧化膜遮罩33覆蓋之部分的蝕刻率之間會產生無法忽視的差異，導致多晶矽層31無法被一致地蝕刻(圖3(C))。其結果，縱使多晶矽層31幾乎被去除，仍會對應於被氧化膜遮罩33覆蓋之部分而產生矽的殘渣29(圖3(D))。
特別是，各晶粒的間隙會無關於各鰭部30的位置而產生，由於各氧化膜遮罩33係對應於各晶粒的間隙般而產生，故各殘渣29便會無關於各鰭 部30的位置而殘留，且對應於各晶粒的間隙般而產生。本發明之實施型態中，係依據上述機制來對晶圓W施予突破處理及主蝕刻處理以去除各氧化膜遮罩33。
圖4係顯示作為本實施型態相關之蝕刻方法的多晶矽層去除方法之工序圖。
首先，對表層形成有矽氧化膜32之晶圓W施予第1突破處理(圖4(A))。此時，係將實行COR處理之製程模組13內部的壓力設定為例如300mTorr，將HF氣體之朝製程模組13內部的導入量設定為例如140sccm~160sccm，將NH3氣體之朝製程模組13內部的導入量設定為例如140sccm~160sccm，且將第1突破處理設定為例如40秒~90秒。第1突破處理中，由於形成於晶圓W表層的矽氧化膜32會接觸到處理氣體，故雖會變質為AFS而被去除，但由於進入各晶粒的間隙之矽氧化膜32不易接觸到處理氣體，故不會變質為AFS而殘留(圖4(B))。
接下來，對晶圓W施予第1主蝕刻處理。此時，係將實行第1主蝕刻處理之製程模組13內部的壓力設定為例如1Torr~1.6Torr，將F2氣體之朝製程模組13內部的導入量設定為例如300sccm~1050sccm，將NH3氣體之朝製程模組13內部的導入量設定為例如10sccm~35sccm，將N2氣體之朝製程模組13內部的導入量設定為例如180sccm~210sccm，且將晶圓W的溫度設定為例如80℃~120℃。由於第1主蝕刻處理的實行時間設定為較短，故僅有多晶矽層31的表面附近會被蝕刻，結果，則進入各晶粒的間隙之矽氧化膜32便會露出，而在多晶矽層31的表面處形成各氧化膜遮罩33(圖3(C))。
接下來，對晶圓W施予第2突破處理(圖4(C))。此時之COR處理的實行條件雖係設定為與第1突破處理的實行條件相同，但由於多晶矽層31表面的各氧化膜遮罩33會接觸到處理氣體，故會變質為AFS而被去除(圖4(D))。
接下來，對晶圓W施予第2主蝕刻處理。此時的實行條件雖係設定為與第1主蝕刻處理的實行條件相同，但實行時間係設定為較第1主蝕刻處理的實行時間要來得長。於是，第2主蝕刻處理中多晶矽層31的蝕刻量便 多於第1主蝕刻處理中多晶矽層31的蝕刻量。此時亦與第1主蝕刻處理相同地，多晶矽層31雖會被蝕刻，但由於第2突破處理中各氧化膜遮罩33會被去除，故多晶矽層31的蝕刻便不會部分地受到阻礙，多晶矽層31會一致地被蝕刻。其結果，在多晶矽層31被去除後，便不會有殘渣29部分地殘留在溝槽28的底部(圖4(E))。此外，第2主蝕刻處理中，係交互地進行多晶矽層31的蝕刻與從製程模組13的內部之排氣，來抑制被蝕刻而飄浮在製程模組13內部的矽化合物等去阻礙到後續多晶矽層31的蝕刻。
依據上述多晶矽層的去除方法，由於僅有蝕刻多晶矽層31的表面附近後所露出的矽氧化膜32會被去除，故可防止進入多晶矽層31之各晶粒的間隙之矽氧化膜32會在多晶矽層31之表面附近的蝕刻後露出，而作為氧化膜遮罩33加以作用，從而可防止第2主蝕刻處理中有殘渣29部分地殘留在溝槽28的底部。於是，便可不需在過蝕刻處理或多晶矽層31之蝕刻後進行電漿清潔氣體的導入等，從而可防止由晶圓W所製造之元件受到損傷。
又，上述多晶矽層的去除方法中，第2主蝕刻處理中多晶矽層31的蝕刻量係多於第1主蝕刻處理中多晶矽層31的蝕刻量。亦即，第1主蝕刻處理中多晶矽層31的蝕刻量係少於第2主蝕刻處理中多晶矽層31的蝕刻量。若第1主蝕刻處理中多晶矽層31的蝕刻量很多，雖會有露出的矽氧化膜32在第1主蝕刻處理中作為遮罩而作用，導致多晶矽層31的形狀不整齊之虞，但藉由減少第1主蝕刻處理中多晶矽層31的蝕刻量，則縱使讓進入多晶矽層31之各晶粒的間隙之矽氧化膜32露出，仍可消除該矽氧化膜32在第1主蝕刻處理中作為遮罩而作用之機會，從而便可防止第1主蝕刻處理中多晶矽層31的形狀不整齊。
以上，有關於本發明，雖已使用上述實施型態來加以說明，但本發明並未限定於上述實施型態。
例如，上述多晶矽層的去除方法中，雖係分別實行2次突破處理及主蝕刻處理，但突破處理或主蝕刻處理的實行次數不限於上述次數，例如，亦可交互地實行突破處理及主蝕刻處理3次以上。特別是，多晶矽層31表 面附近處的晶粒分佈會被多晶矽層31的成膜條件左右，例如，若急速地生成多晶矽層31，則會有很多數量的晶粒產生，而有各晶粒的邊界到達多晶矽層31的深部之情況。上述般情況，可藉由交互地實行突破處理及主蝕刻處理3次以上，來使朝向到達多晶矽層31的深部之各晶粒的邊界進入之矽氧化膜32露出而去除，從而，便可確實地防止殘渣29部分地殘留在溝槽28的底部。
又，不僅是矽氧化膜32進入至多晶矽層31之各晶粒的邊界之情況，且亦可將本發明應用於例如，矽氮化膜或碳進入至各晶粒的邊界之情況，此情況下，係交互地實行用以去除矽氮化膜或碳之蝕刻處理及主蝕刻處理2次以上。再者，在主蝕刻處理中被蝕刻之膜亦不限於多晶矽層31，只要是表層有可能產生晶粒之矽氮化層或金屬層(例如鈷膜)，則藉由應用本發明，便可防止殘渣的發生。
又，本發明之目的亦可藉由對基板處理系統10所具備的裝置控制器27供應記錄有能夠實現上述實施型態的功能之軟體的程式碼之記憶媒體，控制器27的CPU會讀取並實行儲存在記憶媒體之程式碼來達成。
此情況下，從記憶媒體所讀取之程式碼本身會實現上述實施型態的功能，而程式碼及記憶有該程式碼之記憶媒體則構成了本發明。
又，作為用以供應程式碼之記憶媒體，只要是例如，RAM、NV-RAM、軟(Floppy，註冊商標)碟、硬碟、磁光碟、CD-ROM、CD-R、CD-RW、DVD(DVD-ROM、DVD-RAM、DVD-RW、DVD+RW)等之光碟、磁帶、非揮發性記憶卡、其他的ROM等之可記憶上述程式碼者即可。抑或，上述程式碼亦可藉由從連接於網際網路、商用網路或區域網路等之未圖示的其他電腦或資料庫等來下載，而供應至控制器27。
又，不僅是藉由控制器27實行所讀取之程式碼，來實現上述實施型態的功能，而亦包含有CPU上所稼動之OS(作業系統)等會依據該程式碼的指示來進行實際處理的一部分或全部，而藉由該處理來實現上述實施型態的功能之情況。
再者，亦包含有從記憶媒體所讀取之程式碼被寫入插入至控制器27之 功能擴張板或連接於控制器27之功能擴張單元所具備的記憶體後，該功能擴張板或功能擴張單元所具備之CPU等會依據該程式碼的指示來進行實際處理的一部分或全部，而藉由該處理來實現上述實施型態的功能之情況。
上述程式碼的型態亦可由藉由目的碼(object code)、解譯器(interpreter)所實行之程式碼、供應至OS之腳本資料(script data)等的型態所構成。
【實施例】
接下來，針對本發明之實施例來加以說明。
首先，針對形成有多晶矽層31之晶圓W來進行3種各實施1次突破處理及主蝕刻處理之習知的多晶矽層去除方法。各多晶矽層的去除方法中，係調整主蝕刻處理的實行條件，而將該主蝕刻處理中多晶矽層31的蝕刻量設定為1500Å(第1比較例)、7000Å(第2比較例)及10000Å(第3比較例)。實行各多晶矽層的去除方法後，從上方來觀察晶圓W，而觀察溝槽28的底部處之殘渣29的殘留型態，並概略地顯示於圖5。
又，針對形成有多晶矽層31之晶圓W來進行6種各實施2次突破處理及主蝕刻處理之圖4的多晶矽層去除方法。各多晶矽層的去除方法中，係調整第1主蝕刻處理的實行條件，而將該主蝕刻處理中多晶矽層31的蝕刻量設定為1500Å(第1實施例)、2000Å(第2實施例)、2500Å(第3實施例)、3500Å(第4實施例)、4000Å(第5實施例)及10000Å(第6實施例)。再者，與各比較例相同地，在實行各多晶矽層的去除方法後，從上方來觀察晶圓W，而觀察溝槽28的底部處之殘渣29的殘留型態，並概略地顯示於圖5。此外，圖5中，係將習知的多晶矽層去除方法顯示為「無重複」，而將圖4的多晶矽層去除方法顯示為「有重複」。
如圖5所示，第1比較例~第3比較例中皆有殘渣29部分地殘留在溝槽28的底部。此被認為係因為如上述機制所示，在1次突破處理中，無法將進入多晶矽層31之各晶粒的間隙之矽氧化膜32加以去除，則該矽氧化膜32便會作為氧化膜遮罩33而作用，導致阻礙多晶矽層31的蝕刻之緣故。
另一方面，第1實施例~第6實施例中皆無殘渣29部分地殘留在溝槽28的底部之情況。此被認為係因為進入至因第1主蝕刻處理而露出之各晶 粒的間隙之矽氧化膜32會在第2突破處理中被去除，而未在後續的第2主蝕刻處理中作為氧化膜遮罩33來加以作用的緣故。但第1實施例中確認到溝槽28底部的形狀有些許不整齊。此被認為係因為第1主蝕刻處理中多晶矽層31的蝕刻量為較少的1500Å，有若干的矽氧化膜32殘留在多晶矽層31，而在第2主蝕刻處理中作為微量的氧化膜遮罩33來加以作用，結果，多晶矽層31便不會被略均勻地蝕刻，導致溝槽28底部的形狀有些許不整齊的緣故。因此，可得知第1主蝕刻處理中多晶矽層31的蝕刻量較佳宜設定為2000Å以上。

Claims (7)

  1. 一種蝕刻方法，係將形成於電子元件製造用基板的被處理層加以去除之蝕刻方法，具有以下處理：第1突破處理，係去除該被處理層表面所形成的氧化膜；第1主蝕刻處理，係在該第1突破處理後蝕刻該被處理層；第2突破處理，係在該第1主蝕刻處理後去除露出的氧化膜；以及第2主蝕刻處理，係在該第2突破處理後蝕刻該被處理層。
  2. 如申請專利範圍第1項之蝕刻方法，其中該第1主蝕刻處理中該被處理層的蝕刻量係少於該第2主蝕刻處理中該被處理層的蝕刻量。
  3. 如申請專利範圍第1或2項之蝕刻方法，其中該第1主蝕刻處理中，該被處理層的蝕刻量係設定為2000Å以上。
  4. 如申請專利範圍第1或2項之蝕刻方法，其另具有：第3突破處理，係在該第2主蝕刻處理後去除露出的氧化膜；以及第3主蝕刻處理，係在該第3突破處理後蝕刻該被處理層。
  5. 如申請專利範圍第1或2項之蝕刻方法，其中該第1突破處理及該第2突破處理中，係使用HF氣體及NH 3氣體來作為處理氣體；該第1主蝕刻處理及該第2主蝕刻處理中，係使用至少F 2氣體來作為處理氣體。
  6. 如申請專利範圍第1或2項之蝕刻方法，其中該被處理層為矽層、矽氮化層及金屬層中任一者。
  7. 一種基板處理系統，係對電子元件製造用基板施予蝕刻處理之基板處理系統，具備有：第1突破單元，係去除該基板之被處理層表面所形成的氧化膜；第1主蝕刻單元，係在該第1突破單元之去除後蝕刻該被處理層；第2突破單元，係在該第1主蝕刻單元之蝕刻後去除露出的氧化膜；以及第2主蝕刻單元，係在該第2突破單元之去除後蝕刻該被處理層。
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