TW201505111A - 打線結構之製法 - Google Patents

打線結構之製法 Download PDF

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TW201505111A
TW201505111A TW102126231A TW102126231A TW201505111A TW 201505111 A TW201505111 A TW 201505111A TW 102126231 A TW102126231 A TW 102126231A TW 102126231 A TW102126231 A TW 102126231A TW 201505111 A TW201505111 A TW 201505111A
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pad
wire
ball end
bonding structure
path
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TW102126231A
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TWI541920B (zh
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林偉勝
洪隆棠
葉孟宏
謝智倫
朱育德
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矽品精密工業股份有限公司
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Priority to TW102126231A priority Critical patent/TWI541920B/zh
Priority to CN201310325428.9A priority patent/CN104347439B/zh
Priority to US14/085,981 priority patent/US9289846B2/en
Publication of TW201505111A publication Critical patent/TW201505111A/zh
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/002—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating specially adapted for particular articles or work
    • B23K20/004—Wire welding
    • B23K20/005—Capillary welding
    • B23K20/007—Ball bonding
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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

一種打線結構之製法，係先提供具有銲墊之基板，再於該銲墊之表面上以磨擦(scrubbing)方式形成銲線之球端，且磨擦方式之進行係依環繞該銲墊表面周緣之路徑為之。本發明之製法係以繞圈方式形成該球端，故能避免較小尺寸之球端由該銲墊上脫落之問題發生。

Description

打線結構之製法
本發明係關於一種半導體製程，特別是關於一種打線結構之製法。
於現有的半導體封裝技術中，係藉由打線技術(即透過金線或銅線等)將銲線由晶片電性連接至如導線架或封裝基板之承載件，該承載件再藉由如銲球之導電元件電性連接至如電路板之外部裝置。
習知打線技術(wire bonding)可藉由超音速振動狀態，由鋼嘴形成最初球體在半導體裝置或承載件上，以進行球端加壓(lst ball bond)作業，使銲墊表面與球端相互固接，再由該球體延伸線體至另一半導體裝置或承載件之銲墊表面上，以進行另一加壓(2nd bond)作業，最後再以鋼嘴將多餘之銲線剪斷。
如第1A圖所示，係為打線結構1之剖面示意圖，於進行打線製程之球端加壓作業時，先利用超音速振動裝置(圖略)並配合磨擦(scrubbing)作業形成一銲線12之球端12a於一基板10之銲墊11上，待加壓該球端12a以使該球 端12a固接於該銲墊11上後，再拉伸該銲線12。
於進行磨擦作業時，係於形成線料(即該球端12a)時能同時去除生產該基板10過程中所產生的微粒及有機薄膜，而習知技術所採用的磨擦方式係利用該超音速振動裝置以縱向(即Y方向)與橫向(即X方向)的移動路徑將線料形成在該銲墊11之表面上，以形成該球端12a，如第1B圖所示。
習知磨擦方式雖可去除生產過程中所產生的微粒及有機薄膜，但由於習知的銲墊11的面積較大(如銲墊11之寬度d為40微米(um)以上)，故採用上述的方式磨擦形成該球端12a並不會有太大問題。
然而，現今的半導體裝置的製程不斷的朝向體積化更高的製程演進，因此，線路亦朝細線路、細間距之方向做設計，致使該銲墊11之寬度d隨之縮小。當該銲墊11之寬度d縮小至40微米(um)以下時，該銲線12之球端12a的體積亦需縮小，使得該球端12a接合於銲墊11的面積因而減小，而在此情況下，若採用習知磨擦方式形成該球端12a，將容易造成該球端12a由該銲墊11上脫落之掉球問題。
再者，形成該銲線12之線材(如銅、金)較硬，若打線至極薄之基板(如晶片)上，由於極薄之基板是非常脆弱，故以習知磨擦方式形成該球端12a，容易造成該銲墊11碎裂。
因此，如何克服上述習知技術的種種問題，實已成目 前亟欲解決的課題。
鑑於上述習知技術之缺失，本發明係提供一種打線結構之製法，係包括：提供一具有複數銲墊之基板；以及於至少一該銲墊之表面上以磨擦方式形成銲線之球端，且磨擦方式之進行係依環繞該銲墊之表面周緣之路徑為之
前述之製法中，該銲墊之寬度係小於40微米。
前述之製法中，該磨擦方式之路徑係為順時鐘方向或逆時鐘方向。
前述之製法中，該磨擦方式之路徑係先由該銲墊之表面中心向該銲墊之表面周緣移動，再環繞該銲墊之表面周緣。
前述之製法中，形成該銲線之材質係為銅、銀或金。
前述之製法中，復包括於形成該球端後，壓固該球端於該銲墊上。
另外，前述之製法中，復包括於形成該球端後，由該球端延伸形成銲線之線體。
由上可知，本發明之打線結構之製法中，係於該銲墊之表面上環繞該銲墊表面周緣磨擦形成該球端，不僅可有效去除生產過程中所產生的微粒及有機薄膜，且能增加銲接強度以避免該球端由該銲墊上脫落之問題。
再者，藉由本發明之磨擦方式之路徑，若將較硬之線材打線至極薄之基板上，可避免該球端造成該銲墊碎裂之問題。
1,2‧‧‧打線結構
10,20‧‧‧基板
11,21‧‧‧銲墊
12,22‧‧‧銲線
12a,22a‧‧‧球端
22b‧‧‧線體
d,w‧‧‧寬度
L1,L2,L3,L4,S1,S1’,S2,S2’‧‧‧路徑
X,Y‧‧‧方向
第1A圖係為打線結構之剖面示意圖；第1B圖係為習知磨擦作業之磨擦路徑之平面上視示意圖；第2A至2B圖係為本發明打線結構之製法之剖面示意圖；以及第3A、3A’、3B及3B’圖係為本發明磨擦方式之磨擦路徑之平面上視示意圖。
以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時，本說明書中所引用之如“上”及“一”等之用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。
第2A至2B圖係為打線結構2之製法之剖面示意圖。
如第2A及3A圖所示，提供一具有至少一銲墊21之 基板20，再於該銲墊21之表面上利用超音速振動裝置(圖略)以磨擦方式形成一球端22a，且磨擦路徑係為繞著對應該銲墊21表面周緣(如第3A圖所示之繞圈路徑S1)。
如第2B圖所示，壓固該球端22a於該銲墊21上，再由該球端22a延伸形成一線體22b，以形成由該球端22a與線體22b所構成之銲線22。
於本實施例中，該基板20可為封裝基板或導電架，且該銲墊21可為電性接觸墊或導腳，而形成該銲線22之材質係為銅、銀或金。
再者，該銲墊21之寬度w係小於40微米(um)。
又，如第3A圖所示，該磨擦路徑係先由該銲墊21之表面中心向右朝該銲墊21之邊緣移動，且略呈上弧線路線(如弧線路徑L1)，以當該超音速振動裝置移動至該球端22a之預定周緣時，順勢以順時鐘方向移動(如繞圈路徑S1)或轉成逆時鐘方向移動(如第3A’圖所示繞圈路徑S1’)，以形成該球端22a。於其它實施例中，該磨擦路徑亦可向左呈下弧線路線朝該銲墊21之邊緣移動(如弧線路徑L2)。
另外，有關該超音速振動裝置之定位設定，由於該超音速振動裝置之初始輸出方向為Y方向，故於磨擦過程中，可將該超音速振動裝置之輸出方向以偏橫向方向(即X方向)作補償，以使磨擦後之球端22a之底面(即接觸該銲墊21之接合面)趨近正圓形。
於另一實施例中，如第3B圖所示，該磨擦路徑亦可 先由該銲墊21之表面中心向左朝該銲墊21之邊緣移動，且略呈上弧線路線(如弧線路徑L3)，以當該超音速振動裝置移動至該球端22a之預定周緣時，順勢以逆時鐘方向移動(如繞圈路徑S2)或轉成順時鐘方向移動(如第3B’圖所示繞圈路徑S2’)，以形成該球端22a。或者，向右呈下弧線路線朝該銲墊21之邊緣移動(如弧線路徑L4)，再順勢以逆時鐘方向移動(如繞圈路徑S2)或轉成順時鐘方向移動(如繞圈路徑S2’)。
因此，該弧線路徑L1,L2,L3,L4與該繞圈路徑S1,S2可任意搭配，並無特別限制。
綜上所述，本發明之打線結構之製法，主要藉由繞著對應該銲墊21表面周緣磨擦形成銲線22之球端22a，故當該該銲墊21之尺寸較小時(即寬度小於40微米)，能有效形成該銲線22之球端22a，以避免該球端22a由該銲墊21上脫落。
再者，藉由繞圈方式之磨擦路徑，能分散線材形成於銲墊21上之應力，故即使將較硬之線材打線至極薄之基板20上，該球端22a亦不會造成該銲墊21碎裂。
上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下，對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。
21‧‧‧銲墊
S1,L1,L2‧‧‧路徑
X,Y‧‧‧方向

Claims (8)

  1. 一種打線結構之製法，係包括：提供一具有複數銲墊之基板；以及於至少一該銲墊之表面上以磨擦方式形成銲線之球端，且磨擦方式之進行係依環繞該銲墊之表面周緣之路徑為之。
  2. 如申請專利範圍第1項所述之打線結構之製法，其中，該銲墊之寬度係小於40微米。
  3. 如申請專利範圍第1項所述之打線結構之製法，其中，該磨擦方式之路徑係先由該銲墊之表面中心向該銲墊之表面周緣移動，再環繞該銲墊之表面周緣。
  4. 如申請專利範圍第1項所述之打線結構之製法，其中，該環繞係以順時鐘方向為之。
  5. 如申請專利範圍第1項所述之打線結構之製法，其中，該環繞係以逆時鐘方向為之。
  6. 如申請專利範圍第1項所述之打線結構之製法，其中，形成該銲線之材質係為銅、銀或金。
  7. 如申請專利範圍第1項所述之打線結構之製法，復包括於形成該球端後，壓固該球端於該銲墊上。
  8. 如申請專利範圍第1項所述之打線結構之製法，復包括於形成該球端後，由該球端延伸形成銲線之線體。
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