TWI635593B - 基板結構 - Google Patents

基板結構 Download PDF

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TWI635593B
TWI635593B TW104129755A TW104129755A TWI635593B TW I635593 B TWI635593 B TW I635593B TW 104129755 A TW104129755 A TW 104129755A TW 104129755 A TW104129755 A TW 104129755A TW I635593 B TWI635593 B TW I635593B
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conductive bump
conductive
height
layer
substrate
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TW104129755A
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TW201640637A (zh
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賴杰隆
程呂義
陳佑全
呂長倫
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矽品精密工業股份有限公司
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Priority to TW104129755A priority Critical patent/TWI635593B/zh
Priority to CN201510651571.6A priority patent/CN106098663B/zh
Priority to US14/983,738 priority patent/US9515039B2/en
Publication of TW201640637A publication Critical patent/TW201640637A/zh
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Publication of TWI635593B publication Critical patent/TWI635593B/zh

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Abstract

一種基板結構，係包括：具有複數電性接觸墊之基板本體、設於該電性接觸墊上之第一導電凸塊以及第二導電凸塊，該第二導電凸塊之寬度小於該第一導電凸塊之寬度，藉由該第二導電凸塊相對該基板本體之高度大於該第一導電凸塊相對該基板本體之高度，以於回銲後，補償高度差。

Description

基板結構
本發明係有關一種基板結構，尤指一種具導電凸塊之基板結構。
由於電子元件(如晶片、封裝基板)線寬、線距減縮，故該電子元件之各電性接觸墊之間的間距越來越狹小，且於各該電性接觸墊上形成銲錫凸塊，以經回銲(reflow)後會變成銲錫球。然而，因各該電性接觸墊之間的間距狹小，故會發生相鄰之銲錫球橋接的問題，而造成短路。
因此，遂發展出先於電性接觸墊上形成熔點較高之金屬柱(如銅、鎳)，之後再於該金屬柱上形成少量之銲錫(該銲錫係作為接著層用)，以藉由於回銲時金屬柱不會熔成球狀，故此方式可用於細間距之電性接觸墊上。
習知技術中，各該電性接觸墊之直徑係為相同，使其上之金屬柱之直徑相同，且形成於金屬柱上之銲錫量亦相同，故於回銲後，銲錫球之高度會達到相同高度，即共平面(coplanarity)，以避免電子元件間之接著發生可靠度之問題，其中，共平面的定義係為各凸塊之高度差越小越好。
然而，隨著技術演進，為了同時滿足更多接點(即I/O)與電性探針測試之需求，故需設計較小直徑的電性接觸墊以滿足更多I/O之需求，且需設計較大直徑的電性接觸墊以利於電性探針之接觸，因此，同一電子元件上會有兩種不同大小的電性接觸墊之設計，其中，共平面的需求係為大直徑凸塊之高度與小直徑凸塊之高度間的高度差需小於8um。
如第1A圖所示，習知封裝基板1係包括：一具有複數電性接觸墊100a,100b之基板本體10、分別設於不同之電性接觸墊100a,100b上之第一導電凸塊11以及第二導電凸塊12。該第一導電凸塊11係包含第一銅鎳層110與第一預錫銀層111，使該第一預錫銀層111設於該第一銅鎳層110上，且該第二導電凸塊12係包含第二銅鎳層120與第二預錫銀層121，使該第二預錫銀層121設於該第二銅鎳層120上。其中，各該電性接觸墊100a,100b分有兩種不同直徑之尺寸類型，使該第二導電凸塊12之寬度W小於該第一導電凸塊11之寬度R，且該第二導電凸塊12相對該基板本體10之高度L等於該第一導電凸塊11相對該基板本體10之高度L。
於應用該封裝基板1中，即當該封裝基板1結合晶片(圖略)時，會回銲該第一與第二預錫銀層111,121，使該第一與第二預錫銀層111’,121’變成銲錫球，以結合該晶片，且於回銲時，該第一與第二銅鎳層110,120不會熔成球狀。
惟，因該第一導電凸塊11之寬度R與該第二導電凸塊12之寬度W不同，故厚度相同之第一與第二預錫銀層111,121於回銲後，會造成該第一導電凸塊11相對該基板本體10之高度L’與該第二導電凸塊12相對該基板本體10之高度L”高度不一致，且兩者之高度差大於8um，因而不符合共平面之需求，如第1B圖所示，該第二導電凸塊12相對該基板本體10之高度L”小於該第一導電凸塊11相對該基板本體10之高度L’，如此將使該封裝基板1與晶片間的接著產生可靠度問題。
因此，如何克服上述習知技術之問題，實已成目前亟欲解決的課題。
鑑於上述習知技術之種種缺失，本發明係提供一種基板結構，係包括：基板本體，係具有複數電性接觸墊；第一導電凸塊，係設於其中一部分該電性接觸墊上，並包含至少一種導電材質；以及第二導電凸塊，係設於另一部分該電性接觸墊上，並包含至少一種導電材質，其中，該第二導電凸塊之寬度小於該第一導電凸塊之寬度，且該第二導電凸塊相對該基板本體之高度大於該第一導電凸塊相對該基板本體之高度。
前述之基板結構中，該基板結構係為晶圓、晶片、中介板或封裝基板。
前述之基板結構中，該第一導電凸塊包含之導電材料係第一預銲錫層，形成該第一預銲錫層之材質係包含銅、 鎳、金、錫、銀及其組合之其中一者，且該第二導電凸塊包含之導電材料係第二預銲錫層，形成該第一預銲錫層之材質係包含銅、鎳、金、錫、銀及其組合之其中一者。進一步地，該第一導電凸塊復包含第一金屬層，供該第一預銲錫層形成於該第一金屬層上，且該第二導電凸塊復包含第二金屬層，供該第二預銲錫層形成於該第二金屬層上。例如，該第二金屬層之厚度大於該第一金屬層之厚度；或者，該第一金屬層之熔點高於該第一預銲錫層，且該第二金屬層之熔點高於該第二預銲錫層；或者，該第一金屬層之厚度約佔該第一導電凸塊之厚度為10%至90%，且該第二金屬層之厚度約佔該第二導電凸塊之厚度為10%至90%。
前述之基板結構中，該第一導電凸塊相對該基板本體之高度係為該第二導電凸塊相對該基板本體之高度之10%至90%。
由上可知，本發明之基板結構中，主要藉由第一導電凸塊相對該基板本體的高度小於第二導電凸塊相對該基板本體之高度，以於回銲後，補償高度差，以符合共平面之需求。
1‧‧‧封裝基板
10,20‧‧‧基板本體
100a,100b,200a,200b‧‧‧電性接觸墊
11,21,21’‧‧‧第一導電凸塊
110‧‧‧第一銅鎳層
111,111’‧‧‧第一預錫銀層
12,22,22’‧‧‧第二導電凸塊
120‧‧‧第二銅鎳層
121,121’‧‧‧第二預錫銀層
2,2’‧‧‧基板結構
210‧‧‧第一金屬層
211,211’‧‧‧第一預銲錫層
220‧‧‧第二金屬層
221,221’‧‧‧第二預銲錫層
3,4‧‧‧電子元件
30‧‧‧電性接觸墊
40,40’‧‧‧銲錫凸塊
5‧‧‧連接部
d,d’,h,h’‧‧‧厚度
L,L’,L”,D,D’,H,H’‧‧‧高度
R,W‧‧‧寬度
第1A圖係為習知封裝基板之剖視示意圖；第1B圖係為習知基板結構後續回銲製程後之剖視示意圖；第2A圖係為本發明之基板結構之第一實施例之剖視 示意圖；第2B圖係為本發明之基板結構之第一實施例後續回銲製程後之剖視示意圖；第2B’圖係為本發明之基板結構之第二實施例之剖視示意圖；第3圖係為第2B圖之基板結構進行回銲製程之具體情況之剖視示意圖；以及第4圖係為本發明之基板結構之第二實施例後續回銲製程後之具體情況之剖視示意圖。
以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時，本說明書中所引用之如“上”、“第一”、“第二”及“一”等之用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。
第2A圖係為本發明之基板結構2之第一實施例之剖面示意圖。如第2A圖所示，該基板結構2係包括：一具有複數電性接觸墊200a,200b之基板本體20、分別設於不同之電性接觸墊200a,200b上之第一導電凸塊21以及第二導電凸塊22。
所述之基板結構2係例如晶圓、晶片、矽中介板或封裝基板等。
所述之基板本體20具有兩種不同直徑之尺寸類型的電性接觸墊200a,200b。
所述之第一導電凸塊21係包含兩種以上之導電材質，其包含第一金屬層210與第一預銲錫層211，使該第一預銲錫層211設於該第一金屬層210上。
所述之第二導電凸塊22係包含兩種以上之導電材質，其包含第二金屬層220與第二預銲錫層221，使該第二預銲錫層221設於該第二金屬層220上。
於本實施例中，該第一金屬層210之熔點高於該第一預銲錫層211，且該第二金屬層220之熔點高於該第二預銲錫層221。例如，該第一與第二金屬層210,220之材質係包含銅或鎳，且該第一與第二預銲錫層211,221之材質係包含錫銀。
再者，該第二導電凸塊22之寬度W小於該第一導電凸塊21之寬度R。
又，藉由該第二金屬層220之厚度d大於該第一金屬層210之厚度h，且該第一預銲錫層211之厚度h’等於該 第二預銲錫層221之厚度d’，使該第二導電凸塊22相對該基板本體20之高度D大於該第一導電凸塊21相對該基板本體20之高度H，例如，該第一導電凸塊21相對該基板本體20之高度H係為該第二導電凸塊22相對該基板本體20之高度D之10%至90%。
另外，該第一金屬層210之厚度h約佔該第一導電凸塊21之厚度(即可視為高度H)為10%至90%，且該第二金屬層220之厚度d約佔該第二導電凸塊22之厚度(即可視為高度D)為10%至90%。
當該基板結構2結合電子裝置(圖略)時，會回銲該第一與第二預銲錫層211,221，使該第一與第二導電凸塊21,22結合該電子元件。所述之電子裝置係為線路板、主動元件、被動元件或其二者之組合，其中，該主動元件係例如半導體晶片，該被動元件係例如電阻、電容及電感。
再者，如第2B及3圖所示，於將一電子元件3之電性接觸墊30回銲於該基板結構2之第一與第二導電凸塊21,22上時，該第一預銲錫層211’與該第二預銲錫層221’會成為銲錫體，且經回銲該第一與第二預銲錫層211’,221’而成為銲錫體後，該第二導電凸塊22相對該基板本體20之高度D’幾乎等於該第一導電凸塊21相對該基板本體20之高度H’，例如，兩者之高度差約7.2um，即符合共平面的需求。
於本實施例中，該電子元件3係為主動元件、被動元件、封裝件、矽中介板或封裝基板等。其中，該主動元件 係例如半導體晶片，而該被動元件係例如電阻、電容及電感。
因此，本發明之基板結構2係藉由大直徑凸塊(即第一導電凸塊21)的第一金屬層210之厚度h小於小直徑凸塊(即第二導電凸塊22)的第二金屬層220之厚度d，以於回銲後，利用金屬層之高度差補償不同直徑之球狀第一與第二預銲錫層211’,221’的高度差，而得到高度H’,D’一致的第一與第二導電凸塊21,22。
第2B’圖係為本發明之基板結構2’之第二實施例之剖面示意圖。本實施例與第一實施例之差異在於導電凸塊之變化，故以下不再贅述相同處。
如第2B’圖所示，該第一與第二導電凸塊21’,22’係僅有一種導電材質，如預銲錫層或金屬層，其材質係包含銅、鎳、金、錫、銀及其組合之其中一者。
再者，該第二導電凸塊22’之寬度W小於該第一導電凸塊21’之寬度R，且該第二導電凸塊22’相對該基板本體20之高度D大於該第一導電凸塊21’相對該基板本體20之高度H，例如，該第一導電凸塊21’相對該基板本體20之高度H係為該第二導電凸塊22’相對該基板本體20之高度D之10%至90%。
又，如第4圖所示，於將該基板結構2’之第一與第二導電凸塊21’,22’回銲於一電子元件4之銲錫凸塊40,40’上時，各該銲錫凸塊40,40’經回銲後之高度不同，但藉由該第一導電凸塊21’與該第二導電凸塊22’之高度差進行互 補，使該些連接部5(由該第一與第二導電凸塊21’,22’及該銲錫凸塊40,40’所構成)之高度幾乎一致，即符合共平面的需求。
於本實施例中，該電子元件4係為主動元件、被動元件、封裝件、矽中介板或封裝基板等。其中，該主動元件係例如半導體晶片，而該被動元件係例如電阻、電容及電感。
因此，本發明之基板結構2’係藉由大直徑凸塊(即第一導電凸塊21’)相對該基板本體20之高度H小於小直徑凸塊(即第二導電凸塊22’)相對該基板本體20的高度D，以於回銲後，利用高度差補償不同直徑之銲球的高度差，而得到高度一致的連接部5。
綜上所述，本發明之基板結構中，主要藉由第一導電凸塊相對該基板本體的高度小於第二導電凸塊相對該基板本體之高度，以於回銲後，補償高度差，以符合共平面之需求。
上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下，對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。

Claims (10)

  1. 一種基板結構，係包括：基板本體，係具有複數電性接觸墊；第一導電凸塊，係設於其中一部分該電性接觸墊上，並包含第一導電層；以及第二導電凸塊，係設於另一部分該電性接觸墊上，並包含第二導電層，其中，該第二導電凸塊之寬度小於該第一導電凸塊之寬度，且該第二導電凸塊相對該基板本體之高度大於該第一導電凸塊相對該基板本體之高度，以於回銲後，得到高度一致的第一與第二導電凸塊。
  2. 如申請專利範圍第1項所述之基板結構，其係為晶圓、晶片、中介板或封裝基板。
  3. 如申請專利範圍第1項所述之基板結構，其中，該第一導電層係第一預銲錫層，形成該第一預銲錫層之材質係包含銅、鎳、金、錫、銀及其組合之其中一者，且該第二導電層係第二預銲錫層，形成該第二預銲錫層之材質係包含銅、鎳、金、錫、銀及其組合之其中一者。
  4. 如申請專利範圍第3項所述之基板結構，其中，該第一導電凸塊復包含第一金屬層，供該第一預銲錫層形成於該第一金屬層上，且該第二導電凸塊復包含第二金屬層，供該第二預銲錫層形成於該第二金屬層上。
  5. 如申請專利範圍第4項所述之基板結構，其中，該第 二金屬層之厚度大於該第一金屬層之厚度。
  6. 如申請專利範圍第4項所述之基板結構，其中，該第一金屬層之熔點高於該第一預銲錫層。
  7. 如申請專利範圍第4項所述之基板結構，其中，該第二金屬層之熔點高於該第二預銲錫層。
  8. 如申請專利範圍第4項所述之基板結構，其中，該第一金屬層之厚度約佔該第一導電凸塊之厚度為10%至90%。
  9. 如申請專利範圍第4項所述之基板結構，其中，該第二金屬層之厚度約佔該第二導電凸塊之厚度為10%至90%。
  10. 如申請專利範圍第1項所述之基板結構，其中，該第一導電凸塊相對該基板本體之高度係為該第二導電凸塊相對該基板本體之高度之10%至90%。
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