TW201448152A - 接合用導線 - Google Patents

接合用導線 Download PDF

Info

Publication number
TW201448152A
TW201448152A TW103108465A TW103108465A TW201448152A TW 201448152 A TW201448152 A TW 201448152A TW 103108465 A TW103108465 A TW 103108465A TW 103108465 A TW103108465 A TW 103108465A TW 201448152 A TW201448152 A TW 201448152A
Authority
TW
Taiwan
Prior art keywords
wire
mass
less
bonding
ppm
Prior art date
Application number
TW103108465A
Other languages
English (en)
Other versions
TWI490996B (zh
Inventor
Tsuyoshi Hasegawa
Original Assignee
Tatsuta Densen Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tatsuta Densen Kk filed Critical Tatsuta Densen Kk
Publication of TW201448152A publication Critical patent/TW201448152A/zh
Application granted granted Critical
Publication of TWI490996B publication Critical patent/TWI490996B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C5/00Alloys based on noble metals
    • C22C5/06Alloys based on silver
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/43Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C5/00Alloys based on noble metals
    • C22C5/02Alloys based on gold
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C9/00Alloys based on copper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/43Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/43Manufacturing methods
    • H01L2224/438Post-treatment of the connector
    • H01L2224/43848Thermal treatments, e.g. annealing, controlled cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45139Silver (Ag) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/45565Single coating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/45599Material
    • H01L2224/456Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/45664Palladium (Pd) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48475Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H01L2224/48476Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
    • H01L2224/48477Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
    • H01L2224/48478Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
    • H01L2224/48479Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/4851Morphology of the connecting portion, e.g. grain size distribution
    • H01L2224/48511Heat affected zone [HAZ]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009Pre-treatment of the connector or the bonding area
    • H01L2224/85051Forming additional members, e.g. for "wedge-on-ball", "ball-on-wedge", "ball-on-ball" connections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512Aligning
    • H01L2224/85148Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518Translational movements
    • H01L2224/85186Translational movements connecting first outside the semiconductor or solid-state body, i.e. off-chip, reverse stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85986Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00011Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Wire Bonding (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)

Abstract

本發明係一種銀接合用導線,其較金接合導線廉價且可穩定地進行利用球形接合法與柱形凸塊法之組合之連接。本發明之導線W係以Ag為主成分,將Au之添加量設為0.9質量%以上且2.6質量%以下,將Pd之添加量設為0.1質量%以上且1.5質量%以下,且將Au與Pd之添加量之合計設為1.0質量%以上且3.0質量%以下,且將Au與Pd之添加量之合計設為1.0質量%以上且3.0質量%以下,將選自Ca、稀土類元素中之1種以上之元素設為合計為20質量ppm以上且500質量ppm以下,將選自Cu、Ni中之1種以上之元素設為合計為1000質量ppm以上且10000質量ppm以下。該導線W之0.2%耐力與其拉伸強度之比為90%以上,其電阻率為3.0 μΩ‧cm以下。

Description

接合用導線
本發明係關於一種用於藉由球形接合法及柱形凸塊法之組合將功率IC(Integrated Circuit,積體電路)、LSI(Large Scale Integration,大型積體電路)、電晶體、BGA(Ball Grid Array package,球柵陣列封裝)、QFN(Quad Flat Non lead package,四邊扁平無引線封裝)、LED(發光二極體)等半導體封裝中之半導體元件上之電極彼此或者電極與引線框架、陶瓷基板、印刷基板等電路配線基板之導體配線連接之接合用導線。
上述BGA等半導體封裝例如係如圖1所示,於配線板1上介隔焊錫球2設置封裝基板3,進而於該封裝基板3上介隔黏晶材4設置半導體元件(晶片)5,並藉由密封材6將該半導體元件5密封之構造。該半導體封裝中之半導體元件5之電極a與封裝基板3之導體配線(端子)c之電性連接通常使用球形接合法。
但是,於必須連接電極a彼此之情形時,若直接訂合式接合於電極a,則有電極a被破壞之虞,因此於其中一電極a上設置柱形凸塊,第一接合於另一電極a之後,於設置有柱形凸塊之電極a上進行訂合式接合。
又,於電極a與封裝基板3之導體配線(端子)c之電性連接中,藉由球形接合法進行接合之後,為提高接合可靠性而於訂合式接合部上 設置柱形凸塊(安全接合)。
進而,為實現半導體封裝之低背化,亦於封裝基板3之導體配線(端子)c形成第一接合,於電極a進行訂合式接合,但於該情形時,預先於電極a形成柱形凸塊,於其上進行訂合式接合(逆接合)。
如此,有半導體封裝中之半導體元件5之電極a與封裝基板3之導體配線(端子)c之電性連接利用球形接合法與柱形凸塊法之組合進行接合之情況。
又,作為上述半導體元件之一之LED之封裝例如係如圖2所示,於殼體散熱器11上介隔黏晶材12設置LED15,並藉由混合有螢光體e之密封材14將LED15密封之構造。該封裝中之LED15之電極a與構成電路配線基板之殼體電極13之導體配線(端子)c之電性連接係與BGA等半導體封裝同樣地,藉由上述球形接合法與柱形凸塊法之組合進行。圖中,16為樹脂製殼體。
上述柱形凸塊法中之柱形凸塊例如係以圖3(a)~(f)所示之方式形成。即,自導線W插通於毛細管10a且於其頂端形成有球(FAB:Free Air Ball,無空氣球)b之狀態,打開夾鉗10b,使毛細管10a朝向積體電路元件上之電極a下降。此時,球(FAB)b被捕捉於毛細管10a內。
若熔融球b與作為目標之電極a接觸(若毛細管10a到達電極a),則毛細管10a套住熔融球b,對熔融球b賦予熱、荷重、超音波,藉此熔融球b經壓接(成為壓接球b')而與電極a固相接合之後(該圖(b),打開夾鉗10b,使毛細管10a略微上升。其後,關閉夾鉗10b,藉由各種毛細管10a之動作將導線W自壓接球b'切斷(該圖(c)~(f))。將藉由此種方式製成之壓接球b'稱為柱形凸塊。
關於將該柱形凸塊b'組合於球形接合法之連接方法,例如於逆接合中,經過圖3(a)~(f)所示之態樣之後,如該圖(g)所示,毛細管10a上升至一定高度之後,於確保於該毛細管10a之頂端之導線W之頂端 部分,用放電棒g施加高電壓而進行放電(進行火花放電),利用其熱熔化導線W,該熔化之導線素材藉由表面張力變為接近於球狀之熔融球b而凝固(該圖(g))。
繼而,如該圖(h)所示,套住有該熔融球b之毛細管10a移動至導體配線c之正上方之後,朝向導體配線c下降而被壓抵(該圖(i)。與此同時,對該壓抵部位賦予熱、荷重、超音波,藉此熔融球b經壓接(成為壓接球b')而與導體配線c固相接合之後,打開夾鉗10b,一面上升一面朝向電極a上移動(該圖(j)~(k))。此時,為形成穩定之迴路,有進行使毛細管10a進行特殊移動而對導線W賦予「移動趨勢」之動作之情況(參照該圖(k)之鏈線至實線)。
到達形成於電極a上之柱形凸塊b'之正上方之毛細管10a朝向柱形凸塊b'下降,將導線W壓抵於柱形凸塊(第二個目標)b'。與此同時,對該壓抵部位賦予熱、荷重、超音波,藉此使導線W變形,形成用以使導線W接合於柱形凸塊b'之訂合式接合,與於下一步驟中確保末端之末端接合(第二次接合,該圖(1)~(m))。
形成該兩個接合之後,毛細管10a留下導線W直接上升,於毛細管10a之頂端確保一定長度之末端之後,關閉夾鉗10b(抓住導線W),自末端接合之部分扯掉導線W(該圖(m)~(n))。
若毛細管10a上升至所需之高度則停止,於確保於該毛細管10a之頂端之導線W之頂端部分,用放電棒g施加高電壓而進行放電(進行火花放電),利用其熱熔化導線W,該熔化之導線素材藉由表面張力變為接近於球狀之熔融球b而凝固(該圖(o))。
利用以上作用結束一循環,以後,藉由相同之作用,進行電極a與導體配線c之利用球形接合法與柱形凸塊法之組合之連接。
關於以上循環,於柱形凸塊法-球形接合法之情形,於形成柱形凸塊b'之後進行球形接合,但於球形接合法-柱形凸塊法之情形(進行 安全接合之情形)時,一循環中之順序不同,於圖3中,後形成柱形凸塊b'。即,如圖4(a)~(h)所示,先對電極a進行圖3之(h)~(o)之操作之後,如圖4(i)~(o)所示,對經訂合式接合之導體配線c進行圖3(a)~(g)之操作。
作為該利用球形接合法與柱形凸塊法之組合接合之接合線(導線)W之材質,使用4N(純度:99.99質量%以上)~2N之金。如此多用金之原因在於,金即便於大氣中暴露於熱亦不會氧化,因此於在訂合式接合上形成柱形凸塊之情形及在柱形凸塊上進行訂合式接合之情形時,均對接合亦無特別影響。又,金藉由適當地選擇添加元素,可容易地進行柱形凸塊之形成時之導線切斷,生產穩定。
另一方面,於BGA等半導體封裝中,由於金接合導線W價格昂貴,故而亦替換成廉價之銅(Cu)接合導線。進而,藉由於該銅接合導線表面被覆鈀(Pd)等,提高於銅接合導線成為問題之第二次接合性,而開發出改善生產性之被覆有Pd之銅接合導線,且一部分已被應用(下述專利文獻1)。又,亦開發出銀(Ag)接合導線,且一部分已被應用(下述專利文獻2~5)。
[先前技術文獻] [專利文獻]
[專利文獻1]日本專利特開2007-123597號公報
[專利文獻2]日本專利特開昭57-194232號公報
[專利文獻3]日本專利特開昭58-6948號公報
[專利文獻4]日本專利特開平11-288962號公報
[專利文獻5]專利第4771562號公報
金接合導線價格昂貴。作為其代替材料之銅接合導線雖然廉 價,但與金接合導線相比,FAB較硬,若電極a之晶片較脆弱,則產生晶片損傷之危險性增加。又,與金接合導線相比,第二次接合性較差,於連續接合性方面存在問題。
被覆有Pd之銅接合導線與銅接合導線相比第二次接合性較好,連續接合性較好,但FAB較銅接合導線變得更硬,因此有產生晶片損傷之問題。
進而,先前於LED封裝中使用被覆有Au之電極a之LED15,與電極a之連接使用金接合導線。由於該使用金之組合無法降低成本,故而於LED15用途中亦期望廉價之接合導線。但是,銅接合導線於連續接合性方面存在困難,被覆有Pd之銅接合導線之FAB變硬,因此有產生晶片損傷之虞。又,若使用銅接合導線或被覆有Pd之銅接合導線,則接合導線本身之反射率較低,故而導線部分成為陰影,因此亦有根據LED15之種類使LED15本身之亮度降低之情況。
又,若使用銅接合導線或被覆有Pd之銅接合導線,則於製作柱形凸塊b'之後進行訂合式接合之情形時,於進行訂合式接合之前之期間柱形凸塊b'發生氧化,而無法穩定地進行訂合式接合。於進行訂合式接合後進行柱形凸塊b'製作之安全接合之情形時亦相同,於訂合式接合之後進行柱形凸塊製作之前之期間訂合式接合部發生氧化,故而無法穩定地接合柱形凸塊。
又,關於先前之銀接合導線,通常於形成球b時為防止氧化而吹送氮(N2)氣進行放電。相對於此,專利文獻2、3中記載有藉由於Ag(銀)中添加Al(鋁)或者Mg(鎂),即便不吹送N2氣而於大氣中進行放電亦可獲得形狀較好之球b。
但是,近年來,於BGA之半導體封裝中,由於電極a變小,又,電極a彼此之距離亦變近,故而必須獲得更穩定之真球狀之球b,因此即便對於銀接合導線,亦較佳為吹送N2氣進行放電。於該吹送N2氣進 行放電之情形時,可防止氧自周圍侵入,但於導線頂端熔融時,上述添加之Al或者Mg自導線表面之氧化銀中奪取氧,生成Al2O3或者MgO。此時,若含有大量Al或者Mg,則有該Al2O3或者MgO大量生成於球b表面,於與電極a之接合時,硬質之Al2O3或者MgO損傷電極a之問題。
同樣地,專利文獻4中記載有為提高導線強度或耐熱性而添加Ca(鈣)、Sr(鍶)、Y(釔)、La(鑭)、Ce(鈰)、Eu(銪)、Be(鈹)、Ge(鍺)、In(銦)、Sn(錫),但若添加大量該等元素,則有球b之硬度提高而損傷電極a之問題。
又,專利文獻4中記載有為提高導線之接合可靠性而添加Pt(鉑)、Pd、Cu、Ru(釕)、Os(鋨)、Rh(銠)、Ir(銥)、Au。但是,若添加大量此種元素,則產生導線本身之電阻增加,損及作為接合導線W之性能之問題。即,如上所述,於BGA等半導體封裝中,由於電極a變得更小,該電極a間之距離亦變得更近,故而要求縮小第一接合部。
因此,必須縮小接合導線之直徑,但由於導線之電阻與導線之直徑成反比例,故而若導線本身之電阻較高,則有變得無法縮小導線直徑之問題。又,關於LED15,為提高亮度而動作電流逐漸變大,但若導線之電阻較高,則產生發熱之問題,產生縮短密封樹脂壽命之不良情況。
又,於製作柱形凸塊b'時,藉由毛細管10a之動作切斷導線W(參照圖3(d)、(e)),若導線W與熔融球b正上方之晶粒之大小有差異,則可穩定地進行該切斷。即,於在導線W之頂端部分,用放電棒g施加高電壓而進行放電(進行火花放電),利用其熱熔化導線W而製作熔融球b時,熔融球b之正上方之導線W部受到熱影響,但若導線W本身之晶粒較大,則晶粒不會因熱影響而粗大化,不產生晶粒之差異。相反 地,若導線W本身之晶粒較微細,則於受到熱影響而引起晶粒之粗大化之部分與微細之部分之交界容易引起切斷。
然而,先前之銀接合導線係以0.2%耐力(Yield Strength:以下稱為「YS」)與拉伸強度(Tensile Strength:以下稱為「TS」)之比(100×YS/TS)低於80%之區域為目標而調質。即,實施高溫或者長時間之調質熱處理,導線W之晶粒較大。於此種導線W之晶粒較大之情形時,如上所述,於熔融球b之製成時,不產生晶粒之差異,柱形凸塊製作時之切斷變得無法穩定地進行,於柱形凸塊之形狀產生偏差,不僅如此,而且於無法順利地進行切斷之情形時亦會產生機器停運。
專利文獻5中有關於「一種接合導線,其係包含Ag、Au及Pd之三元合金系接合導線,且包含金(Au)4~10質量%、鈀(Pd)2~5質量%、氧化性非貴金屬添加元素15~70質量ppm及剩餘部分為銀(Ag)」之記載。但是,如該文獻中所記載之接合導線未考慮如上所述之柱形凸塊製作時之切斷性,有柱形凸塊之形狀之偏差、機器停運之產生之擔憂。
於以上之實際情況下,本發明之課題在於提供一種銀接合用導線,其較金接合導線廉價且可穩定地進行利用球形接合法與柱形凸塊法之組合之連接。
為達成上述課題,本發明針對藉由球形接合法與柱形凸塊法之組合進行連接之接合用導線,採用以Ag為主成分,將Au之添加量設為0.9質量%以上且5.0質量%以下,將Pd之添加量設為0.1質量%以上且5.0質量%以下,且將Au與Pd之添加量之合計設為1.0質量%以上且8.0質量%以下,該導線(W)於常溫下之0.2%耐力(YS)與拉伸強度(TS)之比(100×YS/TS)為80%以上,較佳為90%以上之構成。
於該構成中,可設為包含合計為20質量ppm以上且500質量ppm以 下之選自Ca、稀土類元素中之1種以上之元素者,進而可設為包含合計為1000質量ppm以上且10000質量ppm以下之選自Cu、Ni中之1種以上之元素者,又,導線之電阻率可設為5.0μΩ‧cm以下,較佳為設為3.0μΩ‧cm以下。
該以Ag為主體之接合導線若與以Au為主體之金接合導線相比,則可成為廉價者。
Au係為獲得良好之FAB而添加。通常,若使用純Ag導線製作FAB,則產生於利用放電棒g所引起之火花熔融之導線W頂端之熔融球b變得不穩定,難以穩定地獲得真球度較高之FAB。但是,若添加Au 0.9質量%以上,且添加合計量為1.0質量%以上之Au與Pd,則熔融球b穩定,可獲得真球度較高之FAB。又,若Au之添加量超過5.0質量%,則導線價格變得昂貴。就該方面而言,Au之添加量較佳為設為2.6質量%以下。
Pd係為獲得第一接合部之耐蝕性而添加。多數情況為於BGA等半導體封裝之電極a被覆鋁或者鋁合金。LED之電極a為金被覆之情況較多,亦有使用鋁或者鋁合金之被覆材料之情況。若將銀與鋁接合,則於接合界面生成銀與鋁之金屬間化合物層。該化合物層中,若Ag2Al成長,則濕潤環境下之耐蝕性變差。若於Ag導線中添加Pd 0.1質量%以上,則於FAB之外周部形成Pd增稠層,藉此可抑制Ag2Al之生成。但是,若Pd之添加量超過5.0質量%,則產生FAB變硬,電極a出現龜裂等不良情況。
Pd、Au即便分別單獨添加亦有效果,但與僅添加某一定量之Pd或Au之情形相比,以Pd與Au之合計添加等量時導線之熔點變高,因此複合添加Pd與Au之導線之耐熱性變高。因此,關於Pd與Au之添加量,將合計設為1.0質量%以上且8.0質量%以下。
若添加Pd與Au之添加量之合計超過8.0質量%之量,則導線之電 阻變高。又,球b之硬度變高,於第一接合時損傷電極a。進而,若添加量之合計少於3.0質量%,則導線之電阻變得接近於金導線,因此可縮小導線直徑。
此處,若導線之電阻率超過3.0μΩ‧cm且為5.0μΩ‧cm以下,則可藉由增大導線直徑而獲得必需之電特性,因此無問題,但若為3.0μΩ‧cm以下,則成為與2N(99%)Au導線之電阻率同等以下,因此本發明之導線變得容易替換、或者可替換該2N Au導線。
Ca、稀土類元素係為提高導線強度或耐熱性而添加,若未達20質量ppm,則該導線之耐熱性降低,產生實用上之問題。又,若超過500質量ppm進行添加,則球b之硬度變高,於第一接合時損傷電極a。因此,Ca、稀土類元素之合計添加量係設為20質量ppm以上且500質量ppm以下。又,更佳為20質量ppm以上且100質量ppm以下,若為該範圍,則導線之耐熱性較高,且亦可將第一接合時之電極a之損傷程度抑制為更低。
此處,由於稀土類元素於獲取性方面存在困難,故而最佳為添加Ca。又,稀土類元素中,較佳為使以極微量之添加便於提高導線之耐熱性、強度之方面具有效果之Y、Gd及添加元素與Ag形成化合物,藉此化合物分散於作為基質之Ag中而有助於導線之高強度化之La、Ce。
進而,於必需高強度化之情形時,除添加Ca、稀土類元素以外,有效的是添加Cu、Ni。由於Cu、Ni不與Ca、稀土類元素進行反應而容易與基質之Ag合金化,因此不會損及Ca、稀土類元素之添加效果,有助於基質之高強度化。此處,若其合計添加量低於1000質量ppm,則無導線之高強度化之效果,若超過10000質量ppm,則球b之硬度變高,於第一接合時損傷電極a。因此,Cu、Ni之合計添加量較佳為1000質量ppm以上且10000質量ppm以下。
該導線W之線徑只要可用作接合導線則為任意,例如設為12μm以上且50.8μm以下。若設為50.8μm以下,則可進一步縮小熔融球b,若未達12μm,則有於接合前操作員難以使導線W通過毛細管10a,作業性變差,而且變得無法藉由氣壓對導線施加充分之張力,迴路控制變得困難之虞。
上述之接合導線W之製造方法可採用各種方法,例如於純度99.99質量%以上之Ag中添加0.9質量%以上且5.0質量%以下之Au,添加0.1質量%以上且5.0質量%以下之Pd,添加合計為1.0~8.0質量%之Pd與Au,添加合計為20~500質量ppm之選自Ca、稀土類中之1種以上之元素,添加合計為1000~10000質量ppm之選自Cu、Ni中之1種以上之元素,並利用連續鑄造法製作大線徑之該化學組成之棒,使其依次貫通於模具直至成為線徑50.8μm以下,藉此伸線至特定之線徑。其後,對導線W實施調質熱處理。
該調質熱處理係回捲進行伸線直至特定之線徑且捲取於捲盤之導線W,並使之於管狀之熱處理爐中移行,再次利用捲取捲盤捲取,藉此進行連續熱處理。
接合導線W之YS及TS係於15~25℃之室溫中對長度100mm之試樣進行拉伸試驗而算出。即,於拉伸試驗中,將達到斷裂之前之最大荷重除以初始截面面積所得之值設為TS,將殘留0.2%之永久應變時之荷重除以初始截面面積所得之值(卸載時之永久應變變為0.2%之應力)設為YS。
此處,調質熱處理前之導線W成為殘留有伸線時之加工應變之變形組織,其結晶組織較微細。此種變形組織之100×YS/TS大致接近於100%,但若實施低溫或者短時間之調質熱處理,則產生加工應變緩慢地被釋放之「恢復」,若將熱處理溫度設為更高溫或者更長時間而實施調質熱處理,則加工應變進一步被釋放,產生晶粒變大之「再結 晶」,相對於TS,YS緩慢地降低(100×YS/TS變小)。
若該100×YS/TS低於80%,則導線之大部分發生再結晶而結晶組織變大,但若為80%以上,則再結晶限於導線之一部分,晶粒亦為一部分變大之程度。進而,若為90%以上,則晶粒成為大部分為較微細之狀態之變形組織。
於柱形凸塊之製作時,藉由毛細管之各種動作將導線自壓接球切斷,但若存在導線之結晶組織之交界,則於該部分可容易地切斷。即,若存在微細之晶粒之部分與粗大之晶粒之部分,則於其交界部分變得容易斷裂。於形成柱形凸塊時,若首先對導線頂端進行放電使導線熔融而製作FAB,則FAB正上方之導線部分因放電所產生之熱而晶粒變大。此處,將受到熱之影響之部分稱為HAZ(Heat Affect Zone,熱影響區)。若導線之100×YS/TS為80%以上且晶粒較微細,則於HAZ與導線產生晶粒之交界部分,容易引起柱形凸塊製作時之切斷。進而,若為90%以上,則晶粒之交界變得更明確,切斷更穩定。
如上所述,本發明以Ag為主體,因此若與金接合導線相比,則可成為廉價者,且藉由Pd、Au、Ca、稀土類元素、Cu、Ni之適量之添加與常溫伸長之調整,可穩定地進行利用球形接合法與柱形凸塊法之組合之連接。
1‧‧‧配線板
2‧‧‧焊錫球
3‧‧‧電路配線基板(殼體電極)
4‧‧‧黏晶材
5‧‧‧半導體元件
6‧‧‧密封材
10a‧‧‧毛細管
10b‧‧‧夾鉗
11‧‧‧殼體散熱器
12‧‧‧黏晶材
13‧‧‧電路配線基板(殼體電極)
14‧‧‧密封材
15‧‧‧LED
16‧‧‧樹脂製殼體
a‧‧‧半導體元件(LED)之電極
b‧‧‧熔融球
b'‧‧‧壓接球(柱形凸塊)
c‧‧‧電路配線基板之導體配線(引線端子)
e‧‧‧螢光體
g‧‧‧放電棒
W‧‧‧接合用導線
圖1係半導體封裝之概略圖。
圖2係LED封裝之概略圖。
圖3係柱形凸塊法-球形接合法之說明圖,(a)~(o)為其中途圖。
圖4係球形接合法-柱形凸塊法之說明圖,(a)~(o)為其中途圖。
使用純度為99.99質量%以上(4N)之高純度Ag,鑄造表1所示之化 學成分之銀合金,製成8mm 之導線棒。對該導線棒進行伸線加工,製成特定之最終線徑(25μm )之銀合金線,以各種加熱溫度、加熱時間進行連續退火。再者,化學成分之定量係藉由ICP-OES(高頻電感耦合電漿發射光譜分析法)進行。
於15~25℃之常溫下對該連續退火之各導線W進行拉伸試驗,測定0.2%耐力(YS)與拉伸強度(TS)。
對該各試作例及各比較例,分別進行下述試驗。
[評價項目]
針對各導線W,進行利用自動打線接合機以圖3(a)~(f)所示之方法連續地製作柱形凸塊b'之評價。即,藉由利用放電棒g之電弧放電於導線W頂端製作FAB(球b),並將其壓抵於被覆有Al之電極上而連續地製作柱形凸塊b'。再者,於FAB製作時,對導線W頂端部一面流通氮(N2)氣一面進行電弧放電。
又,於被覆有Ag之42Ni-Fe板上進行利用圖3(a)~(o)所示之柱形凸塊法-球形接合法之組合之連接。
將用於評價之接合試樣之連續凸塊性、柱形凸塊部之晶片損傷、電阻、樹脂密封時之導線流動性、及綜合評價示於表2。該等之評價方法等如下所述。
[評價方法]
「連續凸塊性」
利用接合機器進行10,000次連續凸塊形成。此處,若不產生機器停運,則設為「A」,若導線之切斷未順利進行而產生1次機器停運,則設為「B」,若產生2次以上之機器停運,則設為「D」。
「接合後,柱形凸塊部正下方之晶片損傷之評價」
利用王水溶解半導體元件5之柱形凸塊部及電極膜,利用光學顯微鏡與掃描式電子顯微鏡(SEM)觀察龜裂。對100個接合部進行觀察,將見到1個未達3μm之微小之凹坑或者完全未見到之情況設為「A」,於確認到2個以上且未達5個之3μm以上之龜裂之情形時,認為使用上無問題而設為「B」,將確認到5個以上之3μm以上之龜裂之情況設為「D」。
「樹脂密封時之導線流動性之評價」
利用環氧樹脂將導線長:5mm之接合試樣密封之後,利用X射線 非破壞觀察裝置測定最大導線流動量。測定係對20根進行,將其平均值除以導線長5mm所得之比率設為導線流動率。若該導線流動率未達5%,則設為「A」,若為5%以上且未達7%,則設為「B」,若為7%以上,則認為存在實用上之問題而將評價設為「D」。
「電阻」
使用四端子法測定室溫下之電阻。若3個試樣之電阻率之平均為3.0μΩ‧cm以下,則於自金導線之替換時,電特性之變化較少,因此設為「A」,若超過3.0μΩ‧cm且為5.0μΩ‧cm以下,則於自金導線之替換時,實用上之問題較少,因此設為「B」,若超過5.0μΩ‧cm,則認為不適合自金導線之替換而設為「D」。
「自Au導線之替換」
研究本導線W之重大因素為將金導線替換成銀導線時產生之成本優勢。因此,導線W之成本亦成為重大比較因素。此處,若導線W含有超過5質量%之Au,則認為不易進行自Au導線之替換而設為「D」,若超過2.6質量%且為5質量%以下,則發現某程度之成本優勢,因此設為「B」,若為2.6質量%以下,則認為成本優勢較大而設為「A」。
「FAB真球度」
利用打線接合機分別製作100個各線徑之2倍大小之FAB,對FAB之與導線平行之方向及直角之方向之直徑進行測定。若該各個直徑之差為2μm以下,則認為接近真球而設為「A」,若超過2μm,則認為真球度較低而設為「D」。
「耐蝕性評價(HAST)」
接合於電極後,為對第一球形接合部之耐蝕性進行評價,進行於130℃/85%氛圍中放置168小時之HAST(Highly Accelerated Stress Test,高加速應力試驗)。此處,測定HAST前後之剪切強度,若HAST前之剪切強度(設為SSb)與HAST後之剪切強度(設為SSa)之比 (SSa/SSb×100)超過70%,則認為有耐蝕性而設為「A」,若成為未達70%,則認為於耐蝕性方面存在問題而設為「D」。再者,HAST前後之剪切強度之測定係每n=30地進行。
「綜合評價」
於各評價中,將全部為「A」者設為「A」,將混合存在「A」與「B」者設為「B」,將即便有一個「D」者設為「D」。
於該表1、2中,若Au之添加量未達0.9質量%,或不添加,則根據比較例1、6、7,「FAB之真球度」成為「D」。又,若Au之添加量超過5.0質量%,則根據比較例5、12,「自Au導線之替換」成為「D」。
又,若Pd之添加量未達0.1質量%,或不添加,則根據比較例2、 7、11,「HAST」成為「D」,若超過5.0質量%,則根據比較例4,「柱形凸塊部正下方之晶片損傷」成為「D」。
進而,若Au與Pd之添加量之合計未達1.0質量%,則「樹脂密封時之導線流動性」於比較例1、6中成為「D」,另一方面,於比較例7中雖然Au與Pd之添加量之合計未達1.0質量%,但添加合計為350質量ppm之下述之選自Ca、稀土類元素中之1種以上之元素,因此「樹脂密封時之導線流動性」成為「B」。又,若Au與Pd之添加量之合計超過8質量%,則根據比較例5、8,「電阻」成為「D」。若導線W之0.2%耐力(YS)與其拉伸強度(TS)之比未達80%,則根據比較例2、3、8~10,「連續凸塊性」成為「D」。
相對於此,於將本發明之Au之添加量設為0.9質量%以上且5.0質量%以下,將Pd之添加量設為0.1質量%以上且5.0質量%以下,且將Au與Pd之添加量之合計設為1.0質量%以上且8質量%以下,且該導線W之0.2%耐力與其拉伸強度之比為80%以上的試作例1~15時,於「連續凸塊性」、「柱形凸塊部正下方之晶片損傷」、「樹脂密封時之導線流動性」、「自Au導線之替換」、「FAB之真球度」、「HAST」及「綜合評價」中,為「A」或「B」中之任一者,可理解為實用上可無障礙地使用。
若選自Ca、稀土類元素中之1種以上之元素合計未達20質量ppm,則根據比較例1、6,「樹脂密封時之導線流動性」成為「D」,另一方面,試作例5、13、比較例5中,選自Ca、稀土類元素中之1種以上之元素合計未達20質量ppm,但使「樹脂密封時之導線流動」性提高之Au與Pd之添加量之合計為1.0質量%以上,或選自Cu、Ni中之1種以上之元素合計為1000質量ppm以上,因此「樹脂密封時之導線流動性」成為「B」。又,若選自Ca、稀土類元素中之1種以上之元素合計超過500質量ppm,則根據比較例4、8、9,「柱形凸塊部正下方之 晶片損傷」成為「D」。
又,若選自Cu、Ni中之1種以上之元素合計未達1000質量ppm,則根據比較例1、6,「樹脂密封時之導線流動性」成為「D」,另一方面,試作例10、13~15、比較例7~9中,選自Cu、Ni中之1種以上之元素合計未達1000質量ppm,但使「樹脂密封時之導線流動」性提高之Au與Pd之添加量之合計為1.0質量%以上,或選自Ca、稀土類元素中之1種以上之元素合計為20質量ppm,因此「樹脂密封時之導線流動性」成為「B」。又,若選自Cu、Ni中之1種以上之元素合計超過10000質量ppm,則根據比較例3,「柱形凸塊部正下方之晶片損傷」成為「D」。
又,若導線W之0.2%耐力與其拉伸強度之比為80%以上,則根據試作例1~15、比較例1、4~7、11、12,連續凸塊性成為「A」或「B」,但若為90%以上,則根據試作例2、3、6~8、11~13、15、比較例5,連續凸塊性成為「A」,可理解為更優異。
進而,若為包含Au之添加量0.9質量%以上且2.6質量%以下、Pd之添加量0.1質量%以上且1.5質量%以下、且Au與Pd之添加量之合計1.0質量%以上且3.0質量%以下者,則根據試作例1~3、6~8,「柱形凸塊部正下方之晶片損傷」、「電阻」、「自Au導線之替換」、「FAB之真球度」、「HAST」成為「A」,可理解為優異。
若導線W之電阻率超過5.0μΩ‧cm,則根據比較例5、8,「電阻」成為「D」。另一方面,若將導線W之電阻率抑制為3.0μΩ‧cm以下,則根據試作例1~8、10、11、15、比較例1~3、6、7、11,「電阻」成為「A」。
根據以上,試作例2、3、6~8、11中,導線W之0.2%耐力與其拉伸強度之比為90%以上,Au之添加量為0.9質量%以上且2.6質量%以下,Pd之添加量為0.1質量%以上且1.5質量%以下,且Au與Pd之添加量 之合計為1.0質量%以上且3.0質量%以下,選自Ca、稀土類元素中之1種以上之元素合計為20質量ppm以上且500質量ppm以下,電阻率為3.0μΩ‧cm以下,選自Cu、Ni中之1種以上之元素合計為1000質量ppm以上且10000質量ppm以下,於綜合評價中成為「A」,可理解為最優異。
10a‧‧‧毛細管
10b‧‧‧夾鉗
a‧‧‧半導體元件(LED)之電極
b‧‧‧熔融球
b'‧‧‧壓接球(柱形凸塊)
c‧‧‧電路配線基板之導體配線(引線端子)
g‧‧‧放電棒
W‧‧‧接合用導線

Claims (10)

  1. 一種接合用導線,其特徵在於:其係用於藉由球形接合法及柱形凸塊法之組合將半導體元件(5、15)之電極(a)與電路配線基板(3、13)之導體配線(c)連接之接合用導線(W);且將Au之添加量設為0.9質量%以上且5.0質量%以下,將Pd之添加量設為0.1質量%以上且5.0質量%以下,且將Au與Pd之添加量之合計設為1.0質量%以上且8.0質量%以下,剩餘部分為Ag及不可避免之雜質;為了於上述柱形凸塊法之熔融球(b)之製成時,產生晶粒之差異而使導線(W)之切斷變得容易,該導線(W)之0.2%耐力與其拉伸強度之比為80%以上。
  2. 如請求項1之接合用導線,其中於上述導線(W)之組成中,進而包含合計為20質量ppm以上且500質量ppm以下之選自Ca、Y、Sm、La、Ce中之1種以上之元素。
  3. 如請求項1之接合用導線,其中於上述導線(W)之組成中,進而包含合計為1000質量ppm以上且10000質量ppm以下之選自Cu、Ni中之1種以上之元素。
  4. 如請求項2之接合用導線,其中於上述導線(W)之組成中,進而包含合計為1000質量ppm以上且10000質量ppm以下之選自Cu、Ni中之1種以上之元素。
  5. 如請求項2至4中任一項之接合用導線,其中上述導線(W)之Au之添加量含有0.9質量%以上且2.6質量%以下、Pd之添加量含有0.1質量%以上且1.5質量%以下、且Au與Pd之添加量之合計含有1.0質量%以上且3.0質量%以下。
  6. 如請求項1至4中任一項之接合用導線,其中上述導線(W)之0.2% 耐力與其拉伸強度之比為90%以上。
  7. 如請求項5之接合用導線,其中上述導線(W)之0.2%耐力與其拉伸強度之比為90%以上。
  8. 如請求項1至4中任一項之接合用導線,其中上述導線(W)之電阻率為5.0μΩ‧cm以下。
  9. 如請求項5之接合用導線,其中上述導線(W)之電阻率為3.0μΩ‧cm以下。
  10. 如請求項7之接合用導線,其中上述導線(W)之電阻率為3.0μΩ‧cm以下。
TW103108465A 2013-03-14 2014-03-11 接合用導線 TWI490996B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013051577A JP5529992B1 (ja) 2013-03-14 2013-03-14 ボンディング用ワイヤ

Publications (2)

Publication Number Publication Date
TW201448152A true TW201448152A (zh) 2014-12-16
TWI490996B TWI490996B (zh) 2015-07-01

Family

ID=51175814

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103108465A TWI490996B (zh) 2013-03-14 2014-03-11 接合用導線

Country Status (5)

Country Link
JP (1) JP5529992B1 (zh)
KR (1) KR101536554B1 (zh)
CN (1) CN104380446B (zh)
TW (1) TWI490996B (zh)
WO (1) WO2014141975A1 (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI618802B (zh) * 2015-06-15 2018-03-21 Nippon Micrometal Corp Bonding wire for semiconductor device
US10468370B2 (en) 2015-07-23 2019-11-05 Nippon Micrometal Corporation Bonding wire for semiconductor device
TWI679290B (zh) * 2016-03-11 2019-12-11 日商拓自達電線股份有限公司 接合線
TWI812853B (zh) * 2019-10-01 2023-08-21 日商田中電子工業股份有限公司 線接合構造、使用於該線接合構造的接合線及半導體裝置

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG10201508103QA (en) * 2015-09-29 2017-04-27 Heraeus Materials Singapore Pte Ltd Alloyed silver wire
TWI609977B (zh) * 2016-10-17 2018-01-01 光大應用材料科技股份有限公司 銀合金線材
CN111029267B (zh) * 2019-11-22 2021-12-24 中国电子科技集团公司第十三研究所 一种倒装互连结构及其制备方法
US11636809B2 (en) 2019-11-29 2023-04-25 Chengdu Boe Optoelectronics Technology Co., Ltd. Display substrate and display device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5116101B2 (ja) * 2007-06-28 2013-01-09 新日鉄住金マテリアルズ株式会社 半導体実装用ボンディングワイヤ及びその製造方法
JP5616165B2 (ja) * 2010-08-24 2014-10-29 タツタ電線株式会社 銀ボンディングワイヤ
JP2012099577A (ja) * 2010-10-29 2012-05-24 Sumitomo Metal Mining Co Ltd ボンディングワイヤ
JP5064577B2 (ja) * 2011-01-20 2012-10-31 タツタ電線株式会社 ボールボンディング用ワイヤ
JP4771562B1 (ja) * 2011-02-10 2011-09-14 田中電子工業株式会社 Ag−Au−Pd三元合金系ボンディングワイヤ
TW201216300A (en) * 2011-07-11 2012-04-16 Profound Material Technology Co Ltd Composite silver thread
JP5996853B2 (ja) * 2011-08-29 2016-09-21 タツタ電線株式会社 ボールボンディング用ワイヤ

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI618802B (zh) * 2015-06-15 2018-03-21 Nippon Micrometal Corp Bonding wire for semiconductor device
US10137534B2 (en) 2015-06-15 2018-11-27 Nippon Micrometal Corporation Bonding wire for semiconductor device
US10414002B2 (en) 2015-06-15 2019-09-17 Nippon Micrometal Corporation Bonding wire for semiconductor device
US10610976B2 (en) 2015-06-15 2020-04-07 Nippon Micrometal Corporation Bonding wire for semiconductor device
US10737356B2 (en) 2015-06-15 2020-08-11 Nippon Micrometal Corporation Bonding wire for semiconductor device
US10468370B2 (en) 2015-07-23 2019-11-05 Nippon Micrometal Corporation Bonding wire for semiconductor device
TWI679290B (zh) * 2016-03-11 2019-12-11 日商拓自達電線股份有限公司 接合線
TWI812853B (zh) * 2019-10-01 2023-08-21 日商田中電子工業股份有限公司 線接合構造、使用於該線接合構造的接合線及半導體裝置

Also Published As

Publication number Publication date
CN104380446A (zh) 2015-02-25
KR20150032900A (ko) 2015-03-30
JP5529992B1 (ja) 2014-06-25
TWI490996B (zh) 2015-07-01
CN104380446B (zh) 2016-03-16
JP2014179412A (ja) 2014-09-25
KR101536554B1 (ko) 2015-07-13
WO2014141975A1 (ja) 2014-09-18

Similar Documents

Publication Publication Date Title
TWI490996B (zh) 接合用導線
KR101707244B1 (ko) 반도체용 본딩 와이어
TWI508204B (zh) High-speed signal line with bonding wire
WO2010087053A1 (ja) ボンディングワイヤ
WO2012043727A1 (ja) 複層銅ボンディングワイヤの接合構造
WO2013018238A1 (ja) ボールボンディングワイヤ
JP5671512B2 (ja) ボンディング用ワイヤ
JP5064577B2 (ja) ボールボンディング用ワイヤ
CN103155130A (zh) Ag-Au-Pd三元合金接合线
CN107195609B (zh) 半导体装置用接合线
JP2010245390A (ja) ボンディングワイヤ
JP4726206B2 (ja) 高い初期接合性、高い接合信頼性、圧着ボールの高い真円性、高い直進性、高い耐樹脂流れ性および低い比抵抗を有するボンディングワイヤ用金合金線
JP6103806B2 (ja) ボールボンディング用ワイヤ
JP5996853B2 (ja) ボールボンディング用ワイヤ
JP6343197B2 (ja) ボンディング用ワイヤ
JPH10326803A (ja) 半導体素子用金銀合金細線
WO2006134824A1 (ja) 高い初期接合性、高い接合信頼性、圧着ボールの高い真円性、高い直進性および高い耐樹脂流れ性を有するボンディングワイヤ用金合金線
JP6869919B2 (ja) ボールボンディング用貴金属被覆銀ワイヤおよびその製造方法、ならびにボールボンディング用貴金属被覆銀ワイヤを使用した半導体装置およびその製造方法
WO2018180189A1 (ja) ボンディングワイヤ及び半導体装置
JP6898705B2 (ja) ボールボンディング用銅合金細線
JP7542583B2 (ja) ボンディングワイヤ及び半導体装置
JP3426473B2 (ja) 半導体素子用金合金細線
WO2022085365A1 (ja) 半導体装置用Ag合金ボンディングワイヤ
JP2003133362A (ja) 半導体装置及び半導体装置用ボンディングワイヤ
JP2008251634A (ja) 高い接合信頼性および圧着ボールの高い真円性を有し、さらにAlパッドとその下部が損傷しにくくかつ一層高い耐樹脂流れ性を有するボンディングワイヤ用金合金線