TW201342541A - 半導體封裝 - Google Patents

半導體封裝 Download PDF

Info

Publication number
TW201342541A
TW201342541A TW101121151A TW101121151A TW201342541A TW 201342541 A TW201342541 A TW 201342541A TW 101121151 A TW101121151 A TW 101121151A TW 101121151 A TW101121151 A TW 101121151A TW 201342541 A TW201342541 A TW 201342541A
Authority
TW
Taiwan
Prior art keywords
pad
semiconductor package
copper
bonding
protective layer
Prior art date
Application number
TW101121151A
Other languages
English (en)
Inventor
Da-Jyun Lee
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Publication of TW201342541A publication Critical patent/TW201342541A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554—Coating
    • H01L2224/45565—Single coating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48507—Material at the bonding interface comprising an intermetallic compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48647—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
    • H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48847—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85447—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

一種半導體封裝包括一基板、一半導體元件、一保護層、一接合線以及一封裝膠體。基板具有一接墊以及一銲罩層，且接墊自銲罩層暴露。半導體元件配置於基板上。保護層配置於接墊上。接合線連接半導體元件至接墊。接合線的一端貫穿保護層且與接墊的一表面的一部分接合以形成一接合區。保護層除了接合區外覆蓋接墊的全部表面。封裝膠體覆蓋半導體元件、接墊與接合線。

Description

半導體封裝
本發明是有關於一種半導體封裝，且特別是有關於一種半導體封裝的打線接合(wire bonding)。
打線接合是將半導體晶片與基板，例如是印刷電路板(printed circuit board,PCB)或導線架(lead frame)電性連接。常見地，有機保焊劑(Organic Solderability Preservative，OSP)材料配置於接墊上以防止接墊表面氧化。在傳統製程中，有機材料形成於裸露的接墊上以保護接墊不被氧化。當欲接近接墊時，有機材料會從接墊上被移除。然而，在移除有機材料之後，接墊的表面被暴露出來且當它與外界元素，如水氣，產生反應時可能會立即被氧化。此將導致後續銲接或接合製程銲接性(solderability)不良。或著是，導電鎳-金層可被使用，但所需的材料成本較高因為金很貴。
本揭露的一態樣是關於一半導體封裝。半導體封裝包括一半導體元件；一基板，包括一接墊且接墊上具有一保護層；一接合線，連接半導體元件至接墊，其中接合線的末端貫穿保護層而與接墊的一表面的一部分接合而形成一接合區；以及一封裝膠體，覆蓋半導體元件、接墊以及接 合線。接墊自一銲罩層暴露且除了接合區外實質上被保護層完全覆蓋。於一實施例中，接合線與接墊為銅，且介於接合線貫穿保護層的一端與接墊之間的一接合為一銅-銅接合。於另一實施例中，接合線為鍍鈀之銅導線，且銅-鈀-銅介金屬(copper-palladium-copper intermetallic)區位於接合區內。於另一實施例中，接合線可為一金導線。保護層可包括一導電有機金屬材料，例如是一電性導電聚合物以及多個貴金屬顆粒(例如是奈米級銀顆粒)的一組合。有機材料賦予一可看見的塗佈，便於檢查，以確保可視覺地視察的表面加工。或者是，保護層可包括一陶瓷奈米塗層。
為讓本發明之上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
請參考圖1，其顯示依據本發明之一實施例之一半導體封裝100。半導體封裝100包括一基板102、一半導體元件104、一保護層106、一接合線108以及一封裝膠體110。
基板102上表面具有一接墊112以及一銲罩層114，其中接墊112自銲罩層114暴露。接墊112的材質主要為銅。接墊112係藉由基板102之內層導電電路(未示於圖中)連接至基板102下表面的接墊(未示於圖中)。基板102下表面的接墊可設有錫球(未示於圖中)用以進一步連接至一外部印刷電路板(未示於圖中)。
半導體元件104配置於基板102上。保護層106配置於接墊112上。於一實施例中，保護層106包括一電性上導電有機金屬材料。有機金屬材料可包括一電性導電聚合物與多個貴金屬顆粒(例如是奈米級銀顆粒)的一組合，其可使接墊112之表面改質或鈍化，提升接墊112表面的氧化電位，以降低與/或防止表面氧化。此外，有機金屬材透賦予一個可見的塗層，便於檢查，以確保視覺地視察的表面加工，準備組裝。另外，有機金屬材料提供一高導電表面處理以給予電路裸板測試電路後直接使用。因此，在電路板組裝時需要黏貼的測試點被淘汰。
當然，保護層106亦可包括一電性上非導電材料，例如是陶瓷奈米塗層，其排斥水但保留了可被電連接器或打線接合貫穿的能力。
接合線108電性連接半導體元件104至接墊112。接合線108可以是主要材質為銅之銅導線，例如裸銅導線(Bare Cu Wire)、鍍鈀之銅導線(Palladium Coated Cu Wire)，或者是主要材質為金之金導線。
接合線108具有一第一端部以及一第二端部116，其中第一端部與半導體元件104的接墊接合，第二端部116貫穿保護層106而接合至接墊112的一表面的一部分，以形成一接合區118。於一實施例中，若接合線108為銅導線，則可在接墊112的表面與接合線108之間形成具有銅-銅接合介面。銅-銅接合介面是由銅接墊和銅接合線之間的原子擴散所形成。於另一實施例中，若接合線108為一金 導線，多層銅-金合金層形成於接墊112的表面與接合線108之間。
於另一實施例中，若接合線108為一鍍鈀之銅導線，則可在接墊112的表面與接合線108之間形成銅-鈀-銅介金屬(copper-palladium-copper intermetallic)區。請參考圖2，一連續的鈀層形成於接墊112的表面與接合線108之間。
值得注意的是，保護層106覆蓋接墊112的全部表面，除了接合區118之外，其中接合區118例如是銅-銅接合介面、銅-鈀-銅介金屬區或銅-金合金層。請參考圖3，保護層106覆蓋一第一區112a與一第二區112b，其中第一區112a環繞接合區118，而第二區112b被接合區118所環繞。此外，保護層106具有一空孔119(請參考圖1)，其中空孔119是由接合線108的另一端部116的貫穿保護層106所產生。接合線108透過空孔119接合至接合區118，且銅-銅接合介面、銅-鈀-銅介金屬區或銅-金合金層形成於在空孔119的位置。封裝膠體110覆蓋半導體元件104、接墊112以及接合線118。
在進行打線接合製程前，在接墊112上的保護層106係大致完整無損的。於打線接合製程中，接合線108穿過保護層106且接合至接墊112，但未打線之表面仍為保護層106所覆蓋與保護。詳言之，在第二端接合製程，打線接合所使用的工具(例如是一“銲嘴(capillary)”)被移動至第二端接合的位置且停留在有保護層106的接墊112表面 上。接著，透過銲嘴傳遞的超音波能量自接墊表面擦除保護層106並產生一介於接合線108之第二端部116與接墊112之間之冶金接合(metallurgical bond)。於其他實施例中，銲嘴可不用從接墊表面完全地擦除保護層106，而在接合區形成一不連續的殘餘層。此殘餘層主要包括未蒸發顆粒，例如是銀顆粒(在有機金屬材料內)、矽或鋁(在陶瓷奈米塗層材料內)。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，故本發明之保護範圍當視後附之申請專利範圍所界定者為準。此外，許多修改可使一事件、方法或過程的特殊情況、材料或合成物來適應本發明之宗旨、精神和範圍。這一類的修改亦被預期為可能在附加之申請專利範圍中之一些項中陳述。特別是，於此中被揭露的方法描述了關於按特殊順序進行的特殊操作，這些操作也許可被結合、被細分或者被重新調整而形成一個等效方法，此仍不脫離本發明所教示的範圍內。因此，除非此文中明確地說明，否則順序和編組操作非用以限定本發明。
100‧‧‧半導體封裝
102‧‧‧基板
104‧‧‧半導體元件
106‧‧‧保護層
108‧‧‧接合線
110‧‧‧封裝膠體
112‧‧‧接墊
112a‧‧‧第一區
112b‧‧‧第二區
114‧‧‧銲罩層
116‧‧‧第二端部
118‧‧‧接合區
119‧‧‧空孔
圖1為本發明一實施例之一種半導體封裝的一部分的膜層的剖面示意圖。
圖2繪示鍍鈀之銅導線與接墊之接合區的局部放大示意圖。
圖3繪示圖1之耦接元件之接合至接墊之不連續的放大透視示意圖。
100‧‧‧半導體封裝
102‧‧‧基板
104‧‧‧半導體元件
106‧‧‧保護層
108‧‧‧接合線
110‧‧‧封裝膠體
112‧‧‧接墊
114‧‧‧銲罩層
116‧‧‧第二端部
118‧‧‧接合區
119‧‧‧空孔

Claims (20)

  1. 一種半導體封裝，包括：一半導體元件；一基板，包括一接墊，且該接墊上具有一保護層；一接合線，連接該半導體元件至該接墊，其中該接合線的一端貫穿該保護層而與該接墊的一表面的一部分接合以形成一接合區；以及一封裝膠體，包覆該半導體元件、該接墊以及該接合線。
  2. 如申請專利範圍第1項所述之半導體封裝，其中該接墊自一銲罩層暴露，且該接墊除了該接合區外實質上被該保護層完全覆蓋。
  3. 如申請專利範圍第1項所述之半導體封裝，其中在該接墊上之打線接合為銅-銅接合。
  4. 如申請專利範圍第1項所述之半導體封裝，其中該保護層包括一具有多個金屬顆粒之導電有機材料。
  5. 如申請專利範圍第4項所述之半導體封裝，其中該導電有機材料包括一電性導電聚合物以及多個貴金屬顆粒的一組合。
  6. 如申請專利範圍第1項所述之半導體封裝，其中該保護層包括一陶瓷奈米塗層。
  7. 如申請專利範圍第1項所述之半導體封裝，其中該接合線為一鍍鈀之銅導線。
  8. 如申請專利範圍第1項所述之半導體封裝，其中該接合區包括一銅-鈀-銅介金屬。
  9. 如申請專利範圍第1項所述之半導體封裝，其中該接合線包括一金導線。
  10. 如申請專利範圍第9項所述之半導體封裝，其中多層銅-金合金層形成於該接墊與該接合線之間。
  11. 一種半導體封裝，包括：一基板，包括至少一接墊，其中該接墊的材質主要為銅；一半導體元件，配置於該基板上；一接合線，連接該半導體元件至該接墊，其中該接合線的材質主要為銅；一銅-銅接面，形成於該接墊與該接合線之間；一保護層，除了介於該接墊與該接合線之間的一接合區外實質上完全覆蓋該接墊的表面；以及一封膠體，包覆該半導體元件、該接墊以及該接合線。
  12. 如申請專利範圍第11項所述之半導體封裝，其中該保護層包括一具有多個金屬顆粒之導電有機材料。
  13. 如申請專利範圍第12項所述之半導體封裝，其中該導電有機材料包括一電性導電聚合物以及多個貴金屬顆粒的一組合。
  14. 如申請專利範圍第11項所述之半導體封裝，其中該銅-銅接面包括一介金屬區。
  15. 如申請專利範圍第11項所述之半導體封裝，其中該保護層包括一陶瓷奈米塗層。
  16. 一種半導體封裝，包括： 一基板，包括一接墊，其中該接墊的材質主要為銅；一鍍鈀之銅導線，耦接至該接墊並在該接墊上定義一接合區；一保護材料，環繞該接合區；以及一銅-鈀-銅介金屬區，位於該接合區內。
  17. 如申請專利範圍第16項所述之半導體封裝，其中該保護層包括一具有多個金屬顆粒之導電有機材料。
  18. 如申請專利範圍第17項所述之半導體封裝，其中該導電有機材料包括一電性導電聚合物以及多個貴金屬顆粒的一組合。
  19. 如申請專利範圍第16項所述之半導體封裝，其中該保護材料鈍化該接墊以降低氧化。
  20. 如申請專利範圍第16項所述之半導體封裝，其中該保護材料包括一陶瓷奈米塗層。
TW101121151A 2012-04-06 2012-06-13 半導體封裝 TW201342541A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/441,796 US8618677B2 (en) 2012-04-06 2012-04-06 Wirebonded semiconductor package

Publications (1)

Publication Number Publication Date
TW201342541A true TW201342541A (zh) 2013-10-16

Family

ID=49291658

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101121151A TW201342541A (zh) 2012-04-06 2012-06-13 半導體封裝

Country Status (3)

Country Link
US (1) US8618677B2 (zh)
CN (1) CN103367289A (zh)
TW (1) TW201342541A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI778462B (zh) * 2020-01-07 2022-09-21 日商鎧俠股份有限公司 半導體裝置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111785699B (zh) * 2019-04-03 2022-05-03 华邦电子股份有限公司 打线接合结构及其制造方法

Family Cites Families (66)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1147522A (en) 1965-07-31 1969-04-02 Nippon Electric Co A composite metal material to be sealed or brazed
US3662454A (en) 1970-03-18 1972-05-16 Rca Corp Method of bonding metals together
JPS56112497A (en) 1980-02-12 1981-09-04 Dainichi Nippon Cables Ltd Method and apparatus for production of electrodeposited wire
US4415115A (en) 1981-06-08 1983-11-15 Motorola, Inc. Bonding means and method
JPS63148646A (ja) 1986-12-12 1988-06-21 Toshiba Corp 半導体装置
JPH01201934A (ja) 1988-02-08 1989-08-14 Mitsubishi Electric Corp ワイヤボンディング方法及びキャピラリチップ
US5293073A (en) 1989-06-27 1994-03-08 Kabushiki Kaisha Toshiba Electrode structure of a semiconductor device which uses a copper wire as a bonding wire
JPH03233972A (ja) 1990-02-08 1991-10-17 Matsushita Electron Corp 半導体装置用電極およびその製造方法
US5337941A (en) 1993-03-31 1994-08-16 The Furukawa Electric Co., Ltd. Magnet wire having a high heat resistance and a method of removing insulating film covering magnet wire
US5455195A (en) 1994-05-06 1995-10-03 Texas Instruments Incorporated Method for obtaining metallurgical stability in integrated circuit conductive bonds
US6046504A (en) 1997-02-17 2000-04-04 Nippon Steel Corporation Resin-encapsulated LOC semiconductor device having a thin inner lead
US6100598A (en) 1997-03-06 2000-08-08 Nippon Steel Semiconductor Corporation Sealed semiconductor device with positional deviation between upper and lower molds
US6062462A (en) 1997-08-12 2000-05-16 Kulicke And Soffa Investments, Inc. Apparatus and method for making predetermined fine wire ball sizes
US6164523A (en) 1998-07-01 2000-12-26 Semiconductor Components Industries, Llc Electronic component and method of manufacture
US6158647A (en) 1998-09-29 2000-12-12 Micron Technology, Inc. Concave face wire bond capillary
US8021976B2 (en) 2002-10-15 2011-09-20 Megica Corporation Method of wire bonding over active area of a semiconductor circuit
US6329722B1 (en) 1999-07-01 2001-12-11 Texas Instruments Incorporated Bonding pads for integrated circuits having copper interconnect metallization
US6234376B1 (en) 1999-07-13 2001-05-22 Kulicke & Soffa Investments, Inc. Supplying a cover gas for wire ball bonding
EP1139413B1 (en) 2000-03-24 2005-03-16 Texas Instruments Incorporated Wire bonding process
IT1317214B1 (it) 2000-04-11 2003-05-27 St Microelectronics Srl Struttura di capillare per il collegamento di fili di rame da un chipdi circuito a semiconduttore e un connettore terminale corrispondente
US6780467B2 (en) 2000-04-25 2004-08-24 Nikko Materials Co., Ltd. Plating pretreatment agent and metal plating method using the same
US6582979B2 (en) * 2000-11-15 2003-06-24 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless chip carrier with embedded antenna
US6867493B2 (en) * 2000-11-15 2005-03-15 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless multi-die carrier
US6696756B2 (en) * 2001-07-16 2004-02-24 Tao-Kuang Chang Gold wire for use in semiconductor packaging and high-frequency signal transmission
US7523848B2 (en) 2001-07-24 2009-04-28 Kulicke And Soffa Industries, Inc. Method and apparatus for measuring the size of free air balls on a wire bonder
JP2004064033A (ja) * 2001-10-23 2004-02-26 Sumitomo Electric Wintec Inc ボンディングワイヤー
US20040245320A1 (en) * 2001-10-23 2004-12-09 Mesato Fukagaya Bonding wire
EP2273544A3 (en) 2001-12-14 2011-10-26 STMicroelectronics S.r.l. Semiconductor electronic device and method of manufacturing thereof
JP2003197827A (ja) 2001-12-25 2003-07-11 Toshiba Corp 半導体装置およびその製造方法
JP3537417B2 (ja) 2001-12-25 2004-06-14 株式会社東芝 半導体装置およびその製造方法
TW200414453A (en) * 2002-03-26 2004-08-01 Sumitomo Electric Wintec Inc Bonding wire and IC device using the bonding wire
US20050242446A1 (en) 2002-09-19 2005-11-03 Stats Chippac Ltd. Integrated circuit package with different hardness bump pad and bump and manufacturing method therefor
US7294217B2 (en) 2003-04-09 2007-11-13 Kulicke And Soffa Industries, Inc. Electrical interconnect structures for integrated circuits and methods of manufacturing the same
TWI220781B (en) * 2003-04-28 2004-09-01 Advanced Semiconductor Eng Multi-chip package substrate for flip-chip and wire bonding
US6972152B2 (en) * 2003-06-27 2005-12-06 Intel Corporation Use of direct gold surface finish on a copper wire-bond substrate, methods of making same, and methods of testing same
US6974776B2 (en) 2003-07-01 2005-12-13 Freescale Semiconductor, Inc. Activation plate for electroless and immersion plating of integrated circuits
US20050067382A1 (en) 2003-09-26 2005-03-31 Gary Gillotti Fine pitch electronic flame-off wand electrode
US7411157B2 (en) 2003-09-26 2008-08-12 Kulicke And Soffa Industries, Inc. Electronic flame-off electrode with ball-shaped tip
SG135181A1 (en) 2004-03-09 2007-09-28 Kulicke & Soffa Ind Inc Wire bonding apparatus having actuated flame-off wand
US7427009B2 (en) 2004-06-24 2008-09-23 Asm Technology Singapore Pte Ltd. Capillary for wire bonding
TWI253161B (en) * 2004-09-10 2006-04-11 Via Tech Inc Chip carrier and chip package structure thereof
WO2006073206A1 (ja) * 2005-01-05 2006-07-13 Nippon Steel Materials Co., Ltd. 半導体装置用ボンディングワイヤ
US7217656B2 (en) 2005-05-31 2007-05-15 Texas Instruments Incorporated Structure and method for bond pads of copper-metallized integrated circuits
US7413974B2 (en) 2005-08-04 2008-08-19 Texas Instruments Incorporated Copper-metallized integrated circuits having electroless thick copper bond pads
US8063315B2 (en) * 2005-10-06 2011-11-22 Endicott Interconnect Technologies, Inc. Circuitized substrate with conductive paste, electrical assembly including said circuitized substrate and method of making said substrate
JP5050384B2 (ja) 2006-03-31 2012-10-17 富士通セミコンダクター株式会社 半導体装置およびその製造方法
WO2008005684A2 (en) 2006-07-03 2008-01-10 Kulicke And Soffa Industries, Inc. Bonding tool with improved finish
DE102006043811B4 (de) * 2006-09-13 2010-05-06 Ormecon Gmbh Artikel mit einer Beschichtung von elektrisch leitfähigem Polymer und Edel-/Halbedelmetall sowie Verfahren zu deren Herstellung
US7641097B2 (en) 2006-10-09 2010-01-05 Kulicke And Soffa Industries, Inc. Moveable arm assembly for a wire bonder
US7791198B2 (en) 2007-02-20 2010-09-07 Nec Electronics Corporation Semiconductor device including a coupling region which includes layers of aluminum and copper alloys
US20080265385A1 (en) 2007-04-11 2008-10-30 Siliconware Precision Industries Co., Ltd. Semiconductor package using copper wires and wire bonding method for the same
CN102842539B (zh) * 2007-07-24 2015-06-24 新日铁住金高新材料株式会社 半导体装置用接合线
US7956469B2 (en) * 2007-07-27 2011-06-07 Nichia Corporation Light emitting device and method of manufacturing the same
JP2009135221A (ja) * 2007-11-29 2009-06-18 Shinko Electric Ind Co Ltd 多層配線基板及びその製造方法ならびに半導体装置
TWI447877B (zh) * 2008-01-15 2014-08-01 Raydium Semiconductor Corp 半導體元件封裝體
US8110931B2 (en) 2008-07-11 2012-02-07 Advanced Semiconductor Engineering, Inc. Wafer and semiconductor package
US8018075B2 (en) 2008-07-11 2011-09-13 Advanced Semiconductor Engineering, Inc. Semiconductor package, method for enhancing the bond of a bonding wire, and method for manufacturing a semiconductor package
TWI372453B (en) 2008-09-01 2012-09-11 Advanced Semiconductor Eng Copper bonding wire, wire bonding structure and method for processing and bonding a wire
US8076786B2 (en) 2008-07-11 2011-12-13 Advanced Semiconductor Engineering, Inc. Semiconductor package and method for packaging a semiconductor package
US20100080957A1 (en) * 2008-10-01 2010-04-01 Integrated Surface Technologies Surface Coating
US8357998B2 (en) 2009-02-09 2013-01-22 Advanced Semiconductor Engineering, Inc. Wirebonded semiconductor package
US20100200981A1 (en) 2009-02-09 2010-08-12 Advanced Semiconductor Engineering, Inc. Semiconductor package and method of manufacturing the same
TW201030916A (en) * 2009-02-11 2010-08-16 Advanced Semiconductor Eng Pad and package structure using the same
US8096461B2 (en) 2009-09-03 2012-01-17 Advanced Semiconductor Engineering, Inc. Wire-bonding machine with cover-gas supply device
US8766436B2 (en) * 2011-03-01 2014-07-01 Lsi Corporation Moisture barrier for a wire bond
US9508622B2 (en) * 2011-04-28 2016-11-29 Freescale Semiconductor, Inc. Method for protecting copper wire bonds on aluminum pads of a semiconductor device from corrosion

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI778462B (zh) * 2020-01-07 2022-09-21 日商鎧俠股份有限公司 半導體裝置
US11749634B2 (en) 2020-01-07 2023-09-05 Kioxia Corporation Semiconductor device and wire bonding method

Also Published As

Publication number Publication date
CN103367289A (zh) 2013-10-23
US20130264712A1 (en) 2013-10-10
US8618677B2 (en) 2013-12-31

Similar Documents

Publication Publication Date Title
TWI581400B (zh) 層疊封裝及其形成方法
TWI408785B (zh) 半導體封裝結構
JP2008532292A5 (zh)
US20100207279A1 (en) Semiconductor package with ribbon with metal layers
US20120205812A1 (en) Patterns of passivation material on bond pads and methods of manufacture thereof
CN102456648A (zh) 封装基板及其制法
WO2007098306A3 (en) Cap layer for an aluminum copper bond pad
TWI533424B (zh) 封裝載板
US8786084B2 (en) Semiconductor package and method of forming
US20100181675A1 (en) Semiconductor package with wedge bonded chip
KR20120127307A (ko) 반도체 장치 및 그 제조 방법
KR20100054602A (ko) 반도체 패키지 및 그의 제조 방법
CN101207969A (zh) 电子元件内置基底及其制造方法
TWI574364B (zh) 封裝體及其製作方法
TW201342541A (zh) 半導體封裝
TWI419278B (zh) 封裝基板及其製法
US10066303B2 (en) Thin NiB or CoB capping layer for non-noble metallic bonding landing pads
CN101202265A (zh) 元件搭载用衬底、半导体模块及便携设备
CN104716115A (zh) 传感器封装及其制造方法
US10833043B2 (en) Laser ablation for wire bonding on organic solderability preservative surface
JP7169039B2 (ja) 半導体デバイスのワイヤボールボンディング
TW200939431A (en) Ball grid array assembly and solder pad
TW200812027A (en) Flip-chip attach structure and method
JP2007073763A (ja) 半導体装置およびその製造方法
WO2015129185A1 (ja) 樹脂封止型半導体装置、およびその製造方法、ならびにその実装体