TW201247055A - Multi-layer printed circuit board and manufacturing method thereof - Google Patents

Abstract

[Topic] The present invention provides a multi-layer printed circuit board with through holes filled with plating metal and a manufacturing method thereof. [Solving means] The multi-layer printed circuit board (90) of one embodiment of the present invention comprises: an inner layer circuit substrate (10); an outer layer circuit substrate (40) with an intervened insulating layer laminated on the surface of inner layer circuit substrate (10); an outer layer circuit substrate (50) with an intervened insulating layer laminated inside the inner layer circuit substrate (10); and, through holes (61) penetrating both the inner layer circuit substrate (10) and the outer layer circuit substrates (40, 50), and the filled through pin holes (71) filled with plating metal (68). The through holes (61) comprises the pin holes (67) connecting through the outer layer circuit substrate (40), the inner layer through holes (5) penetrating the inner layer circuit substrate (10), and the pin holes (66) penetrating the outer layer circuit substrate (50). The minimum opening diameter of pin holes (66) and (67) are larger than the maximum opening size of the inner layer through holes (5).

Description

201247055 VI. [Technical Field] The present invention relates to a multilayer printed wiring board and a method of manufacturing the same, and relates to a multilayer printed wiring board having a pupil structure and a method of manufacturing the same. [Prior Art] In recent years, the miniaturization and high-performance of electronic equipment have become more and more advanced, and the demand for higher density of printed wiring boards has been increased. For this reason, a multi-layer printed wiring board having a high density has been bonded to a plurality of printed wiring boards, and has been widely spread around small electronic devices such as portable telephones and digital cameras. A multilayer printed wiring board in which a flexible printed wiring board is laminated is disclosed as an example of a printed wiring board having a high density (for example, see Patent Document 1). Further, in Patent Documents 2 and 3, the through-holes have a vertical cross-sectional shape in the shape of a drum, or the tops of the tapered shape form a mutually matching shape, and a through hole formed by plating metal is formed (hereinafter referred to as "filling through". Hole") method. [PRIOR ART DOCUMENT] [Patent Document 1] Japanese Laid-Open Patent Publication No. 2004-200926 [Patent Document 2] Japanese Laid-Open Patent Publication No. 2004-311919 (Patent Document 3) Japanese Patent Laid-Open No. 2003-046248 [Invention] [5] In the present invention, a method of manufacturing a multilayer flexible printed wiring board according to a comparative example will be described with reference to FIGS. 5A and 5B. (1) First, a double-sided copper-clad laminate in which copper foil was formed on both surfaces of a flexible insulating base film made of polyimide. Further, the double-sided copper clad laminate is formed by forming a via hole, a copper plating process, and patterning a copper foil. As can be understood from Fig. 5A (1), the inner layer circuit substrate 1 has a wiring pattern formed on both surfaces of the insulating base film and a plated through hole 电 electrically connecting the wiring patterns on both sides. (2) Next, as is understood from Fig. 5A (1), in order to insulate and protect both sides of the inner layer circuit substrate 100, a cover layer having the insulating film 130 and the adhesive layer 120 is used using a vacuum laminator or the like. 1 10, laminated on both sides of the inner layer circuit substrate 100. Thereby, the core substrate 200 is produced. (3) Next, an outer layer circuit substrate 300 for the build-up layer was produced. The outer layer circuit substrate 300 processes the both sides of the copper foil of the double-sided copper clad laminate in accordance with a predetermined pattern. The wiring pattern of the outer layer substrate 300 has an opening portion 310 in the blind hole forming portion. The opening portion 310 is a function of the laser processing in the subsequent stage as a positive mask. (4) Next, the laminated circuit layer 210 is laminated on both surfaces of the core substrate 200 to laminate the outer layer circuit substrate 300, whereby the multilayer circuit substrate 400 shown in Fig. 5A (1) is produced. (5) Next, as shown in Fig. 5A (2), blind holes and through holes are formed in the multilayer circuit substrate 400. More specifically, the opening portion of the outer circuit substrate 300

S-6-201247055 310 laser light is irradiated to form a blind hole 410 in which the wiring pattern of the inner layer circuit substrate 100 is exposed on the bottom surface, and a blind hole in which the wiring pattern on the inner surface of the outer layer circuit substrate 300 is exposed on the bottom surface. 420. Further, drilling is performed at a portion where the through hole is formed, thereby forming a through hole 430 penetrating the multilayer circuit substrate 400. (6) Next, as shown in Fig. 5A (3), the multilayer circuit substrate 400 on which the pupils 410, 420 and the vias 43 0 are formed is subjected to a plating treatment to form a plating film 45 0 . A plating film 45 0 is formed on the side faces of the blind holes 410, 420 and the through holes 430, whereby the plating holes 460, 470, and 480 and the ammonium through holes 490 functioning as interlayer connection paths are formed. (7) Next, as shown in Fig. 5B (4), the conductive film on the surface of the outer layer substrate 300 is processed in a predetermined pattern by a photosensitive etching process to form the outer layer wiring pattern 500. (8) Next, as shown in Fig. 5B (5), the insulating protective outer layer wiring pattern 500, the plating holes 460, 470, 480, and the solder resist 510 of the plated through holes 490 are formed. The solder resist 510 has an opening 510a formed at a predetermined portion where the terminal for mounting the component and the terminal for connection are formed. Further, as the insulating protective material, a coating layer may be used instead of the solder resist. (9) Next, the outer layer circuit wiring pattern 500 exposed on the bottom surface of the opening 510a is subjected to a surface treatment such as gold or tin plating to form the terminal 520 °. The method includes the plating hole 460, 470, 480, and a multilayer flexible printed wiring board 600 plated through holes 490. 201247055 As can be seen from Fig. 5B, the terminal 520 is not disposed directly above the plating blind holes 460, 470, 480, and the plated through holes 490. This is for mounting a multilayer flexible printed wiring board in parallel, and the electronic device is typically a bare chip such as a Chip Size Package (CSP). In other words, when electronic components are mounted directly above the plating blind holes 460, 470, and 480 and the plated through holes 490, it is difficult to mount the electronic components in parallel with the printed wiring boards. In order to understand the reason, the installation process of the CSP is explained. First, a plurality of solder balls provided on the terminals of the CSP are placed on the printed wiring board so that the CSPs are placed directly above the plating blind holes 460, 470, and 480 and the plated through holes 490. Then, in the soldering process, the solder balls are dissolved to fix the CSP to the printed wiring board. However, as shown in FIG. 5B (5), since the depths of the plated blind holes 460, 470, 480, and the plated through holes 490 are different, the amount of molten solder sucked into the holes is different for each hole. . As a result, the CSP cannot mount the printed wiring board in parallel. Therefore, it is not possible to provide terminals directly above the plating holes 460, 470, 480, and the plated through holes 490, such as the terminals 5 20 shown in FIG. 5B (5), which must be in the self-plating holes 460, 470, 480, and a terminal is disposed at a position deviated from the right side of the plated through hole 490 to the left and right. In recent years, the miniaturization and high performance of electronic devices such as digital cameras have been remarkable, and the pitch of CSP pads has become increasingly narrow. Specifically, the pitch of the pads of about 0.8 mm is 0.5 mm or less, which corresponds to this, and the printed wiring board is required to have a higher density.

S -8- 201247055 However, as described above, in order to limit the position of the terminals, it has been difficult to mount a narrow-distance and multi-pin wafer in the past, for example, a CSP in which a pad of 10×10 or more is arranged with a gate voltage is very difficult. Therefore, it is considered that a pupil structure is formed by a filling plated treatment of a blind hole or a via hole. As described above, Patent Documents 2 and 3 propose a method in which the through-hole shape of the through hole is drum-shaped to form a through-hole. However, none of these documents is aimed at a single-layer substrate made of a single material, and is not applicable to a multilayer printed wiring board. For example, in the case of the multilayer printed wiring board shown in Fig. 5B (5), the processed layer is formed by laminating various materials having different processing characteristics such as an insulating film, an adhesive, and a copper foil. Therefore, even if laser processing or the like is employed, it is extremely difficult to process the layer to be processed into a drum shape in a longitudinal section. Furthermore, in the case of a multilayer printed wiring board, there are other problems. That is, the terminals of the electronic component are not only disposed on the through hole, but also must be disposed on the blind hole, but due to the through hole and the blind hole, the fluidity of the plating solution is different in structure, so there is a so-called It is quite difficult to handle in the same pupil plating process. More specifically, the pupil plating treatment has a feature that the fluidity of the electromineral liquid is low, and the efficiency is relatively easy. In the case of a bottomed blind hole, since the fluidity of the electromineral liquid is low, a good pupil structure can be obtained. On the other hand, in the case of a through hole, since the fluidity of the plating solution is high, it is not possible to efficiently charge the plated metal into the through hole. [Means for Solving the Problem] 201247055 According to an aspect of the present invention, a first outer layer circuit substrate including an inner layer circuit substrate and a dielectric layer laminated on a surface of a front inner circuit substrate; a second outer layer circuit substrate having an insulating layer laminated on the inner surface of the inner layer circuit substrate; and a first outer layer circuit coffin, a front inner circuit substrate, and a second outer circuit substrate Through hole, 塡charged metal plated through hole: the front through hole constitutes a first pinhole through which the first outer layer circuit substrate is connected, an inner layer through hole penetrating the inner layer circuit substrate, and a through hole The second pinhole of the second outer circuit substrate, the first and second pinholes, has a multilayer printed wiring board characterized by a minimum opening diameter larger than the maximum opening diameter of the inner layer through hole. According to another aspect of the present invention, there is provided a double-sided metal-clad laminate in which an insulating base film having flexibility and a metal foil formed on both surfaces of the insulating base film are prepared, and a metal-clad surface is formed in the thickness direction. The inner layer through hole of the laminated board is patterned by forming a metal foil of the double-sided metal-clad laminate, and an inner layer wiring pattern is formed, thereby preparing an inner layer circuit substrate, and having an insulating insulating base film, And the first and second metal-clad laminates of the metal foil formed on at least one of the insulating base films, and the metal foil of the first metal-clad laminate is patterned to form a first outer wiring pattern. The first outer circuit substrate is formed, and the metal foil of the second metal-clad laminate is patterned to form a second outer wiring pattern, thereby fabricating a second outer circuit substrate, which is preceded by the surface of the inner circuit substrate. The first outer layer circuit substrate is preceded by the first outer layer wiring pattern being placed on the outer side, and the insulating layer is laminated, and the second outer layer circuit substrate is preceded by the inner layer of the inner layer circuit substrate. Previously, the way the second outer wiring pattern was on the outside,

S -10- 201247055 Interlayering and laminating to form a multilayer circuit substrate, by performing a laser processing process for irradiating laser light to a predetermined field of the pre-recorded multilayer circuit substrate, The outer circuit substrate is a first pinhole that communicates with a minimum opening diameter larger than a maximum opening diameter of the inscribed inner layer through hole, and a through hole inner layer through hole and a second outer layer circuit substrate, and has a comparison The second through hole having the smallest opening diameter of the inner layer through hole having a large maximum opening diameter is formed, and a through hole penetrating the multilayer circuit substrate is formed, and a ruthenium plating process for charging and plating the front via hole is performed to form A method of manufacturing a multilayer printed wiring board in which an inner layer wiring pattern, a first outer layer wiring pattern, and a second outer layer wiring pattern of a pre-recorded through-hole are electrically connected. [Effect of the Invention] The through hole according to the embodiment of the present invention is configured to communicate with the first pinhole penetrating the first outer layer circuit substrate, the inner layer through hole penetrating the inner layer circuit substrate, and the second outer layer circuit. The second pinhole of the material. Further, the first and second pinholes have a minimum opening diameter which is larger than the maximum opening diameter of the inner layer through hole. In the through hole having such a configuration, the connecting portion of the first pinhole and the inner layer through hole and the connecting portion of the second pin hole and the inner layer through hole form a corner portion, and the metal plating is performed in the through hole. Further, by having a corner portion, the fluidity of the plating solution is lowered, and the plating metal is easily precipitated. Further, since the first and second pinholes are formed as a minimum opening diameter which is larger than the maximum opening diameter of the inner layer through hole, the hole diameter becomes smaller toward the inner layer side. Therefore, at the time of the pupil plating treatment, the inner layer through holes are first occluded by the electric ore metal, and the upper and lower v-shaped recesses are formed. In this way, it is possible to suppress the generation of gas-11 - 201247055 bubbles and the like, thereby forming a high-quality entangled through-hole. At the same time, the fluidity of the electro-mineral liquid is further reduced, so that the efficiency of the boring plating process can be improved. The formation time of the through hole. [Embodiment] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The components having the same functions in the respective drawings are denoted by the same reference numerals, and the detailed description of the components of the same reference numerals will not be repeated. Further, the surface is represented by the feature portion, and the relationship between the thickness and the plane size, the ratio of the thickness of each layer, and the like are different from the actual object. The method for manufacturing the multilayer printed wiring board according to the present embodiment will be described with reference to Figs. 1A, 1B, 2A, 2B, 3, 4A and 4B. First, the manufacturing method of the core substrate will be described using FIG. 1A. (1) A double-sided copper clad laminate 4 having a flexible insulating base film 1 made of polyimide or the like, and a copper foil 2 and a copper foil 3 formed on both surfaces of the insulating base film 1 . (2) Next, it can be understood from Fig. 1A (1) that the double-sided copper clad laminate 4 is formed by double-sided copper lamination by NC bit processing (or laser processing). The inner layer through hole 5 of the plate 4. (3) Next, as shown in Fig. 1A (1), it is understood that after the desmear treatment and the conductive treatment are performed on the inner layer via hole 5, the double layer of the inner layer via hole 5 is formed. Full plating treatment of copper laminated board 4 (example

S -12- 201247055 Such as electrolytic copper plating treatment). Thereby, the plating film 6 is formed on the inner walls of the copper foils 2, 3 and the inner layer vias 5, and the plated through holes 7 for electrically connecting the copper foil 2 and the copper foil 3 are formed. (4) Next, the double-sided conductive film (coating film 6 and copper foils 2, 3) of the insulating base film 1 is processed in a predetermined pattern by a subtractive process. More specifically, an etching layer (not shown) of a dry film resist or the like is formed so as to cover the plating film 6 and the plated through holes 7. Then, the etching layer is exposed and developed by a photosensitive etching process to define The pattern is used to process the etch layer. Then, the plating film 6 and the copper foils 2, 3 are etched by using the patterned etching layer as a mask to form the inner wiring patterns 8A, 8B. Then, the etching layer is peeled off. By the process thus far, as shown in Fig. 1A (1), the inner layer wiring patterns 8A and 8B are formed on the front surface and the inner surface, respectively, and the inner layer circuit substrate 10 having the plated through holes 7 is formed. Further, in the above-described order, although the plating treatment is performed after the formation of the inner layer via hole 5, the patterning of the copper foils 2 and 3 may be performed without performing the plating treatment. (5) Next, a cover layer 13 having an insulating film 12 made of a polyimide film or the like and an adhesive layer formed on one surface of the insulating film 12 is prepared. The subsequent agent layer 11 is made of, for example, an adhesive such as acryl, epoxy resin or the like. Further, in order to insulate and protect the inner layer wiring patterns 8A, 8B, the respective cover layers 13 are laminated on both sides of the inner layer circuit substrate 10 using a vacuum laminator or the like. Through this process, the core substrate 20 shown in Fig. 1 (2) is produced. Further, as shown in Fig. 1 (2), the inner layer wiring patterns 8A, 8B and the through-plated holes -13 - 201247055 are filled by the adhesive layer 11. Next, a method of manufacturing the outer layer circuit substrates 40 and 50 which are laminated layers of the core substrate 20 will be described with reference to Fig. 1B. (1) First, a double-sided copper clad laminate 34 and a double-sided copper clad laminate 44 are prepared. The double-sided copper-clad laminate 34 (44) has a flexible insulating base film 31 (41) made of polyimide or the like, and a copper foil 32 (42) formed on both sides and Copper foil 33 (43). (2) Next, the copper foils 32 and 33 of the double-sided copper clad laminate 34 are processed in a predetermined pattern by the subtractive method, whereby the outer layer substrate 40 shown in Fig. 1(a) is produced. . The copper foil 32 has openings 35, 37, and 38. The copper foil 33 has an outer layer wiring pattern 39 including an opening 36. Similarly, the copper foils 42, 43 of the double-sided copper laminate 44 are processed in a predetermined pattern. Thereby, the outer layer circuit substrate 50 shown in Fig. 1B(b) is produced. The copper foil 42 has an outer layer wiring pattern 49 including an opening 47, and the copper foil 43 has openings 45, 46, and 48. The openings 35 to 38 and the opening portions 45 to 48 are provided in a predetermined area in which the through holes or the blind holes are formed, and function as a conformal mask in the laser processing in the subsequent stage. Further, in Figs. 1B (a) and (b), the shapes of the opening portion 36 and the opening portion 45 when viewed from the lower side in the drawing are shown. In the case of the opening portions 36 and 45, the opening portions 36 and 45 are formed in a star shape having a plurality of concave portions in a leaf shape with reference to the minimum opening diameter, and the inner opening is tried to be based on the maximum opening diameter. A plurality of protrusions are formed. Next, the core substrate 20 and the outer layer produced by the above are used.

S -14-201247055 Circuit substrate 40 and outer layer circuit substrate 50, a method of producing the flexible printed wiring board of the present embodiment will be described. (1) As shown in Fig. 2A (1), the outer layer circuit substrates 40 and 50' are laminated on the surface of the core substrate 20 and the predetermined areas in which the adhesive layer 51' is laminated. Thereby, the multilayer circuit substrate 60 shown in Fig. 2A (2) is produced. In the field of unstacked multilayer circuit substrates, it is a flexible electric wire portion for pulling out wiring. Further, the adhesive material applied to the adhesive layer 51 is desirably a substance having a low flow rate of a so-called pre-stained body or an adhesive sheet. (2) Next, as shown in Fig. 2A (2) and (3), the laser beam (e.g., C02 laser) is irradiated toward the openings 35, 37, 38, 45, 46, and 48 of the multilayer circuit substrate 60, Perform a Conformal laser. Thereby, the through hole 61 and the blind holes 62 to 65 are formed. Then, the through holes 61 and the blind holes 62 to 65 are cleaned by a glue removal process or the like. As shown in FIG. 2A (3), the through hole 61 penetrates the multilayer circuit substrate 60 in the thickness direction, and penetrates the insulating base film 31, the adhesive layer 51 (upper side), and the insulating film in more detail from the upper side to the lower side in the drawing. 12 (upper side), adhesive layer 1 1 (upper side), adhesive layer 1 1 (lower side), insulating film 12 (lower side), adhesive layer 5 1 (lower side), and insulating base layer film 41. The blind via 62 penetrates through the insulating base film 31, the adhesive layer 51, the insulating film 12, and the adhesive layer 11, and the plating film is exposed at the bottom surface thereof by 6°. The blind via 62 is skipped on the outer circuit substrate. The skip via hole of the outer layer wiring pattern 39 inside the material 40. -15- 201247055 The blind via 63 penetrates the insulating base film 41, the adhesive layer 51, the insulating film 12, and the adhesive layer 11, and the plating film 6 is exposed on the bottom surface thereof. The window hole 63 is a step via hole in which the copper box 42 is exposed at the middle portion. The blind via 64 penetrates the insulating base film 31 and has a blind via which exposes the copper foil 33 on the bottom surface thereof. The blind via 65 penetrates the insulating base film 41, and the bottom surface thereof is a blind via which exposes the copper foil 42. Here, the structure of the through hole 61 will be described in more detail using Fig. 3 . Fig. 3 is an enlarged cross-sectional view showing a portion (A portion) which is framed by a broken line in Fig. 2A (3). The through hole 6 1 is configured to communicate with the inner layer through hole 5 , the pin hole 67 , and the pin hole 66 . The pin hole 67 is an upper hole formed by the opening portion 35 of the copper foil 32 as a mask and the copper foil 3 The opening portion 3 of 3 is a blind hole for a lower hole formed as a mask. As shown in Fig. 3, the diameter is increased in the order of the inner layer through hole 5, the lower hole of the pinhole 67, and the hole above the pinhole 67. That is, the diameter of the through hole penetrating the multilayer circuit substrate is smaller as the step toward the inner layer side. The pinhole 66 is a pinhole formed by the opening 45 of the copper foil 43 as a mask. As shown in Fig. 3, the diameter of the pinhole 66 is larger than the diameter of the inner layer through hole 5. In general, the maximum opening diameter of the inner layer through holes 5 provided in the inner layer circuit substrate 10 is smaller than the minimum opening diameter of the pin holes 66, 67 provided in the outer layer circuit substrates 40, 50. Here, the maximum opening diameter means the maximum flaw of the opening diameter. If the cross-sectional shape of the inner layer through hole 5 is a circle as shown in Fig. 3, the maximum opening diameter is the diameter of the circle (the length -16 - 201247055 degrees a in Fig. 3). Here, the minimum opening diameter means the minimum flaw of the opening diameter. If the cross-sectional shape of the lower hole of the pinhole 66 or the pinhole 67 is a star having a protrusion toward the inner side as shown in FIG. 3, the minimum opening diameter is such that the star faces face between the two protrusions. Distance (length b in Figure 3). Above and below the enlarged cross-sectional view of Fig. 3 is a plan view showing the through hole 6 1 when the through hole 61 is viewed from the upper side and the lower side, respectively. The cross section of the hole below the pinhole 67 is the same as the shape of the opening 36. Therefore, the side wall of the hole below the pinhole 6 7 reflects the star shape of the opening portion 36 to form irregularities. Similarly, the cross section of the pinhole 66 is the same as the shape of the opening 45. Therefore, the side wall of the pinhole 66 reflects the star shape of the opening portion 45 to form irregularities. (3) Next, as shown in Fig. 2B (4), the via hole 61 and the blind via holes 62 to 65 are subjected to a conductive process. Then, by using a boring plating treatment (electrolytic plating treatment) of an electric mineral liquid (a copper sulfate plating additive such as Top Lucina THF manufactured by Okuno Pharmaceutical Co., Ltd.) for the pupil plating treatment, in the through hole 61, and blind The holes 62 to 65 are internally filled with a metal plating 68 to form a through-hole 7 1 and pupils 72 to 75. Thereby, as shown in Fig. 2B (4), the multilayer circuit substrate 70 in which the metal ferrules 61 are filled and the blind holes 62 to 65 are obtained. Here, the manner in which the plating metal 68 is filled in the through hole 61 will be described in detail using Figs. 4A and 4B. As shown in Fig. 4A (1), in the initial stage of the treatment of the boring electrode, the plating metal -17-201247055 68 is precipitated centering on the corner portion c having a small fluidity of the boring plating solution. Then, the plating treatment is carried out in combination. As shown in Fig. 4A (2), the plating metal deposited in the through hole 61 has a drum shape in which the field D of the smallest diameter of the through hole 61 is the top. If further ferroelectric treatment is carried out, as shown in Figs. 4A (2) and (3), the through hole 61 is occluded in the field D by the plating metal 69. As a result, as shown in Fig. 4A (3), the upper and lower two-shaped concave portions 69 are formed. Since the concave portion 69 is formed, the fluidity of the plating solution is further lowered, thus promoting the electroplating of the pupil. Then, the pupil plating treatment is carried out in combination. As shown in Fig. 4B (4) and (5), the concave portion 69 becomes shallower and finally becomes a predetermined depth or less, and the pupil plating treatment is completed. In this manner, since the through hole 61' has the corner portion and the inner diameter becomes smaller, the through hole 61 can be filled with the plating metal 68 quickly without causing bubbles or the like. Further, the pupil holes 62, 63' 64, and 65 can be filled with the plating metal by the pupil plating treatment of the through holes 61. Thus, the plating boring process of the through hole 61 and the blind holes 62, 63, 64, 65 can be unified. Further, as will be described with reference to Fig. 3, the lower hole of the pinhole 67 and the side wall of the pinhole 66 are provided with a plurality of concave portions in a pleated shape. Since the fluidity of the plating solution is also lowered by the concave portion, the plating metal is precipitated to the concave portion at the time of the pupil plating treatment. As a result, the metal can be charged more quickly. (4) Next, as shown in FIG. 2B (5), for example, the conductive film of -18-201247055 of the surface layer of the multilayer circuit substrate 70 is etched in accordance with a predetermined pattern by the above-described subtractive method to form an outer layer wiring pattern. 80A and 80B. (5) Next, as shown in FIG. 2B (6), the solder resist 91 of the protective outer layer wiring patterns 80A and 80B is formed. The solder resist 91 has a predetermined portion where the terminal for mounting the component and the terminal for connection are formed. Opening portion 91a. Further, instead of the solder resist, a protective film of the outer layer wiring patterns 80A and 80B may be formed using a cover layer. (6) Next, as shown in Fig. 2B (6), the plating metal 68 exposed on the bottom surface of the opening 91a is subjected to a surface treatment such as gold plating or tin plating to form the terminal 92. Through the above process, the multilayer flexible printed wiring board 90 according to the embodiment of the present invention is completed. Next, the configuration of the multilayer flexible printed wiring board 90 of the present embodiment will be described. As shown in Fig. 2B (6), the multilayer flexible printed wiring board 90' is formed by laminating a plurality of circuit boards 40 and 50 on the surface and the inside of the inner layer circuit board 1A. The multilayer circuit substrate 40' is laminated on the surface of the inner layer circuit substrate 10 via an insulating layer (the adhesive layer 11, the insulating film 12, and the adhesive layer 51). The multilayer circuit substrate 50' is laminated on the inside of the inner layer circuit substrate 10 via an insulating layer (the adhesive layer 11, the insulating film 12' adhesive layer 51). Further, the multilayer flexible printed wiring board 90 is provided with a through hole 71 filled with a plating metal in the through hole 61' penetrating through the outer layer circuit board 40, the inner layer circuit board 10, and the outer layer circuit board 50. The through hole 61 is formed by a pinhole -19-201247055 67 that penetrates the outer layer circuit substrate 40, an inner layer through hole 5 that penetrates the inner layer circuit substrate 10, and a pinhole 66 that penetrates the outer layer circuit substrate 50. Further, the pinholes 66 and 67 have a minimum opening diameter which is larger than the maximum opening diameter of the inner layer through hole 5. The filling through hole 71 is a wiring pattern electrically connected to both surfaces of the outer layer circuit substrate 40, a wiring pattern provided on both surfaces of the inner layer circuit substrate 10, and a wiring pattern provided on both surfaces of the outer layer circuit substrate 50. The total is six floors. Further, a plating film 6 is provided on the side wall of the through hole 5, so that the reliability of the interlayer connection of the filling through hole 71 can be further improved. Further, in the multilayer flexible printed wiring board 90, the blind holes 72 to 75 are also provided in the blind holes. The surface vias 74, 75 are electrically connected to the two-layer wiring pattern provided on both sides of the outer layer circuit substrates 40, 50 of the build-up layer. The surface via 72 is a wiring pattern electrically connected to the double layer of the outer layer circuit substrate 40 and the inner layer circuit substrate 10. Further, the surface vi a 73 is electrically connected to the wiring pattern provided on both surfaces of the outer layer substrate 50 and the wiring pattern provided on both surfaces of the inner layer substrate 10 . As described above, in the multilayer flexible printed wiring board 90, the interlayer conductive circuit is constituted by a pupil structure. Thereby, as shown in Fig. 2B (6), the terminal 92 can be provided directly above the filling through hole 71 or the pupils 72 to 75. Therefore, the degree of freedom in the arrangement of the terminals is increased, and electronic components such as narrow-distance CSPs can be mounted in parallel to the multilayer flexible printed wiring board 90. As described above, according to the present invention, a multilayer printed wiring board capable of mounting electronic components such as a CSP having a narrow pitch can be obtained with a high degree of integration. Further, the multilayer flexible printed wiring board 90 may be provided as a pull-out

S -20- 201247055 Removable cable section with high degree of freedom. The flexible cable portion is formed to extend from a component mounting portion in which the outer layer substrate 40, 50 is laminated. In the above description of the embodiment, the outer layer circuit substrates 40 and 50 are formed using the double-sided copper clad laminates 34 and 44. However, the present invention is not limited thereto, and a single-sided copper clad laminate may be used. Fig. 6(A) is a cross-sectional view showing the multilayer printed wiring board 90A laminated on the core substrate 20, using the outer layer base materials 40A and 50A made of a single-sided copper clad laminate. As shown in Fig. 6(A), the outer layer base materials 40A and 50A are outer layer wiring patterns formed by processing a copper foil of a single-sided copper-clad laminate, and the outer layer wiring pattern is positioned on the outer side to make the outer layer The circuit substrates 40A and 50A are laminated on the surface and the inside of the core substrate 20 via the adhesive layer 51A. Further, in the above description of the embodiment, the core substrate 20 is formed by laminating the cover layer 13 on the inner layer substrate 1 and then the outer layer substrate is laminated on the core substrate 20. However, the present invention is not limited thereto. Therefore, the outer layer circuit substrate may be directly laminated on the inner layer circuit substrate 10. Fig. 6(B) is a cross-sectional view showing the multilayer printed wiring board 90B in which the outer layer circuit substrates 40B and 50B produced by the single-sided copper clad laminate are laminated on the inner layer substrate 10. As shown in Fig. 6(B), the outer layer base materials 40B and 50B are outer layer wiring patterns formed by processing a copper foil of a single-sided copper-clad laminate, and the outer layer wiring pattern is positioned on the outer side to make the outer layer The circuit substrates 40B and 50B are laminated on the surface and the inside of the inner layer circuit substrate 10 via the adhesive layer 51B. As can be seen from Fig. 6(B), the outer layer circuit substrates 40B and 50B may be laminated on the flexible cable portion in order to insulate the inner wiring pattern of the inner circuit substrate -21 - 201247055. Further, there are two major methods for laminating the outer layer substrate 40B, 50B to the inner layer circuit substrate 10. In the first method, the adhesive layer 51B is formed by filling the inner wiring patterns 8A and 8B of the inner layer substrate 10 and the plated through holes 7, and the outer layer substrate 40B is laminated on the adhesive layer 51B. The method of 50B and the second method are a method of using a single-sided copper-clad laminate having an adhesive layer on the surface on which one of the copper foils is not formed. In this method, the copper foil of the single-sided copper clad laminate is processed to form the outer layer base materials 40B, 50B, and the outer layer circuit substrates 40B, 50B are laminated on the inner layer circuit substrate 10. Further, the adhesive layer single-sided copper-clad laminate may be laminated on the inner layer substrate 1 and the copper foil on the surface may be processed to form an outer wiring pattern. Further, on the one side of the core substrate 20 (or the inner layer circuit substrate 1), the outer layer circuit substrate which has been formed may be laminated from the double-sided copper-clad laminate, and on the other side, The copper-clad laminate is initially laminated to the finished outer circuit substrate. The above description is directed to the multilayer printed wiring board of the present invention and a method of manufacturing the same. In the above description, the method of providing a wiring pattern and an opening by patterning a conductive film such as a copper foil is not limited thereto, and a semi-additive method (Semi) may be used. -additive

S -22- 201247055 process) and other methods. Further, the opening as a function of the positive projection mask may be formed after the outer layer substrate is laminated on the core substrate. In addition, as the laser processing method, it is also possible to use a method of directly projecting a mask, or to directly irradiate the conductive film with laser light, and to remove the conductive film and the direct laser processing of the insulating layer below it. law. Further, in the pinholes 66, 67, the shape of the cross section is not limited to the star shape shown in Fig. 3. In the pupil plating process, a structure (concavity or the like) for degrading the fluidity of the plating solution may be provided. Further, not only the lower hole of the pinhole 67 but also the concave portion may be provided on the side wall of the upper hole. Further, in the above-described embodiment, the multilayer flexible printed wiring board is described. However, the present invention is not limited thereto, and a Rigid-Flex printed wiring board or a multi-layer rigid printed (Rigid-Printed) wiring board is not limited thereto. Other multilayer printed wiring boards are also applicable to the present invention. Moreover, the wiring pattern or the plating metal is not limited to copper. In other words, in the description of the above embodiment, the metal constituting the wiring pattern and the plating metal to be filled into the pinhole or the like are copper. However, the present invention is not limited thereto, and for example, other metals such as aluminum or silver may be used. Further, the multilayer flexible printed wiring board of the embodiment described above is a wiring pattern having six layers, but is not limited thereto. The present invention can also be applied to a multilayer printed wiring board in which an outer layer circuit substrate is further laminated on the multilayer circuit substrates 40, 50. According to the above description, it is possible to consider the additional effects and various modifications of the present invention as long as it is the manufacturer. However, the embodiment of the present invention is not limited to the above-described embodiment of -23-201247055. Various additions, modifications, and partial additions and deletions may be made without departing from the spirit and scope of the invention as delineated from the scope of the invention and the equivalents thereof. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A is a cross-sectional view showing a process of manufacturing a multilayer flexible printed wiring board according to an embodiment of the present invention. Fig. 1B is a process sectional view showing a method of manufacturing a multilayer flexible printed wiring board according to an embodiment of the present invention. Fig. 2A is a process sectional view showing a method of manufacturing a multilayer flexible printed wiring board according to an embodiment of the present invention. Fig. 2B is a cross-sectional view showing the process of manufacturing a multilayer flexible printed wiring board according to an embodiment of the present invention, taken along line 2A. Fig. 3 is a cross-sectional view showing a portion A of Fig. 2A (3), and a plan view of the through hole. Fig. 4A is a cross-sectional view showing a state in which a metal plating is performed in a through hole. Fig. 4B is a cross-sectional view showing the form of the ruthenium plating metal in the through hole, continued from Fig. 4A. Fig. 5A is a process sectional view showing a method of manufacturing a multilayer flexible printed wiring board according to a comparative example. Fig. 5B is a cross-sectional view showing a process of manufacturing a multilayer flexible printed wiring board according to a comparative example, taken along line 5A. Figure 6 (A) is the outer layer that has been made from a single-sided copper clad laminate

S -24- 201247055 A cross-sectional view of a multilayer flexible printed wiring board in which a circuit substrate is laminated on a core substrate, and (B) a layered outer layer circuit substrate is laminated from a single-sided copper-clad laminate. A cross-sectional view of a multilayer flexible printed wiring board of a layer circuit substrate. [Explanation of main component symbols] 1: Insulation base film 2, 3: Copper case 4: Double-sided copper clad laminate 5: Inner layer through hole 6: Coating film 7: Plated through holes 8A, 8B: Inner layer wiring pattern 10 : inner layer circuit substrate 1 1 : adhesive layer 1 2 : insulating film 13 : covering cover 20 : core substrate 3 1 , 4 1 : insulating base film 32, 33, 42, 43 : copper foil 34, 44: double Copper-clad laminates 35, 36, 37, 38, 45, 46, 47, 48: openings 39, 49: outer layer wiring patterns 40, 40A, 40B, 50, 50A, 50B: outer layer substrate 51, 51A , 51B: adhesive layer - 25 - 201247055 60 : multilayer circuit substrate 6 1 : through hole

62, 63, 64, 65: blind 孑 L 6 6、6 7 : pinhole 68 : electroplated metal 69 : recess 70 : multilayer circuit substrate 7 1 : 贯通 filling through hole

72, 73, 74, 75: 塡孑L 80A, 80B: outer layer wiring pattern 9 0, 9 0 A, 9 0 B : multilayer printed wiring board 9 1 : solder resist 9 1 a : opening portion 92 : terminal 1 00 : Inner layer circuit substrate 1 1 〇: cover layer 120: adhesive layer 1 3 0 : insulating film 200: core substrate 2 1 0 : laminated adhesive layer 300: outer layer circuit substrate 3 1 0 : opening portion 400: multilayer Circuit substrate 4 1 0, 4 2 0 : blind hole

S -26- 201247055 430 : Through hole 45 0 : plating film 460, 470, 480 : plated hole 490 : plated through hole 5 0 0 : outer layer wiring pattern 5 1 0 : solder resist 5 1 0 a : opening portion 520 : Terminal 600: Multilayer Printed Wiring Board C: Corner Joint D: Central Area-27-

Claims (1)

201247055 VII. Patent application scope: 1. A multilayer printed wiring board, characterized by: having: an inner layer circuit substrate; and a first outer circuit substrate laminated with an insulating layer laminated on a surface of the inner circuit substrate a second outer layer circuit substrate on which the insulating layer is laminated on the inner surface of the inner circuit substrate; and a first outer circuit substrate, a front inner circuit substrate, and a second outer circuit substrate Through hole, 塡charged metal plated through hole: the front through hole constitutes a first pinhole that communicates with the first outer layer circuit substrate before, and an inner layer through hole that penetrates the inner layer circuit substrate, and The second pinhole of the second outer layer circuit substrate is preceded by the first and second pinholes, and has a minimum opening diameter larger than the maximum opening diameter of the inner layer through hole. 2. The multilayer printed wiring board according to the first aspect of the invention, wherein the first pinhole and/or the second pinhole have a concavity and convexity on a side wall thereof. The multilayer printed wiring board according to the first aspect of the invention, wherein the cross section of the first pinhole and/or the second pinhole of the front is a plurality of protrusions having an inner side. 4. The multilayer printed wiring board according to the first aspect of the invention, wherein the first outer layer circuit substrate and/or the second outer layer circuit substrate have a blind hole before the penetration, and further have a plating metal Pupil. The multilayer printed wiring board according to the first aspect of the invention, further comprising a flexible cable portion extending from a component mounting portion in which the first and second outer layer circuit substrates are stacked. 6. The multilayer printed wiring board according to claim 1, wherein the inner layer circuit substrate has flexibility and a double-sided wiring pattern respectively disposed on the first insulating base film; The first outer circuit substrate has a base film, and first and second outer wiring patterns respectively disposed on the second insulating base; the second outer flexible third insulating base film and the surface respectively disposed on the surface And the third and fourth outer wiring pattern holes therein are electrically connected to the first and second inner layer wirings to the fourth outer layer wiring pattern. 7. A method of manufacturing a multilayer printed wiring board comprising: a flexible insulating base film, a double-sided metal-clad laminate formed on the absolute foil, and an inner layer through hole formed in a metal-clad laminate. The first and second overlying first cladding metals are prepared by patterning the double-sided foil of the front surface to form an inner wiring pattern, thereby preparing a flexible base film and a metal foil having at least one surface. The metal foil of the laminated board is patterned and patterned to form a first outer layer circuit substrate, and the metal foil of the laminated board is patterned to form a second outer layer with a second outer layer circuit substrate, and an outer layer of the inner layer circuit is The circuit substrate, previously described as the first outer layer wiring type, is laminated with an insulating layer interposed therebetween, and the second outer layer circuit substrate is pre-recorded in the foregoing, and the second outer layer is previously described, and the insulating layer is laminated and laminated. The first insulating base film, the first and second inner layers: the surface of the flexible second insulating film and the inner layer of the circuit substrate have: a third insulating base film case; a pre-filled through pattern And the first note, which is characterized by: preparation margin The gold layer on both sides of the base film penetrates the front surface of the metal-clad laminate to form the inner layer circuit substrate into the metal laminated plate of the insulating base film, and the first outer layer wiring is formed before the second metal-clad layer pattern The surface of the fabricated material is formed by the inner and outer wiring patterns of the square circuit substrate on which the pre-recorded pattern is located outside, and the multilayered circuit layer -29-201247055 is formed here, by the predetermined field of the pre-recorded multilayer circuit substrate. Performing a laser processing process for irradiating the laser light to penetrate the first outer layer circuit substrate as a first pinhole having a minimum opening diameter larger than a maximum opening diameter of the inscribed inner layer through hole, and a through hole inner layer The through hole and the second outer layer circuit substrate of the foregoing, and having a second pinhole having a minimum opening diameter larger than a maximum opening diameter of the inner layer through hole, forming a through hole penetrating the multilayer circuit substrate beforehand, and performing The 塡 charge plating process for charging the metallization of the through hole ,, forming an electrical connection front inner wiring pattern, a first outer wiring pattern, and a second outer wiring pattern Chen filling the through-holes. 8. The method of manufacturing a multilayer printed wiring board according to claim 7, wherein the first metal-clad laminate and/or the second metal-clad laminate are preceded by a pre-recorded laser processing process. The metal foil has a through hole forming opening portion having a plurality of protrusions facing the inner side; and in the foregoing laser processing process, the orthographic projection mask processing for irradiating the laser beam to the front opening through hole forming portion is performed. The first pinhole having the same shape as the opening for forming the through hole is formed in the cross section. 9. The method of manufacturing a multilayer printed wiring board according to the seventh aspect of the invention, wherein the front inner layer through hole is formed, and the front inner layer through hole is formed before the front inner layer wiring pattern is formed. The first double-sided metal clad laminate is subjected to a plating treatment, thereby forming a plated through hole of the metal foil provided on both sides of the first double-sided metal clad laminate. The method for producing a multilayer printed wiring board according to the seventh aspect of the invention, wherein the first metal-clad laminate and/or the second metal-clad laminate are formed with an opening for forming a pupil; Laser light irradiation S -30- 201247055 The opening of the blind hole forming portion is performed in the front hole plating process, and the pupil is formed in the front. Positive projection pupil mask, forming a blind hole;