JPH0239113B2 - TASOHAISENBANNOSEIZOHOHO - Google Patents
TASOHAISENBANNOSEIZOHOHOInfo
- Publication number
- JPH0239113B2 JPH0239113B2 JP3245386A JP3245386A JPH0239113B2 JP H0239113 B2 JPH0239113 B2 JP H0239113B2 JP 3245386 A JP3245386 A JP 3245386A JP 3245386 A JP3245386 A JP 3245386A JP H0239113 B2 JPH0239113 B2 JP H0239113B2
- Authority
- JP
- Japan
- Prior art keywords
- plating
- wiring board
- holes
- layer circuit
- adhesive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000007747 plating Methods 0.000 claims description 21
- 239000000853 adhesive Substances 0.000 claims description 14
- 230000001070 adhesive effect Effects 0.000 claims description 14
- 239000003054 catalyst Substances 0.000 claims description 10
- 238000007772 electroless plating Methods 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 239000005011 phenolic resin Substances 0.000 description 3
- VTYYLEPIZMXCLO-UHFFFAOYSA-L Calcium carbonate Chemical compound [Ca+2].[O-]C([O-])=O VTYYLEPIZMXCLO-UHFFFAOYSA-L 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229920000459 Nitrile rubber Polymers 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- KMUONIBRACKNSN-UHFFFAOYSA-N potassium dichromate Chemical compound [K+].[K+].[O-][Cr](=O)(=O)O[Cr]([O-])(=O)=O KMUONIBRACKNSN-UHFFFAOYSA-N 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000007788 roughening Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 235000008331 Pinus X rigitaeda Nutrition 0.000 description 1
- 235000011613 Pinus brutia Nutrition 0.000 description 1
- 241000018646 Pinus brutia Species 0.000 description 1
- 229910000019 calcium carbonate Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
- 229920002803 thermoplastic polyurethane Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Description
【発明の詳細な説明】 産業上の利用分野 本発明は多層配線板の製造方法に関する。[Detailed description of the invention] Industrial applications The present invention relates to a method for manufacturing a multilayer wiring board.
従来の技術
従来の多層印刷配線板は、両面に配線パターン
を設けた内層基板と、銅貼り積層板とをプリプレ
グを用いて積層し、プレス加工を行つて一体化し
た後、穴明けを行い、全面に化学めつき、さらに
電気めつきを施し、エツチングレジストを塗布
し、不用な銅層をエツチングして配線板を製造し
ている。この方法によれば、電気銅めつきで基板
全面に銅管を形成し、後にエツチングで除去する
工程を経ているので銅の使用を無駄にしている。Conventional technology A conventional multilayer printed wiring board is made by laminating an inner layer board with wiring patterns on both sides and a copper-clad laminate using prepreg, pressing them to integrate them, and then drilling holes. Wiring boards are manufactured by chemically plating the entire surface, then electrolytically plating it, applying an etching resist, and etching the unnecessary copper layer. According to this method, the use of copper is wasted because the copper tube is formed on the entire surface of the board by electrolytic copper plating and then removed by etching.
また、穴明け作業は専用ドリルで行うが、この
ときの摩擦熱による影響で樹脂が溶融し、内層回
路の銅箔部分に付着し、スルーホール銅との導電
性を阻害し、冷熱サイクルを繰返すと断線事故の
原因となるので、スミヤ処理が不可欠であつた。 Additionally, the drilling process is done with a special drill, but the frictional heat generated during this process melts the resin and adheres to the copper foil of the inner layer circuit, impeding electrical conductivity with the through-hole copper and repeating the cooling/heating cycle. Smear treatment was essential, as this could lead to wire breakage accidents.
発明が解決しようとする問題点
本発明は無電解めつきを行つて、必要な箇所の
みに銅を析出させ、スミヤ処理を行わず、さらに
配線板のスルーホールの穴寸法が内部より入口部
が大なる構造とし、電子部品の端子挿入が容易に
行えるようにする。Problems to be Solved by the Invention The present invention performs electroless plating to deposit copper only in necessary locations, does not perform smearing, and furthermore, the through-hole dimensions of the wiring board are such that the entrance portion is closer to the inside than the inside. It has a large structure so that terminals of electronic parts can be easily inserted.
問題点を解決するための手段
本発明は、めつき触媒入りの接着剤を塗布した
めつき触媒入り積層板に穴明け加工を行い、内層
のめつきレジストを塗布して無電解めつきを行つ
てスルーホール両面配線板となし、この配線板の
スルーホール両面配線板となし、この配線板のス
ルーホールのランド部を除き全面にめつき触媒入
り絶縁インクとその上にめつき触媒入り接着剤を
塗布し、さらに外層回路用のめつきレジストを形
成し、無電解めつきを行つて外層回路とスルーホ
ールを形成する多層配線板の製造方法である。Means for Solving the Problems The present invention applies an adhesive containing a plating catalyst, drills holes in a laminate containing a plating catalyst, and applies an inner layer plating resist to perform electroless plating. This wiring board is made into a through-hole double-sided wiring board, and the entire surface of this wiring board is plated with catalyst-containing insulating ink except for the lands of the through-holes, and on top of that is plated catalyst-containing adhesive. This is a method for manufacturing a multilayer wiring board, in which a plating resist for an outer layer circuit is formed, and electroless plating is performed to form an outer layer circuit and through holes.
実施例
実施例 １
めつき触媒入り接着剤２を塗布した0.8mm厚の
紙フエノール樹脂積層板１を用い、パンチでスル
ーホール用の穴明け６を行い、めつきレジスト層
３を形成後、硼弗化水素酸と重クロム酸カリから
なる粗化液で露出している接着剤２の表面を化学
粗化し、洗浄後無電解めつき液で30μm厚のスル
ーホール４及び内層回路５を形成したスルーホー
ル両面配線板１０を製造する（第２図）。Examples Example 1 Using a 0.8 mm thick paper phenol resin laminate 1 coated with a plating catalyst-containing adhesive 2, holes 6 for through holes were punched, and after forming a plating resist layer 3, The exposed surface of the adhesive 2 was chemically roughened with a roughening solution consisting of hydrofluoric acid and potassium dichromate, and after cleaning, 30 μm thick through holes 4 and inner layer circuits 5 were formed with an electroless plating solution. A through-hole double-sided wiring board 10 is manufactured (FIG. 2).
この配線板１０の内層回路５の表面を接着性向
上のための黒化処理を行い、ランド部を除く全面
にめつき触媒入りのエポキシ樹脂系絶縁性インク
１１を50μm厚塗布し、さらに接着剤インク１２
（ニトリルゴム、フエノール樹脂、エポキシ樹脂
系）を30μm厚にスクリーン印刷法で塗布し硬化
する。 The surface of the inner layer circuit 5 of this wiring board 10 is subjected to a blackening treatment to improve adhesion, and an epoxy resin-based insulating ink 11 containing a plating catalyst is applied to a thickness of 50 μm on the entire surface except for the land portion, and an adhesive is further applied. ink 12
(Nitrile rubber, phenolic resin, epoxy resin type) is applied to a thickness of 30 μm using screen printing and cured.
なお、絶縁性インク１１はエポキシ樹脂の他に
ポリエステル樹脂、ウレタン樹脂等の熱硬化性樹
脂が用いられる。また、めつき触媒の入つていな
い積層板や接着剤を用いずにシーダ処理を行つて
もよい。さらに絶縁性インクの中に接着性成分で
あるニトリルゴムや、粗化液として炭酸カルシウ
ム粉末を入れて用いれば接着剤インク１２は省略
することができる。 Note that, in addition to epoxy resin, thermosetting resin such as polyester resin and urethane resin is used for the insulating ink 11. Further, the seeder treatment may be performed without using a laminate that does not contain a plating catalyst or an adhesive. Furthermore, the adhesive ink 12 can be omitted if nitrile rubber as an adhesive component or calcium carbonate powder as a roughening liquid is used in the insulating ink.
次に外層回路用めつきレジスト１４を塗布し、
接着剤１２表面を化学粗化し、無電解めつき液に
浸漬して30μm厚の外層回路１６とスルーホール
回路１７を形成し、４層の多層配線板２０ができ
る（第１図）。 Next, apply plating resist 14 for outer layer circuit,
The surface of the adhesive 12 is chemically roughened and immersed in an electroless plating solution to form a 30 μm thick outer layer circuit 16 and through-hole circuit 17, resulting in a four-layer multilayer wiring board 20 (FIG. 1).
この配線板２０を用いMIL−107D（−65℃
125℃）の冷熱サイクルで100サイクル以上の信頼
性を有し、半田（260℃10秒間）処理時に層間の
脹みがなく、層間にめつき液が浸透しての腐食や
シヨート現象は発生しない。 Using this wiring board 20, MIL-107D (-65℃
It has reliability of more than 100 cycles in the cooling/heating cycle (125℃), there is no swelling between layers during soldering (260℃ for 10 seconds), and no corrosion or shortening occurs due to plating liquid penetrating between layers. .
本発明の多層配線板２０は、スルーホール１７
の形状が内層回路のスルーホール４の上にさらに
外層スルーホール１７が形成されるので、穴寸法
が内部２１に対し入口部２２の面積が大きく形成
されている。 The multilayer wiring board 20 of the present invention has through holes 17
Since the outer layer through hole 17 is further formed above the through hole 4 of the inner layer circuit, the hole size is such that the area of the entrance portion 22 is larger than that of the inner layer 21.
実施例 ２
実施例１において、絶縁板１の材料として、紙
フエノール樹脂積層板の代りにガラスクロスとガ
ラスマツト系のエポキシ樹脂積層板を用いたとこ
ろ、MIL−107Dの冷熱サイクルテストで500回以
上の信頼性を確認できた。Example 2 In Example 1, glass cloth and a glass pine epoxy resin laminate were used instead of the paper phenol resin laminate as the material for the insulating board 1. The reliability was confirmed.
実施例 ３
実施例１において、内層配線板１０上に形成す
る絶縁性インク１１及び接着剤１２に塗布しない
箇所１８を設け、無電解めつきを行うことによ
り、内層回路５と外層回路１６とを接続する導電
回路１９が形成されるので、接続信頼性が優れた
４層の多層配線板２０が得られる。Example 3 In Example 1, by providing a portion 18 where the insulating ink 11 and adhesive 12 formed on the inner layer wiring board 10 are not coated, and performing electroless plating, the inner layer circuit 5 and the outer layer circuit 16 are connected. Since the connecting conductive circuit 19 is formed, a four-layer multilayer wiring board 20 with excellent connection reliability is obtained.
発明の効果
本発明は以上に述べた如き多層配線板の製造方
法であり、ドリルを用いずパンチで穴明けが行え
るので作業性良く、スミヤ処理が不必要となり、
電子部品の端子挿入が容易となり、さらに、スル
ーホールめつき厚が一部で２倍になるので半田あ
げ時の際に生じていた発生ガスを抑止できて、ブ
ローホールや半田飛散の問題が解決できた。Effects of the Invention The present invention is a method for manufacturing a multilayer wiring board as described above, and since holes can be punched without using a drill, the workability is good and smearing is not necessary.
It is easier to insert the terminals of electronic components, and because the through-hole plating thickness is doubled in some areas, gas generated during soldering can be suppressed, solving the problem of blowholes and solder scattering. did it.
第１図は本発明の断面図、第２図は内層のスル
ーホール配線板の断面図である。
図面において、１：絶縁板、２：接着剤、３：
めつきレジスト、４：スルーホール、１０：配線
板、１１：絶縁インク、１２：接着剤、１４：め
つきレジスト、１６：外層回路、１７：スルーホ
ール、２０：多層配線板。
FIG. 1 is a sectional view of the present invention, and FIG. 2 is a sectional view of an inner layer through-hole wiring board. In the drawings, 1: insulating plate, 2: adhesive, 3:
Plating resist, 4: Through hole, 10: Wiring board, 11: Insulating ink, 12: Adhesive, 14: Plating resist, 16: Outer layer circuit, 17: Through hole, 20: Multilayer wiring board.
Claims (1)
穴明け加工を行い、内層めつきレジスト層を形成
し、無電解めつきによりスルーホール両面配線板
となし、この配線板のスルーホール部を除き全面
にめつき触媒入り絶縁インクとその上にめつき触
媒入り接着剤を塗布し、さらに外層回路用のめつ
きレジストを形成し、無電解めつきを行つて外層
回路とスルーホールを形成することを特徴とする
多層配線板の製造方法。 ２ 内層回路と外層回路とを接続する導通回路を
形成した特許請求の範囲第１項記載の多層配線板
の製造方法。[Claims] 1. Holes are formed in a laminate plate coated with an adhesive containing a plating catalyst, an inner plating resist layer is formed, a through-hole double-sided wiring board is formed by electroless plating, and this wiring A plating catalyst-containing insulating ink and a plating catalyst-containing adhesive are applied to the entire surface of the board except for the through holes, and then a plating resist for the outer layer circuit is formed, and electroless plating is performed to complete the outer layer circuit. A method for manufacturing a multilayer wiring board, characterized by forming through-holes. 2. The method of manufacturing a multilayer wiring board according to claim 1, wherein a conductive circuit is formed to connect the inner layer circuit and the outer layer circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3245386A JPH0239113B2 (en) | 1986-02-17 | 1986-02-17 | TASOHAISENBANNOSEIZOHOHO |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3245386A JPH0239113B2 (en) | 1986-02-17 | 1986-02-17 | TASOHAISENBANNOSEIZOHOHO |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62190797A JPS62190797A (en) | 1987-08-20 |
| JPH0239113B2 true JPH0239113B2 (en) | 1990-09-04 |
Family
ID=12359384
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3245386A Expired - Lifetime JPH0239113B2 (en) | 1986-02-17 | 1986-02-17 | TASOHAISENBANNOSEIZOHOHO |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0239113B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5693339B2 (en) * | 2011-04-06 | 2015-04-01 | 日本メクトロン株式会社 | Multilayer printed wiring board and manufacturing method thereof |
| JP6016004B2 (en) * | 2011-09-29 | 2016-10-26 | 日立化成株式会社 | Wiring board and manufacturing method thereof |
-
1986
- 1986-02-17 JP JP3245386A patent/JPH0239113B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62190797A (en) | 1987-08-20 |
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