JPS5826839B2 - printed wiring board - Google Patents

printed wiring board

Info

Publication number
JPS5826839B2
JPS5826839B2 JP53152441A JP15244178A JPS5826839B2 JP S5826839 B2 JPS5826839 B2 JP S5826839B2 JP 53152441 A JP53152441 A JP 53152441A JP 15244178 A JP15244178 A JP 15244178A JP S5826839 B2 JPS5826839 B2 JP S5826839B2
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
insulating substrate
conductor
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53152441A
Other languages
Japanese (ja)
Other versions
JPS5578585A (en
Inventor
瑛一 綱島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP53152441A priority Critical patent/JPS5826839B2/en
Publication of JPS5578585A publication Critical patent/JPS5578585A/en
Publication of JPS5826839B2 publication Critical patent/JPS5826839B2/en
Expired legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】 本発明は絶縁基板の両面に設けた導体層間を該絶縁基板
の透孔に設けたスルホール導体で接続した両面印刷配線
板、多数の絶縁基板の表面に設けた導体層間を上記多数
の絶縁基板の夫々の上層絶縁基板の透孔に設けたスルホ
ール導体で接続した多層印刷配線板などの印刷配線板に
関するものであり、その目的とするところはスルホール
導体の信頼性を高めることにある。
Detailed Description of the Invention The present invention relates to a double-sided printed wiring board in which conductor layers provided on both sides of an insulating substrate are connected by through-hole conductors provided in through holes of the insulating substrate, This relates to a printed wiring board such as a multilayer printed wiring board in which the above-mentioned large number of insulating substrates are connected by through-hole conductors provided in the through-holes of the upper insulating substrate, and its purpose is to improve the reliability of the through-hole conductors. There is a particular thing.

一般に、両面印刷配線板、多層印刷配線板などの印刷配
線板においては複数の導体層間を電気的に短絡する手段
としてスルホール導体が使用されており、そのスルホー
ル導体は電気めっき法、化学めっき法によって作成して
いた。
Generally, in printed wiring boards such as double-sided printed wiring boards and multilayer printed wiring boards, through-hole conductors are used as a means of electrically shorting between multiple conductor layers, and the through-hole conductors are formed by electroplating or chemical plating. I was creating it.

しかしながら、電気めっき法の場合には蔭電極を必要と
し、高価な電源設備を用いなければならない欠点があり
、一方化学めっき法の場合には高価な電源設備を必要と
しないが、めっき液の適用温度・PHなどの条件が印刷
配線板のベース材を電気的・機械的に脆化させる傾向が
強いという問題があった。
However, the electroplating method requires a hidden electrode and requires the use of expensive power supply equipment, while the chemical plating method does not require expensive power supply equipment, but requires the use of a plating solution. There has been a problem in that conditions such as temperature and pH have a strong tendency to electrically and mechanically embrittle the base material of printed wiring boards.

しかも電気めっき法、化学めっき法ともにはんだ付は性
を保有させるために銅金属の適用をされている通常の場
合において、銅導体と前記印刷配線板のベース材の伸縮
率が異なるので、印刷配線板への部品取付は中あるいは
印刷配線板の使用中に発生する温度サイクル的要素の繰
り返しによる疲労断線を惹き起こすことが多かった。
Moreover, in the normal case where copper metal is applied to both electroplating and chemical plating to maintain properties, the expansion and contraction rates of the copper conductor and the base material of the printed wiring board are different. Attachment of components to the board often causes fatigue disconnections due to repeated temperature cycle factors that occur during use of printed wiring boards.

そのため前記印刷配線板のベース材としては伸縮率の大
きい紙基材フェノール樹脂積層板の使用を避けて伸縮率
が小さく、銅のそれに近づく高価なガラス布基材エポキ
シ樹脂積層板を使用せざるを得ないものであった。
Therefore, as the base material for the printed wiring board, it is necessary to avoid using paper-based phenolic resin laminates, which have a high expansion and contraction rate, and instead use expensive glass cloth-based epoxy resin laminates, which have a low expansion and contraction rate and are close to that of copper. It was something I couldn't get.

本発明はこのような従来の欠点を解消するものであり、
以下、本発明について実施例の図面とともに説明する。
The present invention solves these conventional drawbacks,
The present invention will be described below with reference to drawings of embodiments.

第1図は本発明の印刷配線板の一実施例を示し、図中1
は第1の絶縁基板であり、その一方の表面には導電性ペ
イントによる導体層3が形成されている。
FIG. 1 shows an embodiment of the printed wiring board of the present invention.
is a first insulating substrate, and a conductive layer 3 made of conductive paint is formed on one surface of the first insulating substrate.

4は上記第1の絶縁基板1の導体層3の形成面側に貼り
付けられた第2の絶縁基板であり、上記導体層3に対応
して透孔6が設けられている。
A second insulating substrate 4 is attached to the surface of the first insulating substrate 1 on which the conductor layer 3 is formed, and a through hole 6 is provided corresponding to the conductor layer 3 .

そして、上記第1.第2の絶縁基板1,4の貼付構造か
らなる多層印刷配線板12の透孔6より構成される窓1
3には導電性ペイントによるスルホール導体14が充填
され、図示のように中央が凹んだすりばち状に形成され
ている。
And the above 1. Window 1 consisting of through hole 6 of multilayer printed wiring board 12 consisting of the pasting structure of second insulating substrates 1 and 4
3 is filled with a through-hole conductor 14 made of conductive paint, and is formed into a dome shape with a concave center as shown in the figure.

このスルホール導体14のすりばち状の面を含んで絶縁
基板4の表面に銅の化学めっきによる導体層15を設け
る。
A conductor layer 15 is provided on the surface of the insulating substrate 4 including the dovetail-shaped surface of the through-hole conductor 14 by chemical plating of copper.

このとき導体層15も中央が凹んだすりばち状になる。At this time, the conductor layer 15 also has a concave shape with a concave center.

すなわちこの導体層15は、上記スルホール導体14を
介して上記第1の絶縁基板1の表面に設けた導体層3に
接続されている。
That is, this conductor layer 15 is connected to the conductor layer 3 provided on the surface of the first insulating substrate 1 via the through-hole conductor 14.

このような構造の多層印刷配線板12を構成する場合に
は、まず、第1のステップとして第2図に示すように第
1の絶縁基板1としてのJIS規格PP−7の厚さ16
0關の紙基材フェノール樹脂積層板を用意し、その一方
の面にエポキシ樹脂系ペイントを印刷して120〜13
0°C,30〜60分の条件で硬化させて樹脂下地層2
を形成する。
When configuring the multilayer printed wiring board 12 having such a structure, first, as a first step, as shown in FIG.
Prepare a paper-based phenolic resin laminate with a size of 120~13 mm and print epoxy resin paint on one side of it.
Cured at 0°C for 30 to 60 minutes to form resin base layer 2.
form.

そして、上記樹脂下地層2の表面に導電性ペイントとし
てデュポン社製の5504を使用して印刷法によって導
体層3を形成し、160℃、30分の条件で硬化させる
Then, a conductive layer 3 is formed on the surface of the resin base layer 2 by a printing method using 5504 manufactured by DuPont as a conductive paint, and cured at 160° C. for 30 minutes.

第2のステップとして第3図に示すように第2の絶縁基
板4としてのJIS規格PP−7の厚さ0.5皿の紙基
材フェノール樹脂積層板を用意し、その一方の面にエポ
キシ樹脂系ペイントを印刷して120〜130℃。
As a second step, as shown in Fig. 3, a paper-based phenolic resin laminate with a thickness of 0.5 plate of JIS standard PP-7 is prepared as the second insulating substrate 4, and one side of the paper-based phenolic resin laminate is coated with epoxy resin. Print resin paint at 120-130℃.

30〜60分の条件で硬化させて樹脂下地層5を形成し
、その樹脂下地層5を含めて上記第2の絶縁基板4に直
径1.0mmの透孔6を形成する。
A resin base layer 5 is formed by curing for 30 to 60 minutes, and a through hole 6 with a diameter of 1.0 mm is formed in the second insulating substrate 4 including the resin base layer 5.

第3のステップとして上記第4.第2の絶縁基板1゜4
のいずれか一方の面に設けた接着剤7または8によって
両紙縁基板1,4間を貼付して上記透孔6よりなる窓1
3を有する片面構造の多層印刷配線板12を調成する。
The third step is the above-mentioned 4. Second insulating substrate 1°4
A window 1 consisting of the above-mentioned through hole 6 is pasted between the two paper edge substrates 1 and 4 using an adhesive 7 or 8 provided on either one of the surfaces.
A multilayer printed wiring board 12 having a single-sided structure having a thickness of 3 is prepared.

この時、接着剤7または8は上記透孔6の天井部分を除
いて上記第1または第2の絶縁基板1,4に形成される
At this time, the adhesive 7 or 8 is formed on the first or second insulating substrate 1 or 4 except for the ceiling portion of the through hole 6.

また、接着剤7または8としては熱可塑性のものでもよ
いが、化学めっき浴の可能性を考慮して熱硬化型エポキ
シ樹脂を用い、150′Cの条件で硬化させて上記第1
.第2の絶縁基板1,4を永久的に貼付しておくことが
望ましい。
The adhesive 7 or 8 may be thermoplastic, but considering the possibility of using a chemical plating bath, a thermosetting epoxy resin is used and cured at 150'C.
.. It is desirable to permanently attach the second insulating substrates 1 and 4.

第4のステップとして第4図に示すように上述の片面構
造の多層印刷配線板12に対してメタルマスク16を配
置し、導電性ペイントとしてデュポン社の5504を使
用して印刷法によって上記窓13内にスルホール導体1
4を充填し、中央部にピンを押しつけて凹ませ略すりば
ち状となし、160℃、30分の条件で硬化させる。
As a fourth step, as shown in FIG. 4, a metal mask 16 is placed on the single-sided multilayer printed wiring board 12, and the window 13 is printed using DuPont's 5504 as a conductive paint. Through-hole conductor 1 inside
4, press a pin into the center to make a concave shape, and cure at 160°C for 30 minutes.

このスルホール導体14としての導電性ペイントは強ア
ルカリ性のめつき浴に対して侵されない性質を有してお
り、窓13の孔壁にめつき液を侵透させるよう゛なこと
もない。
The conductive paint used as the through-hole conductor 14 has a property of not being attacked by a strong alkaline plating bath, and does not allow the plating liquid to penetrate into the hole wall of the window 13.

第5のステップとして上述のようにスルホール導体14
を備えた片面構造の多層印刷配線板12,12を背中合
せに粘着性接着剤10を用いて仮接着する。
As a fifth step, as described above, the through-hole conductor 14 is
Multilayer printed wiring boards 12, 12 having a single-sided structure are temporarily bonded back to back using an adhesive adhesive 10.

第6のステップとして第5図に示すように上記多層印刷
配線板12,12の夫々の表面にめっきレジスト層9を
形成し、公知の化学めっき法により銅の導体層15を上
記スルホール導体14の部分を含めて形成する。
As a sixth step, as shown in FIG. 5, a plating resist layer 9 is formed on each surface of the multilayer printed wiring boards 12, 12, and a copper conductor layer 15 is formed on the through-hole conductor 14 by a known chemical plating method. Form including parts.

この時、上記多層印刷配線板12.12のパターン形成
面およびスルホール導体14の面に対してはセンシタイ
ズ、キャタライズ処理を施こし、たとえば次の無電銅析
出浴中において558C,50時間の条件で25μ厚の
銅のめつき導体層15を形成する。
At this time, the pattern forming surface of the multilayer printed wiring board 12.12 and the surface of the through-hole conductor 14 are subjected to sensitization and catalyzing treatment, for example, in the following electroless copper deposition bath at 558C for 50 hours to 25μ A thick copper plated conductor layer 15 is formed.

硫酸銅 0.03 モル/l力性ソー
ダ 0.125 nシアン化ソーダ
0.0004 ttホルムアルデヒド
o、os 〃シアミンチトウ酢酸 0.
036 1/水 残量 そして、最後に粘着性接着剤10の部分から両印刷配線
板12,12を引き離すことにより、2層の導体層15
,3間がスルホール導体14によって接続された多層印
刷配線板11を得ることができる。
Copper sulfate 0.03 mol/l Soda 0.125 n Sodium cyanide 0.0004 tt Formaldehyde
o, os 〃Cyamin titoacetic acid 0.
036 1/Remaining amount of water Then, finally, by separating both printed wiring boards 12, 12 from the adhesive 10, the two conductor layers 15 are removed.
, 3 are connected by through-hole conductors 14, thereby obtaining a multilayer printed wiring board 11.

なお、上記の実施例では片面構造の多層印刷配線板11
について説明したが、両面構造の多層印刷配線板とする
場合には粘着性接着剤10に代えて熱硬化性の接着剤を
使用して永久的な接着を行なえばよい。
In the above embodiment, the multilayer printed wiring board 11 has a single-sided structure.
However, in the case of a double-sided multilayer printed wiring board, a thermosetting adhesive may be used in place of the tacky adhesive 10 for permanent bonding.

以上のように本発明によれば、絶縁基板の透孔に導電性
ペイントによるスルホール導体を充填し、その一方の表
面に設けた導体層との間を銅の化学めっきによる導体層
で接続したので、銅めっきの管理、とくに孔壁部分での
厚さの管理を不要とし、めっき装置を簡略化し、めっき
液にスロウイングパワーを与えるための種々な添加物(
例えばゼラチン、デキストリンなど)の必要性を減じ、
めっき液のコスト低減に供するところ大である。
As described above, according to the present invention, the through-holes of the insulating substrate are filled with a through-hole conductor made of conductive paint, and the conductor layer provided on one surface of the through-hole conductor is connected with the conductor layer formed by chemical plating of copper. , various additives (
e.g. gelatin, dextrin, etc.)
This greatly contributes to reducing the cost of plating solutions.

特に本発明では充填されたスルホール導体の表面の中央
を凹ませすりばち状となし、かつその上に化学めっき導
体層を設けてすりばち状となしたことにより、はんだ付
工程などで熱が加えられた時熱応力を分散させることが
できるものである。
In particular, in the present invention, the center of the surface of the filled through-hole conductor is recessed to form a dome shape, and a chemically plated conductor layer is provided on top to form a dome shape, so that heat is not applied during the soldering process etc. It is capable of dispersing thermal stress.

すなわちスルホール導体の表面を平らにすれば熱応力等
により硬化した導電性ペイントが割れ、銅の化学めっき
導体層も切断されるという恐れが大きいものである。
That is, if the surface of the through-hole conductor is flattened, there is a great fear that the hardened conductive paint will crack due to thermal stress or the like, and the chemically plated copper conductor layer will also be cut.

これに対してすりばち状に形成した本発明の構成ではス
ルホール導体が熱応力等により割れることはなく、信頼
性を大きく向上できるものである。
In contrast, in the configuration of the present invention in which the through-hole conductor is formed into a dovetail shape, the through-hole conductor does not crack due to thermal stress or the like, and reliability can be greatly improved.

さらにスルホール導体が銀を含む導電性ペイントであっ
ても、その表面を化学めっき導体層により覆ってしまう
ので、導電性ペイントに半田レジストまたは溶融半田自
体などが直接触れることがなく、銀移行の発生を防止で
きさらに信頼性の向上を実現できるものである。
Furthermore, even if the through-hole conductor is a conductive paint containing silver, its surface is covered with a chemically plated conductor layer, so the solder resist or molten solder itself does not come into direct contact with the conductive paint, causing silver migration. It is possible to prevent this and further improve reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す印刷配線板の断面図、
第2図〜第5図は同印刷配線板の製造法を説明するため
の図である。 1.4・・・・・・絶縁基板、13・・・・・・窓、1
4・・・・・・スルホール導体、15・・・・・・銅の
化学めっき導体層。
FIG. 1 is a sectional view of a printed wiring board showing an embodiment of the present invention;
FIGS. 2 to 5 are diagrams for explaining the manufacturing method of the printed wiring board. 1.4...Insulating substrate, 13...Window, 1
4...Through-hole conductor, 15...Copper chemical plating conductor layer.

Claims (1)

【特許請求の範囲】[Claims] 1 絶縁基板に設けた透孔に導電性ペイントでなるスル
ホール導体を中央が凹んだすりばち状に充填するととも
に上記絶縁基板の少なくとも一方の露出される面側にお
いて上記すりばち状のスルホール導体面を覆うことによ
りすりばち状になる銅の化学めっき導体層を設け、上記
スルホール導体の一端は上記絶縁基板の一方の面に設け
た導体層と接続され、他端は上記絶縁基板の他方の面側
に設けられる導体層に上記銅の化学めっき導体層により
接続されたことを特徴とする印刷配線板。
1 Filling the through holes provided in the insulating substrate with a through-hole conductor made of conductive paint in the form of a mortar with a concave center, and covering the surface of the through-hole conductor in the form of a mortar on at least one exposed surface side of the insulating substrate. A chemically plated conductor layer of copper is provided in the form of a dovetail, one end of the through-hole conductor is connected to a conductor layer provided on one side of the insulating substrate, and the other end is provided on the other side of the insulating substrate. 1. A printed wiring board, characterized in that the conductor layer is connected to the copper chemically plated conductor layer.
JP53152441A 1978-12-07 1978-12-07 printed wiring board Expired JPS5826839B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53152441A JPS5826839B2 (en) 1978-12-07 1978-12-07 printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53152441A JPS5826839B2 (en) 1978-12-07 1978-12-07 printed wiring board

Publications (2)

Publication Number Publication Date
JPS5578585A JPS5578585A (en) 1980-06-13
JPS5826839B2 true JPS5826839B2 (en) 1983-06-06

Family

ID=15540588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53152441A Expired JPS5826839B2 (en) 1978-12-07 1978-12-07 printed wiring board

Country Status (1)

Country Link
JP (1) JPS5826839B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5841800B2 (en) * 1980-08-29 1983-09-14 富士通株式会社 Method of forming ceramic multilayer substrate
JPH0534138Y2 (en) * 1987-04-17 1993-08-30

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4867765A (en) * 1971-12-21 1973-09-17
JPS498757A (en) * 1972-05-20 1974-01-25

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4867765A (en) * 1971-12-21 1973-09-17
JPS498757A (en) * 1972-05-20 1974-01-25

Also Published As

Publication number Publication date
JPS5578585A (en) 1980-06-13

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