JP2002359469A - Wiring board, manufacturing method therefor, and electronic device - Google Patents

Wiring board, manufacturing method therefor, and electronic device

Info

Publication number
JP2002359469A
JP2002359469A JP2001165751A JP2001165751A JP2002359469A JP 2002359469 A JP2002359469 A JP 2002359469A JP 2001165751 A JP2001165751 A JP 2001165751A JP 2001165751 A JP2001165751 A JP 2001165751A JP 2002359469 A JP2002359469 A JP 2002359469A
Authority
JP
Japan
Prior art keywords
conductor
copper plating
insulating layer
wiring
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001165751A
Other languages
Japanese (ja)
Other versions
JP4780857B2 (en
Inventor
Takeshi Sunada
砂田  剛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2001165751A priority Critical patent/JP4780857B2/en
Publication of JP2002359469A publication Critical patent/JP2002359469A/en
Application granted granted Critical
Publication of JP4780857B2 publication Critical patent/JP4780857B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable wiring board, in which wiring conductors and through-conductors can be jointed surely to each other and no peeling occurs in junctions over a long time, even when thermal stresses are repetitively impressed upon the sections, and to provide a method of manufacturing the wiring board and an electronic device. SOLUTION: The wiring board 5 is constituted by alternately laminating plural insulation layers 1 and wiring conductors 2 upon another and electrically connecting the wiring conductors 2 to each other through the through-conductors 4 which are formed by packing conductors in through-holes 3 bored through the insulation layers 1. The wiring conductors 2 are composed of electroless- plated copper layers formed on the insulation layers 1 and electroplated copper layers, formed on the electroless-plated copper layers or copper foil provided on the insulation layer 1. The through-conductors 4 are composed of electroplated copper layers or electroplated copper formed on the copper foil.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、導体で充填した貫
通導体が電解銅めっきから成る配線基板およびその製造
方法ならびに電子装置に関する。特に、配線導体と貫通
導体とが確実に接合でき、長期の熱応力が繰返し印加さ
れても接続部分で剥離することがない信頼性の高い配線
基板およびその製造方法ならびに電子装置を提供するこ
とにある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board in which a through conductor filled with a conductor is made of electrolytic copper plating, a method of manufacturing the same, and an electronic device. In particular, it is an object of the present invention to provide a highly reliable wiring board that can reliably join a wiring conductor and a through conductor and that does not peel off at a connection portion even when a long-term thermal stress is repeatedly applied, a method of manufacturing the same, and an electronic device. is there.

【0002】[0002]

【従来の技術】一般に、現在の電子機器は、移動体通信
機器に代表されるように小型・薄型・軽量・高性能・高
機能・高品質・高信頼性が要求されてきており、このよ
うな電子機器に搭載される電子装置も小型・高密度化が
要求されるようになってきている。そのため、電子装置
を構成する配線基板にも小型・薄型・多端子化が求めら
れてきており、それを実現するために信号導体等の配線
導体の幅を細くするとともにその間隔を狭くし、さらに
配線導体の多層化により高密度配線化が図られている。
2. Description of the Related Art In general, current electronic devices are required to be small, thin, lightweight, high-performance, high-performance, high-quality, and high-reliable, as represented by mobile communication devices. Electronic devices mounted on various electronic devices have also been required to be reduced in size and density. For this reason, there has been a demand for smaller, thinner, and more terminals for the wiring boards that make up the electronic device, and in order to achieve this, the width of wiring conductors such as signal conductors has been reduced and the spacing between them has been reduced. High-density wiring has been achieved by increasing the number of wiring conductors.

【0003】このような高密度配線が可能な配線基板と
して、ビルドアップ法を採用して製作された配線基板が
知られている。ビルドアップ配線基板は、例えば、ガラ
スクロスやアラミド不布織等の補強材に耐熱性や耐薬品
性を有するエポキシ樹脂に代表される熱硬化性樹脂を含
浸させて硬化した芯体上に、エポキシ樹脂等の熱硬化性
樹脂から成るワニスを塗布するとともに加熱硬化して絶
縁層を形成した後、絶縁層にレーザで径が50〜200μm
程度の貫通孔を穿設し、次に、貫通孔内壁および絶縁層
表面を過マンガン酸カリウム溶液等の粗液で化学粗化
し、しかる後、無電解銅めっき法および電解銅めっき法
を用いて貫通孔内壁および絶縁層表面に銅の導体膜を被
着して貫通導体および配線導体を形成し、さらに、この
絶縁層上に上記と同様の工程を繰り返して複数の絶縁層
や配線導体・貫通導体の形成をおこなうことによって製
造される。
As a wiring board capable of such high-density wiring, a wiring board manufactured by employing a build-up method is known. The build-up wiring board is, for example, a core material obtained by impregnating a thermosetting resin typified by an epoxy resin having heat resistance and chemical resistance into a reinforcing material such as glass cloth or aramid non-woven cloth, and then curing the core with an epoxy. After applying a varnish made of a thermosetting resin such as a resin and heating and curing to form an insulating layer, the diameter of the insulating layer is 50 to 200 μm by laser.
About through holes, then chemically roughen the inner wall of the through holes and the surface of the insulating layer with a rough solution such as a potassium permanganate solution, and then use electroless copper plating and electrolytic copper plating. A copper conductor film is applied to the inner wall of the through hole and the surface of the insulating layer to form a through conductor and a wiring conductor. Further, the same steps as above are repeated on the insulating layer to form a plurality of insulating layers, wiring conductors, and through holes. It is manufactured by forming a conductor.

【0004】また、ビルドアップ配線基板をより高密度
化するために、配線導体の幅および間隔を狭める方法や
貫通孔の径を小さくし間隔を狭める方法が行われてお
り、最近では、貫通導体を垂直方向に配列してなるスタ
ックトビア構造が開発されている。
Further, in order to further increase the density of the build-up wiring board, a method of reducing the width and spacing of the wiring conductors and a method of reducing the diameter of the through hole to reduce the spacing have been performed. Are stacked in the vertical direction to form a stacked via structure.

【0005】このスタックトビア構造では、貫通導体を
垂直方向に配列し電気的に接続するため、貫通孔内部を
銅めっきで充填してフィルドビア構造にする必要があ
る。
In this stacked via structure, in order to arrange the through conductors in the vertical direction and electrically connect them, it is necessary to fill the inside of the through holes with copper plating to form a filled via structure.

【0006】貫通孔内部を銅めっきを充填したフィルド
ビア構造とする方法としては、めっき液にレベリング
剤を添加する方法、PRC方法(Pulsed Reversed Curre
nt method)がある。めっき液にレベリング剤を添加
する方法は、レベリング剤を添加することにより絶縁層
表面の電解銅めっき層の成長を抑えながら貫通孔内壁へ
銅めっきを被着させ、貫通孔内部を電解銅めっきで充填
する方法である。また、PRC方法は、パルスめっき方
法の一つで、電解銅めっき電流のマイナスとプラスとを
一定の周期で逆転するもので、電流がプラスのとき銅め
っき層が溶解することから、電流が集中する凸部の銅め
っき成長が妨げられるとともに凹部の貫通孔内壁に優先
的に銅めっきが被着され、その結果、貫通孔内部を電解
銅めっきで充填する方法である。
As a method of forming a filled via structure in which the inside of the through hole is filled with copper plating, a method of adding a leveling agent to a plating solution, a PRC method (Pulsed Reversed Curing).
nt method). The method of adding a leveling agent to the plating solution is to apply a leveling agent to deposit copper plating on the inner wall of the through hole while suppressing the growth of the electrolytic copper plating layer on the surface of the insulating layer, and electrolytic copper plating the inside of the through hole. It is a method of filling. In addition, the PRC method is a pulse plating method in which the negative and positive values of the electrolytic copper plating current are reversed at a constant cycle.When the current is positive, the copper plating layer dissolves, so the current is concentrated. In this method, copper plating is prevented from growing on the protrusions and copper plating is preferentially applied to the inner walls of the through holes in the recesses. As a result, the inside of the through holes is filled with electrolytic copper plating.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、めっ
き液にレベリング剤を添加する方法では、電解銅めっき
により貫通孔内を充填していくために、必ず下地電極と
して無電解銅めっきが必要であり、貫通導体に電解銅め
っきと無電解銅めっきとの接合面が生成される。電解銅
めっきは、その粒径が無電解銅めっきの粒径に比べて大
きくまた密度が高いために無電解銅めっきとの接合強度
が低くなり、貫通導体を垂直に配列したスタックトビア
構造において、長期の熱応力が繰返し印加されると無電
解銅めっきと電解銅めっきの接合部分で剥離してしま
う。その結果、その剥離が貫通導体と配線導体との接続
部まで延びて、貫通導体と配線導体とを断線させてしま
うという問題点を有していた。さらに、貫通導体の電解
銅めっきの熱膨張係数が18ppm/℃程度であるのに対
して、絶縁層の厚み方向の熱膨張係数が80〜200 ppm
/℃程度と大きいために貫通導体と絶縁層との間に熱膨
張差による大きな熱応力が生じ、温度サイクル試験にお
いて、貫通導体と絶縁層とが剥離し、その結果、貫通導
体内部で断線してしまうという問題点を有していた。
However, in the method of adding a leveling agent to a plating solution, electroless copper plating is always required as a base electrode in order to fill the through holes by electrolytic copper plating. A bonding surface between the electrolytic copper plating and the electroless copper plating is generated on the through conductor. Electrolytic copper plating, the particle size is larger than the particle size of the electroless copper plating and the density is high, so the bonding strength with the electroless copper plating is low, and in a stacked via structure in which through conductors are arranged vertically, If a long-term thermal stress is repeatedly applied, it will peel off at the joint between electroless copper plating and electrolytic copper plating. As a result, there has been a problem that the peeling extends to a connection portion between the through conductor and the wiring conductor, and the through conductor and the wiring conductor are disconnected. Furthermore, while the thermal expansion coefficient of the electrolytic copper plating of the through conductor is about 18 ppm / ° C., the thermal expansion coefficient in the thickness direction of the insulating layer is 80 to 200 ppm.
/ ° C, a large thermal stress occurs due to a difference in thermal expansion between the penetrating conductor and the insulating layer. In the temperature cycle test, the penetrating conductor and the insulating layer are separated, and as a result, a break occurs inside the penetrating conductor. Had the problem that

【0008】また、PRC法は、上記と同様な問題点の
他に、めっき方法が複雑なことからめっき時間が長くな
り、さらに、通常の電解銅めっきで使用される電源装置
より高価な装置が必要になるという問題点を有してい
た。
[0008] In addition to the problems described above, the PRC method requires a longer plating time due to the complicated plating method, and requires a more expensive apparatus than a power supply apparatus used in ordinary electrolytic copper plating. There was a problem that it became necessary.

【0009】本発明はかかる従来技術の問題点に鑑み完
成されたものであり、その目的は、配線導体と貫通導体
とが確実に接合でき、貫通導体を垂直に配列したスタッ
クトビア構造において長期の熱応力が繰返し印加されて
も接続部分で剥離することがない高信頼性の配線基板お
よびその製造方法ならびに電子装置を提供することにあ
る。
The present invention has been completed in view of the above-mentioned problems of the prior art, and an object of the present invention is to provide a stacked via structure in which a wiring conductor and a through conductor can be reliably joined and a through conductor is vertically arranged. An object of the present invention is to provide a highly reliable wiring board which does not peel off at a connection portion even when thermal stress is repeatedly applied, a method of manufacturing the same, and an electronic device.

【0010】[0010]

【課題を解決するための手段】本発明の配線基板は、複
数の絶縁層と配線導体とが交互に積層されるとともに上
下の配線導体間を絶縁層に形成された貫通孔を導体で充
填して成る貫通導体により電気的に接続して成る配線基
板において、配線導体は、絶縁層上の無電解銅めっき層
およびこの無電解銅めっき層上の電解銅めっき層または
絶縁層上の銅箔から成り、かつ貫通導体の導体は、電解
銅めっき層または銅箔上に形成された電解銅めっきから
成ることを特徴とするものである。
According to the present invention, there is provided a wiring board in which a plurality of insulating layers and wiring conductors are alternately stacked, and a through hole formed in the insulating layer between upper and lower wiring conductors is filled with a conductor. In the wiring board electrically connected by the through conductors, the wiring conductor is formed of an electroless copper plating layer on the insulating layer and an electrolytic copper plating layer on the electroless copper plating layer or a copper foil on the insulating layer. And the conductor of the through conductor is formed of an electrolytic copper plating layer or electrolytic copper plating formed on a copper foil.

【0011】また、本発明の配線基板は、上記構成にお
いて、絶縁層の厚み方向の熱膨張係数が20〜60ppm/
℃であることを特徴とするものである。
Further, in the wiring board according to the present invention, the thermal expansion coefficient in the thickness direction of the insulating layer is 20 to 60 ppm /
° C.

【0012】本発明の配線基板の製造方法は、第一の絶
縁層上に無電解銅めっき層および無電解銅めっき層上の
電解銅めっき層または銅箔から成る第一の配線導体を形
成する工程と、第一の配線導体が形成された第一の絶縁
層上に第二の絶縁層を積層する工程と、第一の配線導体
上に位置する第二の絶縁層に貫通孔を形成する工程と、
第二の絶縁層上および貫通孔内に無電解銅めっき層を被
着する工程と、第二の絶縁層上の無電解銅めっき層を耐
めっき樹脂層で被覆する工程と、貫通孔内に露出した無
電解銅めっき層を除去する工程と、第一の配線導体から
通電して電解銅めっきで貫通孔を充填する工程と、耐め
っき樹脂層を剥離した後、第二の絶縁層上の無電解めっ
き層上に電解銅めっき層を被覆して第二の配線導体を形
成する工程とを順次行なうことを特徴とするものであ
る。
According to the method of manufacturing a wiring board of the present invention, an electroless copper plating layer and a first wiring conductor formed of an electrolytic copper plating layer or a copper foil on the electroless copper plating layer are formed on the first insulating layer. A step of laminating a second insulating layer on the first insulating layer on which the first wiring conductor is formed, and forming a through hole in the second insulating layer located on the first wiring conductor. Process and
A step of applying an electroless copper plating layer on the second insulating layer and in the through-hole, a step of coating the electroless copper plating layer on the second insulating layer with a plating-resistant resin layer, and The step of removing the exposed electroless copper plating layer, the step of applying a current from the first wiring conductor and filling the through hole with electrolytic copper plating, and after peeling off the plating-resistant resin layer, on the second insulating layer And forming a second wiring conductor by covering the electroless plating layer with an electrolytic copper plating layer.

【0013】本発明の電子装置は、上記の配線基板の表
面に配線導体と電気的に接続された電子部品の実装用電
極を有するとともに、実装用電極に電子部品の電極を電
気的に接続して成ることを特徴とするものである。
An electronic device according to the present invention has a mounting electrode for an electronic component electrically connected to a wiring conductor on a surface of the wiring board, and electrically connects an electrode of the electronic component to the mounting electrode. It is characterized by comprising.

【0014】本発明の配線基板によれば、貫通導体の導
体を、電解銅めっき層または銅箔上に形成された電解銅
めっきから成るものとしたことから、配線導体と貫通導
体との接合が強固なものとすることができる。また、貫
通導体に無電解銅めっきと電解銅めっきとの接合部がな
く、その結果、貫通導体を垂直に配列したスタックトビ
ア構造において長期の熱応力が繰返し印加されたとして
も貫通導体にクラックが発生しないので、貫通導体と配
線導体間で断線することのない接続信頼性の高い配線基
板とすることができる。
According to the wiring board of the present invention, since the conductor of the through conductor is made of the electrolytic copper plating layer or the electrolytic copper plating formed on the copper foil, the connection between the wiring conductor and the through conductor is made. It can be strong. Also, there is no joint between the electroless copper plating and the electrolytic copper plating on the through conductor, and as a result, cracks may occur in the through conductor even if long-term thermal stress is repeatedly applied to the stacked via structure in which the through conductors are vertically arranged. Since no wiring is generated, a wiring board having high connection reliability without disconnection between the through conductor and the wiring conductor can be provided.

【0015】また、本発明の配線基板によれば、絶縁層
の厚み方向の熱膨張係数を20〜60ppm/℃としたこと
から、貫通導体と絶縁層との間に発生する熱膨張差によ
る応力が小さなものとなり、温度サイクル試験におい
て、貫通導体と絶縁層とが剥離して、貫通導体内部で断
線してしまうことのない高信頼性の配線基板とすること
ができる。
Further, according to the wiring board of the present invention, since the thermal expansion coefficient in the thickness direction of the insulating layer is set to 20 to 60 ppm / ° C., the stress due to the difference in thermal expansion generated between the through conductor and the insulating layer. Can be reduced, and a highly reliable wiring board can be obtained in which the through conductor and the insulating layer are not separated from each other in the temperature cycle test and the inside of the through conductor is disconnected.

【0016】本発明の配線基板の製造方法によれば、第
一の配線導体から通電して電解銅めっきで貫通孔を充填
することから、貫通孔内壁に無電解銅めっきを被着させ
なくても、貫通導体の導体を電解銅めっきで良好に形成
できる。また、通常の電解銅めっき装置を用いて効率良
く貫通孔を電解銅めっきで充填できる。
According to the method of manufacturing a wiring board of the present invention, since the current is supplied from the first wiring conductor and the through hole is filled with electrolytic copper plating, the inner wall of the through hole is not coated with electroless copper plating. Also, the conductor of the through conductor can be favorably formed by electrolytic copper plating. Further, the through holes can be efficiently filled with electrolytic copper plating using a normal electrolytic copper plating apparatus.

【0017】本発明の電子装置によれば、上記の配線基
板の表面に配線導体と電気的に接続された電子部品の実
装用電極を有するとともに、実装用電極に電子部品の電
極を電気的に接続して成ることから、小型で高信頼性の
電子装置とすることができる。
According to the electronic device of the present invention, the surface of the wiring board has a mounting electrode of the electronic component electrically connected to the wiring conductor, and the mounting electrode is electrically connected to the electrode of the electronic component. Since they are connected, a small and highly reliable electronic device can be obtained.

【0018】[0018]

【発明の実施の形態】次に、本発明の配線基板および電
子装置を図面に基づいて詳細に説明する。図1は、本発
明の配線基板およびこれを用いた電子装置の実施の形態
の一例を示す断面図である。
Next, a wiring board and an electronic device according to the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view illustrating an example of an embodiment of a wiring board and an electronic device using the same according to the present invention.

【0019】これらの図において、1は絶縁層、2は配
線導体、3は貫通孔、4は貫通導体であり、主にこれら
で本発明の配線基板5が構成される。また、配線基板5
に半導体素子等の電子部品6を搭載することにより本発
明の電子装置7が構成される。
In these figures, 1 is an insulating layer, 2 is a wiring conductor, 3 is a through hole, and 4 is a through conductor, and these mainly constitute the wiring board 5 of the present invention. Also, the wiring board 5
The electronic device 7 of the present invention is configured by mounting an electronic component 6 such as a semiconductor element on the electronic device 6.

【0020】配線基板5は、電子部品6を搭載する機能
を有し、例えばガラス繊維を縦横に織り込んだガラスク
ロスにエポキシ樹脂やビスマレイミドトリアジン樹脂等
の熱硬化性樹脂を含浸させて成る板状の芯体絶縁層1a
の上下面にエポキシ樹脂や変性ポリフェニレンエーテル
樹脂等の熱硬化性樹脂から成る絶縁層1と銅めっき膜ま
たは銅箔から成る配線導体2をそれぞれ複数層ずつ交互
に積層して成る。
The wiring board 5 has a function of mounting the electronic components 6, and is formed in a plate-like shape by impregnating a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin into a glass cloth in which glass fibers are woven vertically and horizontally. Core insulating layer 1a
An insulating layer 1 made of a thermosetting resin such as an epoxy resin or a modified polyphenylene ether resin and a wiring conductor 2 made of a copper plating film or a copper foil are alternately laminated on a plurality of layers on the upper and lower surfaces, respectively.

【0021】芯体絶縁層1aは、絶縁層1の支持体とし
て機能し、厚みが0.3〜1.5mm程度であり、その上面か
ら下面にかけて直径が0.1〜1.0mm程度の複数のスルー
ホール11を有している。そして、その上下面には銅めっ
き膜または銅箔から成る配線導体2が、スルーホール11
の内壁には銅めっき膜12が被着されており、上下面の配
線導体2がスルーホール11の銅めっき膜12を介して電気
的に接続されている。
The core insulating layer 1a functions as a support for the insulating layer 1, has a thickness of about 0.3 to 1.5 mm, and has a plurality of through holes 11 with a diameter of about 0.1 to 1.0 mm from the upper surface to the lower surface. are doing. Wiring conductors 2 made of a copper plating film or a copper foil are provided on the upper and lower surfaces thereof through holes 11.
A copper plating film 12 is adhered to the inner wall of the substrate, and the wiring conductors 2 on the upper and lower surfaces are electrically connected through the copper plating film 12 of the through hole 11.

【0022】このような芯体絶縁層1aは、ガラスクロ
スに未硬化の熱硬化性樹脂を含浸させたシートを熱硬化
させた後、これに上面から下面にかけてドリル加工を施
してスルーホール11を穿設することにより得られる。
Such a core insulating layer 1a is formed by thermally curing a sheet in which glass cloth is impregnated with an uncured thermosetting resin, and then drilling this from the upper surface to the lower surface to form a through hole 11. Obtained by drilling.

【0023】芯体絶縁層1a上下面の配線導体2は、芯
体絶縁層1a用のシートの上下全面に厚みが3〜50μm
の銅めっき膜または銅箔を被着しておくとともにこの銅
めっき膜または銅箔をシートの硬化後にエッチング加工
することにより所定のパターンに形成される。また、ス
ルーホール11内壁の銅めっき膜12は、芯体絶縁層1aに
スルーホール11を設けた後に、このスルーホール11にめ
っき法により厚みが3〜50μm程度の銅めっきを析出さ
せることにより形成される。
The wiring conductors 2 on the upper and lower surfaces of the core insulating layer 1a have a thickness of 3 to 50 μm on the entire upper and lower surfaces of the sheet for the core insulating layer 1a.
The copper plating film or the copper foil is adhered, and this copper plating film or the copper foil is etched after the sheet is cured to form a predetermined pattern. The copper plating film 12 on the inner wall of the through hole 11 is formed by providing the through hole 11 in the core insulating layer 1a and then depositing a copper plating having a thickness of about 3 to 50 μm on the through hole 11 by a plating method. Is done.

【0024】さらに、芯体絶縁層1aは、そのスルーホ
ール11の内部にエポキシ樹脂やビスマレイミドトリアジ
ン樹脂等の熱硬化性樹脂から成る樹脂柱13が充填されて
いる。樹脂柱13は、スルーホール11を塞ぐことによりス
ルーホール11の直上および直下に絶縁層2を形成可能と
するためのものであり、未硬化のペースト状の熱硬化性
樹脂をスルーホール11内にスクリーン印刷法により充填
し、これを加熱して硬化させた後、その上下面を略平坦
に研磨することにより形成される。そして、この樹脂柱
13を含む芯体絶縁層1aの上下面に絶縁層1および配線
導体2が積層される。
Further, in the core insulating layer 1a, a resin column 13 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin is filled in the through hole 11. The resin pillars 13 are for allowing the insulating layer 2 to be formed directly above and directly below the through holes 11 by closing the through holes 11, and an uncured paste-like thermosetting resin is placed in the through holes 11. It is formed by filling by a screen printing method, heating and curing, and then polishing the upper and lower surfaces thereof to be substantially flat. And this resin pillar
The insulating layer 1 and the wiring conductor 2 are laminated on the upper and lower surfaces of the core insulating layer 1a including 13.

【0025】芯体絶縁層1aの上下面に積層された絶縁
層1は、それぞれの厚みが10〜80μm程度であり、各層
の上面から下面にかけて直径が20〜100μm程度の貫通
孔3を有している。これらの絶縁層1は、配線導体2を
高密度に配線するための絶縁間隔を提供するためのもの
である。そして、上下の配線導体2は、絶縁層1に形成
された貫通孔3を充填して成る貫通導体4で電気的に接
続されている。そして、これにより高密度配線を立体的
に形成可能としている。
The insulating layer 1 laminated on the upper and lower surfaces of the core insulating layer 1a has a thickness of about 10 to 80 μm, and has a through hole 3 having a diameter of about 20 to 100 μm from the upper surface to the lower surface of each layer. ing. These insulating layers 1 are for providing an insulating interval for wiring the wiring conductors 2 at high density. The upper and lower wiring conductors 2 are electrically connected by a through conductor 4 that fills a through hole 3 formed in the insulating layer 1. Thus, high-density wiring can be formed three-dimensionally.

【0026】絶縁層1は、エポキシ樹脂・ビスマレイミ
ドトリアジン樹脂や変性ポリフェニレンエーテル樹脂等
の熱硬化性樹脂とシリカ等の無機絶縁フィラーとから成
り、絶縁層1の厚み方向の熱膨張係数が20〜60ppm/
℃であることが好ましい。絶縁層1が硬く脆くなりクラ
ックが発生するということを防止するという観点からは
20ppm/℃以上が好ましく、貫通導体4との熱膨張差
による貫通導体4内部での断線を防止するという観点か
らは60ppm/℃以下であることが好ましい。絶縁層1
の熱膨張係数を20〜60ppm/℃とするには、シリカ等
の無機絶縁フィラーを熱硬化性樹脂に対して50〜80重量
%程度添加すればよい。このような絶縁層1は、例えば
エポキシ樹脂とシリカの混合物に有機溶剤・可塑剤等を
添加した混合物を、従来周知のドクターブレード法を採
用して製作される。
The insulating layer 1 is made of a thermosetting resin such as an epoxy resin / bismaleimide triazine resin or a modified polyphenylene ether resin, and an inorganic insulating filler such as silica. 60 ppm /
C. is preferred. From the viewpoint of preventing the insulating layer 1 from becoming hard and brittle and causing cracks,
It is preferably at least 20 ppm / ° C., and more preferably at most 60 ppm / ° C. from the viewpoint of preventing disconnection inside the through conductor 4 due to a difference in thermal expansion from the through conductor 4. Insulation layer 1
In order to make the coefficient of thermal expansion 20 to 60 ppm / ° C., an inorganic insulating filler such as silica may be added in an amount of about 50 to 80% by weight based on the thermosetting resin. Such an insulating layer 1 is manufactured by using a mixture of an epoxy resin and silica to which an organic solvent, a plasticizer, and the like are added, for example, by using a well-known doctor blade method.

【0027】また、絶縁層1の表面には配線導体2が形
成されており、さらに、絶縁層1には貫通孔3が穿設さ
れているとともに、この内部には上下の配線導体2を電
気的に接続する貫通導体4が形成されている。配線導体
2および貫通導体4は、搭載する電子部品6を外部電気
回路の配線導体(図示せず)に電気的に接続する機能を
有する。
A wiring conductor 2 is formed on the surface of the insulating layer 1, and a through hole 3 is formed in the insulating layer 1. A through conductor 4 is formed to be electrically connected. The wiring conductor 2 and the through conductor 4 have a function of electrically connecting the mounted electronic component 6 to a wiring conductor (not shown) of an external electric circuit.

【0028】配線導体2は、無電解銅めっき層およびこ
の無電解銅めっき層上の電解銅めっき層または銅箔から
成り、その厚みが3〜50μmであることが好ましく、高
速の信号を伝達させるという観点から3μm以上である
ことが、配線導体2と絶縁層1との熱膨張差による両者
の剥離を防止するという観点からは50μm以下であるこ
とが好ましい。
The wiring conductor 2 is composed of an electroless copper plating layer and an electrolytic copper plating layer or a copper foil on this electroless copper plating layer, and preferably has a thickness of 3 to 50 μm and transmits a high-speed signal. From the viewpoint of preventing the peeling of the wiring conductor 2 and the insulating layer 1 due to the difference in thermal expansion between the wiring conductor 2 and the insulating layer 1, the thickness is preferably 50 µm or less.

【0029】このような配線導体2および貫通導体4
は、配線導体2が、例えば無電解銅めっき層および電解
銅めっき層から成る場合は、次の方法により形成され
る。まず、表面に配線導体2を被着形成した芯体絶縁層
1a上に絶縁層2を被覆し、配線導体2上の絶縁層2に
レーザで貫通孔3を形成する。次に、絶縁層2表面およ
び貫通孔3内部を過マンガン酸塩類水溶液等の粗化液に
浸漬し粗化し、その後、硫酸銅・ロッセル塩・ホルマリ
ン・EDTAナトリウム塩・安定剤等から成る無電解銅
めっき液に約30分間浸漬して絶縁層2表面および貫通孔
3内部に1〜2μm程度の無電解銅めっきを析出させ
る。次に、貫通孔3内部以外の絶縁層2表面を耐めっき
樹脂層で被覆するとともに、エッチングにより貫通孔3
内部の無電解銅めっきを除去し、しかる後、絶縁層2を
硫酸・硫酸銅5水和物・塩素・光沢剤等から成る電解銅
めっき液に数時間浸漬するとともに貫通孔3底に位置す
る配線導体2から通電して電解銅めっき層を成長させ貫
通導体4を形成する。そして最後に、水酸化ナトリウム
で耐めっき樹脂層を剥離し、さらに耐めっき樹脂層を剥
離したことにより露出する絶縁層2表面の無電解めっき
層上に電解銅めっき層を被着させ、配線導体2を形成す
る。また、上記と同様の工程を繰り返すことにより、複
数の絶縁層1と配線導体2とが積層され、本発明の配線
基板5となる。なお、上述の例では、絶縁層1表面の配
線導体2を、無電解銅めっき層と電解銅めっき層とから
成るものを示したが、配線導体2が銅箔から成るもので
あってもよい。配線導体2が銅箔から成るものである場
合、配線導体2上の絶縁層1にレーザで貫通孔3を形成
した後、この貫通孔3底に位置する配線導体2を用いて
通電することにより、電解銅めっきを貫通孔3内部に充
填すればよい。また、このような銅箔は、未硬化の状態
の芯体絶縁層1a・絶縁層1の表面に銅箔を重ね合わせ
るとともに加圧・加熱して硬化するとともに、配線導体
2の形状にエッチングすることにより形成される。
Such a wiring conductor 2 and a through conductor 4
Is formed by the following method when the wiring conductor 2 is composed of, for example, an electroless copper plating layer and an electrolytic copper plating layer. First, an insulating layer 2 is coated on a core insulating layer 1a having a surface on which a wiring conductor 2 is adhered, and a through hole 3 is formed in the insulating layer 2 on the wiring conductor 2 by a laser. Next, the surface of the insulating layer 2 and the inside of the through-hole 3 are immersed in a roughening solution such as an aqueous solution of permanganates to roughen the surface, and thereafter, an electroless film made of copper sulfate, Rossell salt, formalin, sodium EDTA, a stabilizer, etc. By dipping in a copper plating solution for about 30 minutes, electroless copper plating of about 1 to 2 μm is deposited on the surface of the insulating layer 2 and inside the through hole 3. Next, the surface of the insulating layer 2 other than the inside of the through hole 3 is covered with a plating-resistant resin layer, and the through hole 3 is etched.
The inner electroless copper plating is removed, and then the insulating layer 2 is immersed in an electrolytic copper plating solution composed of sulfuric acid / copper sulfate pentahydrate / chlorine / brightener for several hours, and located at the bottom of the through hole 3. Electric current is supplied from the wiring conductor 2 to grow an electrolytic copper plating layer to form a through conductor 4. Then, finally, the plating-resistant resin layer is peeled off with sodium hydroxide, and an electrolytic copper-plated layer is applied on the electroless plating layer on the surface of the insulating layer 2 exposed by peeling off the plating-resistant resin layer. Form 2 Further, by repeating the same steps as described above, the plurality of insulating layers 1 and the wiring conductors 2 are laminated, and the wiring board 5 of the present invention is obtained. In the above-described example, the wiring conductor 2 on the surface of the insulating layer 1 is shown to be composed of an electroless copper plating layer and an electrolytic copper plating layer. However, the wiring conductor 2 may be composed of copper foil. . When the wiring conductor 2 is made of copper foil, a through hole 3 is formed in the insulating layer 1 on the wiring conductor 2 by a laser, and then electricity is applied by using the wiring conductor 2 located at the bottom of the through hole 3. Then, the inside of the through hole 3 may be filled with electrolytic copper plating. In addition, such a copper foil is superposed on the surface of the core insulating layer 1a and the insulating layer 1 in an uncured state, is cured by pressing and heating, and is etched into the shape of the wiring conductor 2. It is formed by this.

【0030】本発明の配線基板5によれば、貫通導体4
の導体を、電解銅めっき層または銅箔上に形成された電
解銅めっきから成るものとしたことから、配線導体2と
貫通導体4との接合が強固なものとすることができる。
また、貫通導体4に無電解銅めっきと電解銅めっきとの
接合部がなく、その結果、貫通導体4を垂直に配列した
スタックトビア構造において長期の熱応力が繰返し印加
されたとしても貫通導体4にクラックが発生しないの
で、貫通導体4と配線導体2間で断線することのない接
続信頼性の高い配線基板5とすることができる。
According to the wiring board 5 of the present invention, the through conductor 4
Is made of electrolytic copper plating formed on an electrolytic copper plating layer or a copper foil, the connection between the wiring conductor 2 and the through conductor 4 can be made strong.
Further, since there is no joint between the electroless copper plating and the electrolytic copper plating on the through conductor 4, even if a long-term thermal stress is repeatedly applied to the stacked via structure in which the through conductors 4 are vertically arranged, the through conductor 4 Since no cracks occur in the wiring board 5, the wiring board 5 having high connection reliability without disconnection between the through conductor 4 and the wiring conductor 2 can be provided.

【0031】かくして本発明の配線基板5によれば、貫
通導体4の導体が電解銅めっきから成ること、および、
絶縁層1の厚み方向の熱膨張係数が20〜60ppm/℃で
あることから、貫通導体4を垂直に配列したスタックト
ビア構造において長期の熱応力が繰返し印加されたとし
ても貫通導体4にクラックが発生したり、貫通導体4と
絶縁層1とが剥離して、貫通導体4内部で断線してしま
うことがない高信頼性の配線基板5とすることができ
る。
Thus, according to the wiring board 5 of the present invention, the conductor of the through conductor 4 is made of electrolytic copper plating;
Since the thermal expansion coefficient in the thickness direction of the insulating layer 1 is 20 to 60 ppm / ° C., even if a long-term thermal stress is repeatedly applied to the stacked via structure in which the penetrating conductors 4 are vertically arranged, cracks are formed in the penetrating conductors 4. A highly reliable wiring board 5 that does not generate or break through the through conductor 4 and the insulating layer 1 and break inside the through conductor 4 can be provided.

【0032】なお、本発明の配線基板5は上述の実施例
に限定されるものではなく、本発明の要旨を逸脱しない
範囲であれば種々の変更は可能であり、例えば、上述の
例では絶縁層1を芯体絶縁層1aの上下面に積層し、こ
の絶縁層1上に配線導体2を形成したが、絶縁層1を芯
体絶縁層1aの上面あるいは下面の一方のみに積層して
もよい。また、上述の例では、配線基板5を芯体絶縁層
1aに絶縁層1を積層して成るものとしたが、配線基板
5を絶縁層1のみで構成してもよい。
It should be noted that the wiring board 5 of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. The layer 1 is laminated on the upper and lower surfaces of the core insulating layer 1a, and the wiring conductor 2 is formed on the insulating layer 1. However, the insulating layer 1 may be laminated on only one of the upper surface and the lower surface of the core insulating layer 1a. Good. Further, in the above-described example, the wiring board 5 is formed by laminating the insulating layer 1 on the core insulating layer 1a. However, the wiring board 5 may be configured only by the insulating layer 1.

【0033】また、本発明の電子装置7は、配線基板5
表面の配線導体2と電子部品6の各電極とを導体バンプ
8を介して電気的に接続することにより形成される。導
体バンプ8は、配線導体2と電子部品3の各電極とを電
気的に接続する作用を成し、配線基板5表面の配線導体
2上に鉛−錫・錫−亜鉛・錫−銀−ビスマス合金等の導
電材料より形成されている。
Further, the electronic device 7 of the present invention comprises the wiring substrate 5
It is formed by electrically connecting the wiring conductor 2 on the front surface and each electrode of the electronic component 6 via the conductor bump 8. The conductor bumps 8 serve to electrically connect the wiring conductor 2 to each electrode of the electronic component 3, and lead-tin / tin-zinc-tin-silver-bismuth is formed on the wiring conductor 2 on the surface of the wiring board 5. It is formed from a conductive material such as an alloy.

【0034】このような導体バンプ8は次に述べる方法
により形成される。まず、配線基板5表面に、配線導体
2の電子部品6との接合部を露出する開口を有するソル
ダーレジスト層9を従来周知のスクリーン印刷法を用い
て被着する。ソルダーレジスト層9は、厚みが10〜50μ
mであり、例えばアクリル変性エポキシ樹脂等の感光性
樹脂と開始剤とから成る混合物に30〜70重量%のシリカ
やタルク等の無機粉末フィラーを含有させた絶縁材料か
ら成り、隣接する配線導体2同士が導体バンプ8により
電気的に短絡することを防止するとともに、配線導体2
と絶縁層1との接合強度を向上させる機能を有する。次
に、導体バンプ8が例えば鉛−錫から成る半田の場合、
鉛−錫から成る半田ペーストをソルダーレジスト層9の
開口の露出した配線導体2上にスクリーン印刷で充填
し、リフロー炉を通すことにより配線導体2上に半球状
に固着形成される。なお、配線基板5の表面に露出した
配線導体2の表面にニッケル・金等の良導電性で耐食性
に優れた金属をめっき法により1〜20μmの厚みに被着
させておくと、露出した配線導体2の酸化腐食を有効に
防止することができるとともに配線導体2と導体バンプ
8との接続を良好となすことができる。
Such a conductive bump 8 is formed by the following method. First, a solder resist layer 9 having an opening exposing a joint between the wiring conductor 2 and the electronic component 6 is applied to the surface of the wiring board 5 by using a conventionally known screen printing method. The solder resist layer 9 has a thickness of 10 to 50 μm.
and an insulating material containing 30 to 70% by weight of an inorganic powder filler such as silica or talc in a mixture of a photosensitive resin such as an acrylic-modified epoxy resin and an initiator. It is possible to prevent electrical shorts between the wiring conductors 2 by the conductor bumps 8 and
Has a function of improving the bonding strength between the insulating layer 1 and the insulating layer 1. Next, when the conductor bump 8 is a solder made of, for example, lead-tin,
A solder paste made of lead-tin is filled by screen printing on the wiring conductor 2 with the opening of the solder resist layer 9 exposed, and is fixed to the wiring conductor 2 in a hemispherical shape by passing through a reflow furnace. If a metal having good conductivity and excellent corrosion resistance, such as nickel or gold, is applied to the surface of the wiring conductor 2 exposed on the surface of the wiring board 5 by plating to a thickness of 1 to 20 μm, the exposed wiring is exposed. Oxidation and corrosion of the conductor 2 can be effectively prevented, and the connection between the wiring conductor 2 and the conductor bump 8 can be made good.

【0035】しかる後、配線導体2に電子部品6の各電
極を導体バンプ8を介して接合して電子部品6を搭載す
るとともに配線基板5と電子部品6とをアンダーフィル
材10で接着固定し、さらに、この電子部品6を図示しな
い蓋体やポッティング樹脂により封止することによって
電子装置7と成り、配線導体2の電子部品6との接続部
と反対側の一端を外部電気回路基板の配線導体(図示せ
ず)に接続することにより本発明の電子装置7が外部電
気回路基板に実装されることとなる。
Thereafter, the electrodes of the electronic component 6 are joined to the wiring conductor 2 via the conductor bumps 8 to mount the electronic component 6, and the wiring board 5 and the electronic component 6 are bonded and fixed with an underfill material 10. Further, the electronic component 6 is sealed with a lid or a potting resin (not shown) to form an electronic device 7, and one end of the wiring conductor 2 on the opposite side to the connection portion with the electronic component 6 is connected to the wiring of the external electric circuit board. By connecting to a conductor (not shown), the electronic device 7 of the present invention is mounted on an external electric circuit board.

【0036】本発明の電子装置7によれば、上記の配線
基板5の表面に配線導体2と電気的に接続された電子部
品6の実装用電極を有するとともに、実装用電極に電子
部品6の電極を電気的に接続して成ることから、小型で
高信頼性の電子装置7とすることができる。
According to the electronic device 7 of the present invention, the mounting electrode of the electronic component 6 electrically connected to the wiring conductor 2 is provided on the surface of the wiring board 5, and the mounting of the electronic component 6 is performed on the mounting electrode. Since the electrodes are electrically connected, the electronic device 7 can be small and highly reliable.

【0037】なお、本発明は、上述の実施の形態の一例
に限定されるものではなく、本発明の要旨を逸脱しない
範囲であれば種々の変更が可能であることはいうまでも
ない。
The present invention is not limited to the above-described embodiment, and it goes without saying that various modifications can be made without departing from the scope of the present invention.

【0038】次に、本発明の配線基板の製造方法につい
て上述の配線基板5を製造する場合を例にとって説明す
る。
Next, a method of manufacturing a wiring board according to the present invention will be described with reference to an example in which the above-described wiring board 5 is manufactured.

【0039】まず、芯体絶縁層1aを準備する。芯体絶
縁層1aは、ガラス繊維を縦横に織り込んだガラスクロ
スにエポキシ樹脂やビスマレイミドトリアジン樹脂等の
熱硬化性樹脂を含浸させたシートを乾燥し、複数枚のシ
ートを積層することにより形成される。
First, the core insulating layer 1a is prepared. The core insulating layer 1a is formed by drying a sheet obtained by impregnating a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin into a glass cloth in which glass fibers are woven vertically and horizontally, and laminating a plurality of sheets. You.

【0040】次に、この芯体絶縁層1aの表面に厚みが
3〜50μmの銅箔を重ね合わせて加圧・加熱することに
より、芯体絶縁層1aの表面に配線導体2と成る銅箔を
被着形成し、その後、表面に配線導体2と成る銅箔を被
着形成した芯体絶縁層1aの上面から下面にかけてドリ
ルを用いてスルーホール11を穿設し、しかる後、配線導
体2と成る銅箔をエッチング加工することにより所定の
パターンを形成し、さらに、スルーホール11の内壁に、
めっき法を採用して厚みが3〜50μm程度の銅膜を析出
させることによりスルーホール11の内壁に銅めっき膜12
を形成する。なお、スルーホール11にはその内部にエポ
キシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性
樹脂から成る樹脂柱13を、未硬化のペースト状の熱硬化
性樹脂をスルーホール11内にスクリーン印刷法により充
填しておくことが好ましく、また、これを熱硬化させた
後、その上下面を略平坦に研磨しておくことが好まし
い。そして、芯体絶縁層1a上に第一の絶縁層21Aを被
着形成する。
Next, a copper foil having a thickness of 3 to 50 μm is superimposed on the surface of the core insulating layer 1a and pressurized and heated to form a copper foil serving as the wiring conductor 2 on the surface of the core insulating layer 1a. Then, a through hole 11 is formed by drilling from the upper surface to the lower surface of the core insulating layer 1a having a copper foil serving as the wiring conductor 2 formed on the surface thereof, and then the wiring conductor 2 is formed. A predetermined pattern is formed by etching a copper foil that becomes, and further, on the inner wall of the through hole 11,
By depositing a copper film having a thickness of about 3 to 50 μm using a plating method, a copper plating film 12 is formed on the inner wall of the through hole 11.
To form The through-hole 11 has a resin column 13 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin therein, and an uncured paste-like thermosetting resin in the through-hole 11 formed by screen printing. It is preferable to fill it, and it is preferable to polish the upper and lower surfaces thereof substantially flat after heat curing. Then, the first insulating layer 21A is formed on the core insulating layer 1a.

【0041】次に、貫通導体4および配線導体2の形成
方法を図2に示す。なお、ここでは、芯体絶縁層1aを
省略している。また、配線導体2が無電解銅めっき層と
電解銅めっき層とから成る場合の説明を行なう。
Next, a method of forming the through conductor 4 and the wiring conductor 2 is shown in FIG. Here, the core insulating layer 1a is omitted. The case where the wiring conductor 2 is composed of an electroless copper plating layer and an electrolytic copper plating layer will be described.

【0042】まず、図2(a)に断面図で示すように、
従来周知のサブトラクティブ法を用いて、第一の絶縁層
21A表面に無電解銅めっき層22aと電解銅めっき層22b
とから成る第1の配線導体22を形成する。次に、図2
(b)に断面図で示すように、第1の配線導体22が形成
された第一の絶縁層21A上に,厚みが10〜80μm程度の
未硬化の熱硬化性樹脂のフィルムを被着し熱硬化させる
ことによって第二の絶縁層21Bを積層する。しかる後、
図2(c)に断面図で示すように、第一の配線導体22上
の第二の絶縁層21Bにレーザにより開口径が20〜100μ
m程度の貫通孔3を形成する。
First, as shown in the sectional view of FIG.
Using a well-known subtractive method, the first insulating layer
Electroless copper plating layer 22a and electrolytic copper plating layer 22b on the surface of 21A
Is formed. Next, FIG.
As shown in the cross-sectional view of FIG. 2B, a film of an uncured thermosetting resin having a thickness of about 10 to 80 μm is formed on the first insulating layer 21A on which the first wiring conductor 22 is formed. The second insulating layer 21B is laminated by thermosetting. After a while
As shown in the cross-sectional view of FIG. 2C, the opening diameter of the second insulating layer 21B on the first wiring conductor 22 is 20 to 100 μm by laser.
About m through holes 3 are formed.

【0043】その後、図2(d)に断面図で示すよう
に、第二の絶縁層21B表面および貫通孔3内壁を過マン
ガン酸塩類水溶液等の粗化液に60℃で15分間浸漬し粗化
した後、硫酸銅・ロッセル塩・ホルマリン・EDTAナ
トリウム塩・安定剤等から成る無電解銅めっき液に約30
分間浸漬して第二の絶縁層21B表面および貫通孔3内壁
に1〜2μm程度の無電解銅めっき層32aを被着させ
る。さらに、図2(e)に断面図で示すように、第二の
絶縁層21B上の無電解銅めっき層32aを耐めっき樹脂層
Jで被覆する。その後、図2(f)に断面図で示すよう
に、硫酸銅溶液でのエッチングにより貫通孔3内に露出
した無電解銅めっき層32aを除去する。
Thereafter, as shown in the sectional view of FIG. 2D, the surface of the second insulating layer 21B and the inner wall of the through-hole 3 are immersed in a roughening solution such as an aqueous solution of permanganate at 60 ° C. for 15 minutes. After being converted to an electroless copper plating solution consisting of copper sulfate, Rossell salt, formalin, sodium EDTA, stabilizer, etc.
Then, an electroless copper plating layer 32a having a thickness of about 1 to 2 [mu] m is applied to the surface of the second insulating layer 21B and the inner wall of the through hole 3 by immersion. Further, as shown in the sectional view of FIG. 2E, the electroless copper plating layer 32a on the second insulating layer 21B is covered with a plating-resistant resin layer J. Thereafter, as shown in a sectional view of FIG. 2F, the electroless copper plating layer 32a exposed in the through hole 3 is removed by etching with a copper sulfate solution.

【0044】しかる後、図2(g)に断面図で示すよう
に、硫酸・硫酸銅5水和物・塩素・光沢剤等から成る電
解銅めっき液に1時間浸漬しながら、第一の配線導体22
から通電して電解銅めっきで貫通孔3を充填して電解銅
めっきからなる貫通導体4を形成する。さらに、図2
(h)に断面図で示すように、水酸化ナトリウムで耐め
っき樹脂層Jを剥離した後、第二の絶縁層21B上の無電
解めっき層32a上に電解銅めっき層32bを被覆して第二
の配線導体32を形成する。そして、上記の(a)〜
(h)の工程を繰り返すことにより、多層の配線基板を
得ることができる。
Thereafter, as shown in the sectional view of FIG. 2 (g), the first wiring was immersed for one hour in an electrolytic copper plating solution comprising sulfuric acid, copper sulfate pentahydrate, chlorine, brightener and the like. Conductor 22
And through holes 3 are filled with electrolytic copper plating to form through conductors 4 made of electrolytic copper plating. Further, FIG.
(H) As shown in the cross-sectional view, after the anti-plating resin layer J is peeled off with sodium hydroxide, the electroless copper plating layer 32b is coated on the electroless plating layer 32a on the second insulating layer 21B. The second wiring conductor 32 is formed. And the above (a) ~
By repeating the step (h), a multilayer wiring board can be obtained.

【0045】なお、図2では、第一の絶縁層21Aが貫通
孔3・貫通導体4を有しないものとして記載したが、必
要に応じて第一の絶縁層21Aに貫通孔3・貫通導体4を
設けてもよい。
Although FIG. 2 shows that the first insulating layer 21A does not have the through hole 3 and the through conductor 4, the first insulating layer 21A may include the through hole 3 and the through conductor 4 if necessary. May be provided.

【0046】本発明の配線基板5の製造方法によれば、
第一の配線導体22から通電して電解銅めっきで貫通孔3
を充填することから、貫通孔3内壁に無電解銅めっきを
被着させなくても、貫通導体4の導体を電解銅めっきで
良好に形成できる。また、通常の電解銅めっき装置を用
いて効率良く貫通孔を電解銅めっきで充填できる。
According to the method of manufacturing the wiring board 5 of the present invention,
Energize from the first wiring conductor 22 and pass through hole 3 with electrolytic copper plating
Is filled, the conductor of the through conductor 4 can be favorably formed by electrolytic copper plating without applying electroless copper plating to the inner wall of the through hole 3. Further, the through holes can be efficiently filled with electrolytic copper plating using a normal electrolytic copper plating apparatus.

【0047】かくして、本発明の配線基板5の製造方法
によれば、第一の絶縁層21A上に無電解銅めっき層22a
および無電解銅めっき層22a上の電解銅めっき層22bま
たは銅箔から成る第一の配線導体22を形成する工程と、
第一の配線導体22が形成された第一の絶縁層21A上に第
二の絶縁層21Bを積層する工程と、第一の配線導体22上
に位置する第二の絶縁層21Bに貫通孔3を形成する工程
と、第二の絶縁層21B上および貫通孔3内に無電解銅め
っき層32aを被着する工程と、第二の絶縁層21B上の無
電解銅めっき層32aを耐めっき樹脂層Jで被覆する工程
と、貫通孔3内に露出した無電解銅めっき層32aを除去
する工程と、第一の配線導体22から通電して電解銅めっ
きで貫通孔3を充填する工程と、耐めっき樹脂層Jを剥
離した後、第二の絶縁層21b上の無電解めっき層32a上
に電解銅めっき層32bを被覆して第二の配線導体32を形
成する工程とを順次行なうことから、通常の電解銅めっ
き装置を用いて効率良く貫通孔3を電解銅めっきで充填
でき、配線導体22の電解銅めっき層22a上に電解銅めっ
きで充填された貫通導体4が形成できるので、貫通導体
4を垂直に配列したスタックトビア構造において長期の
熱応力が繰返し印加されても接合部分で剥離することが
ない信頼性の高い配線基板5を製作できる。
Thus, according to the method of manufacturing the wiring board 5 of the present invention, the electroless copper plating layer 22a is formed on the first insulating layer 21A.
And forming a first wiring conductor 22 made of an electrolytic copper plating layer 22b or copper foil on the electroless copper plating layer 22a,
A step of laminating a second insulating layer 21B on the first insulating layer 21A on which the first wiring conductor 22 is formed, and forming a through hole 3 in the second insulating layer 21B located on the first wiring conductor 22; Forming an electroless copper plating layer 32a on the second insulating layer 21B and in the through hole 3, and forming the electroless copper plating layer 32a on the second insulating layer 21B with a plating resistant resin. A step of coating with the layer J, a step of removing the electroless copper plating layer 32a exposed in the through-hole 3, a step of supplying electricity from the first wiring conductor 22, and filling the through-hole 3 with electrolytic copper plating, After the anti-plating resin layer J is peeled off, the steps of covering the electroless copper plating layer 32b on the electroless plating layer 32a on the second insulating layer 21b and forming the second wiring conductor 32 are sequentially performed. The through hole 3 can be efficiently filled with electrolytic copper plating using a normal electrolytic copper plating apparatus, and the electrolytic copper plating of the wiring conductor 22 can be performed. Since the through conductors 4 filled with electrolytic copper plating can be formed on the metal layer 22a, even if long-term thermal stress is repeatedly applied to the stacked via structure in which the through conductors 4 are vertically arranged, the through conductors 4 do not peel off at the joints. A highly reliable wiring board 5 can be manufactured.

【0048】なお、本発明は、上述の実施の形態の一例
に限定されるものではなく、本発明の要旨を逸脱しない
範囲であれば、変更・改良を施すことは何ら差し支えな
い。
It should be noted that the present invention is not limited to the above-described embodiment, and may be changed or improved without departing from the scope of the present invention.

【0049】[0049]

【発明の効果】本発明の配線基板によれば、貫通導体の
導体を、電解銅めっき層または銅箔上に形成された電解
銅めっきから成るものとしたことから、配線導体と貫通
導体との接合が強固なものとすることができる。また、
貫通導体に無電解銅めっきと電解銅めっきとの接合部が
なく、その結果、貫通導体を垂直に配列したスタックト
ビア構造において長期の熱応力が繰返し印加されたとし
ても貫通導体にクラックが発生しないので、貫通導体と
配線導体間で断線することのない接続信頼性の高い配線
基板とすることができる。
According to the wiring board of the present invention, since the conductor of the through conductor is formed of electrolytic copper plating layer or electrolytic copper plating formed on the copper foil, the conductor of the through conductor and the through conductor are formed. The bonding can be strong. Also,
There is no joint between the electroless copper plating and the electrolytic copper plating on the through conductor, and as a result, cracks do not occur in the through conductor even when long-term thermal stress is repeatedly applied in a stacked via structure in which the through conductor is vertically arranged Therefore, it is possible to provide a wiring board having high connection reliability without disconnection between the through conductor and the wiring conductor.

【0050】また、本発明の配線基板によれば、絶縁層
の厚み方向の熱膨張係数を20〜60ppm/℃としたこと
から、貫通導体と絶縁層との間に発生する熱膨張差によ
る応力が小さなものとなり、温度サイクル試験におい
て、貫通導体と絶縁層とが剥離して、貫通導体内部で断
線してしまうことのない高信頼性の配線基板とすること
ができる。
Further, according to the wiring board of the present invention, since the thermal expansion coefficient in the thickness direction of the insulating layer is set to 20 to 60 ppm / ° C., the stress due to the thermal expansion difference generated between the through conductor and the insulating layer. Can be reduced, and a highly reliable wiring board can be obtained in which the through conductor and the insulating layer are not separated from each other in the temperature cycle test and the inside of the through conductor is disconnected.

【0051】本発明の配線基板の製造方法によれば、第
一の配線導体から通電して電解銅めっきで貫通孔を充填
することから、貫通孔内壁に無電解銅めっきを被着させ
なくても、貫通導体の導体を電解銅めっきで良好に形成
できる。また、通常の電解銅めっき装置を用いて効率良
く貫通孔を電解銅めっきで充填できる。
According to the method of manufacturing a wiring board of the present invention, since the first wiring conductor is energized to fill the through-hole with electrolytic copper plating, the inner wall of the through-hole does not need to be coated with electroless copper plating. Also, the conductor of the through conductor can be favorably formed by electrolytic copper plating. Further, the through holes can be efficiently filled with electrolytic copper plating using a normal electrolytic copper plating apparatus.

【0052】本発明の電子装置によれば、上記の配線基
板の表面に配線導体と電気的に接続された電子部品の実
装用電極を有するとともに、実装用電極に電子部品の電
極を電気的に接続して成ることから、小型で高信頼性の
電子装置とすることができる。
According to the electronic device of the present invention, the surface of the wiring board has electrodes for mounting electronic components electrically connected to the wiring conductors, and the electrodes of the electronic components are electrically connected to the mounting electrodes. Since they are connected, a small and highly reliable electronic device can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】図1は本発明の配線基板およびこれに電子部品
を搭載して電子装置に適用した場合の実施の形態の一例
を示す断面図である。
FIG. 1 is a cross-sectional view showing an example of an embodiment in which an electronic component is mounted on a wiring board of the present invention and applied to an electronic device.

【図2】(a)〜(h)はそれぞれ本発明の配線基板の
製造方法を説明するための要部拡大断面図である。
FIGS. 2A to 2H are enlarged cross-sectional views of a main part for describing a method of manufacturing a wiring board according to the present invention.

【符号の説明】 1・・・・・・絶縁層 1a・・・・・・・芯体絶縁層 2・・・・・・・・・配線導体 3・・・・・・・・・貫通孔 4・・・・・・・・・貫通導体 5・・・・・・・・・配線基板 6・・・・・・・・・電子部品 7・・・・・・・・・電子装置 21A・・・・・・・・第一の絶縁層 22B・・・・・・・・第二の絶縁層 22・・・・・・・・・第一の配線導体 32・・・・・・・・・第二の配線導体 22a、32a・・・・・無電解銅めっき層 22b、32b・・・・・電解銅めっき層 J・・・・・・・・・耐めっき樹脂層[Description of Signs] 1... Insulating layer 1a... Core insulating layer 2... Wiring conductor 3. 4 through-conductor 5 wiring board 6 electronic component 7 electronic device 21A ... First insulating layer 22B Second insulating layer 22 First wiring conductor 32 .. Second wiring conductors 22a, 32a... Electroless copper plating layers 22b, 32b... Electrolytic copper plating layers J... Plating-resistant resin layers

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 複数の絶縁層と配線導体とが交互に積層
されるとともに上下の前記配線導体間を前記絶縁層に形
成された貫通孔を導体で充填して成る貫通導体により電
気的に接続して成る配線基板において、前記配線導体
は、前記絶縁層上の無電解銅めっき層および該無電解銅
めっき層上の電解銅めっき層または前記絶縁層上の銅箔
から成り、かつ前記貫通導体の前記導体は、前記電解銅
めっき層または銅箔上に形成された電解銅めっきから成
ることを特徴とする配線基板。
A plurality of insulating layers and wiring conductors are alternately laminated, and the upper and lower wiring conductors are electrically connected by a through conductor formed by filling a through hole formed in the insulating layer with a conductor. Wherein the wiring conductor comprises an electroless copper plating layer on the insulating layer and an electrolytic copper plating layer on the electroless copper plating layer or a copper foil on the insulating layer, and the through conductor Wherein said conductor is made of electrolytic copper plating formed on said electrolytic copper plating layer or copper foil.
【請求項2】 前記絶縁層の厚み方向の熱膨張係数が2
0〜60ppm/℃であることを特徴とする請求項1記
載の配線基板。
2. The thermal expansion coefficient of the insulating layer in the thickness direction is 2
2. The wiring board according to claim 1, wherein the temperature is 0 to 60 ppm / ° C.
【請求項3】 第一の絶縁層上に無電解銅めっき層およ
び該無電解銅めっき層上の電解銅めっき層または銅箔か
ら成る第一の配線導体を形成する工程と、該第一の配線
導体が形成された前記第一の絶縁層上に第二の絶縁層を
積層する工程と、前記第一の配線導体上に位置する前記
第二の絶縁層に貫通孔を形成する工程と、前記第二の絶
縁層上および前記貫通孔内に無電解銅めっき層を被着す
る工程と、前記第二の絶縁層上の無電解銅めっき層を耐
めっき樹脂層で被覆する工程と、前記貫通孔内に露出し
た前記無電解銅めっき層を除去する工程と、前記第一の
配線導体から通電して電解銅めっきで前記貫通孔を充填
する工程と、前記耐めっき樹脂層を剥離した後、前記第
二の絶縁層上の無電解めっき層上に電解銅めっき層を被
覆して第二の配線導体を形成する工程とを順次行なうこ
とを特徴とする配線基板の製造方法。
Forming a first wiring conductor comprising an electroless copper plating layer on the first insulating layer and an electrolytic copper plating layer or a copper foil on the electroless copper plating layer; Laminating a second insulating layer on the first insulating layer on which the wiring conductor is formed, and forming a through hole in the second insulating layer located on the first wiring conductor, A step of applying an electroless copper plating layer on the second insulating layer and in the through hole, and a step of covering the electroless copper plating layer on the second insulating layer with a plating-resistant resin layer; Removing the electroless copper plating layer exposed in the through-hole, energizing the first wiring conductor to fill the through-hole with electrolytic copper plating, and removing the plating-resistant resin layer. Covering an electroless plating layer on the electroless plating layer on the second insulating layer, And a step of forming a body in order.
【請求項4】 請求項1または請求項2記載の配線基板
の表面に前記配線導体と電気的に接続された電子部品の
実装用電極を有するとともに、該実装用電極に前記電子
部品の電極を電気的に接続して成ることを特徴とする電
子装置。
4. An electronic component mounting electrode electrically connected to the wiring conductor on a surface of the wiring board according to claim 1 or 2, wherein an electrode of the electronic component is mounted on the mounting electrode. An electronic device characterized by being electrically connected.
JP2001165751A 2001-05-31 2001-05-31 Wiring board manufacturing method Expired - Fee Related JP4780857B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001165751A JP4780857B2 (en) 2001-05-31 2001-05-31 Wiring board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001165751A JP4780857B2 (en) 2001-05-31 2001-05-31 Wiring board manufacturing method

Publications (2)

Publication Number Publication Date
JP2002359469A true JP2002359469A (en) 2002-12-13
JP4780857B2 JP4780857B2 (en) 2011-09-28

Family

ID=19008383

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP4780857B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008112987A (en) * 2006-10-04 2008-05-15 Ngk Spark Plug Co Ltd Wiring board
JP2010098140A (en) * 2008-10-16 2010-04-30 Dainippon Printing Co Ltd Through electrode substrate, manufacturing method thereof, and semiconductor device using the through electrode substrate
JP2011155083A (en) * 2010-01-26 2011-08-11 Panasonic Electric Works Co Ltd Onboard printed circuit board
US8319111B2 (en) 2006-10-04 2012-11-27 Ngk Spark Plug Co., Ltd. Wiring board having wiring laminate portion with via conductors embedded in resin insulating layers
US8637397B2 (en) 2008-10-16 2014-01-28 Dai Nippon Printing Co., Ltd Method for manufacturing a through hole electrode substrate

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JPH08264953A (en) * 1995-03-22 1996-10-11 Oki Electric Ind Co Ltd Wiring forming method of multilayer printed wiring board
JPH11251753A (en) * 1997-12-29 1999-09-17 Ibiden Co Ltd Multilayer printed wiring board
JP2001102749A (en) * 1999-09-17 2001-04-13 Internatl Business Mach Corp <Ibm> Circuit board

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JPH08264953A (en) * 1995-03-22 1996-10-11 Oki Electric Ind Co Ltd Wiring forming method of multilayer printed wiring board
JPH11251753A (en) * 1997-12-29 1999-09-17 Ibiden Co Ltd Multilayer printed wiring board
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008112987A (en) * 2006-10-04 2008-05-15 Ngk Spark Plug Co Ltd Wiring board
US8319111B2 (en) 2006-10-04 2012-11-27 Ngk Spark Plug Co., Ltd. Wiring board having wiring laminate portion with via conductors embedded in resin insulating layers
JP2010098140A (en) * 2008-10-16 2010-04-30 Dainippon Printing Co Ltd Through electrode substrate, manufacturing method thereof, and semiconductor device using the through electrode substrate
US8637397B2 (en) 2008-10-16 2014-01-28 Dai Nippon Printing Co., Ltd Method for manufacturing a through hole electrode substrate
JP2011155083A (en) * 2010-01-26 2011-08-11 Panasonic Electric Works Co Ltd Onboard printed circuit board

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