JP2004200412A - Wiring board with solder bump, and manufacturing method thereof - Google Patents

Wiring board with solder bump, and manufacturing method thereof Download PDF

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Publication number
JP2004200412A
JP2004200412A JP2002367249A JP2002367249A JP2004200412A JP 2004200412 A JP2004200412 A JP 2004200412A JP 2002367249 A JP2002367249 A JP 2002367249A JP 2002367249 A JP2002367249 A JP 2002367249A JP 2004200412 A JP2004200412 A JP 2004200412A
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JP
Japan
Prior art keywords
solder
electronic component
resin layer
plating
resistant resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002367249A
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Japanese (ja)
Inventor
Noriyuki Shimizu
範征 清水
Yoshihiro Hosoi
義博 細井
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Kyocera Corp
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Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2002367249A priority Critical patent/JP2004200412A/en
Publication of JP2004200412A publication Critical patent/JP2004200412A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board with a solder bump capable of accurately and properly connecting the electrode of an electronic component to a solder bump. <P>SOLUTION: On an electronic component connection pad 3 exposed in an opening 4a of a solder-resistant resin layer 4, a solder bump 5 is made of solder plating, comprises a polished flat surface on its upper end, and is so provided as to fill the opening 4a and also to protrude from the solder-resistant resin layer 4. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、半導体素子や抵抗器等の電子部品を搭載するための半田バンプ付き配線基板およびその製造方法に関するものである。
【0002】
【従来の技術】
近年、半導体素子や抵抗器等の電子部品を搭載するために用いられる配線基板には、ガラス繊維基材および熱硬化性樹脂から成る絶縁板と銅箔等から成る配線導体層とを交互に複数積層して成るプリント基板や、絶縁板上に熱硬化性樹脂およびフィラーから成る絶縁層と銅めっき層から成る配線導体層とを複数積層して成るビルドアップ基板が用いられてきている。そして、このようなプリント基板やビルドアップ基板等の配線基板の上面には、半導体素子等の電子部品の電極を接続するための電子部品接続パッドおよびこの電子部品接続パッドの中央部を露出させる耐半田樹脂層が被着形成されており、さらに、耐半田樹脂層から露出した電子部品接続パッド上には電子部品と電子部品接続パッドとを接合するための半田バンプが形成されている。
【0003】
そして、このような半田バンプ付きの配線基板においては、電子部品をその各電極がそれぞれ対応する半田バンプに当接するようにして配線基板の上面に載置するとともに、これらを例えば電気炉等の加熱装置で加熱して半田バンプを溶融させて半田バンプと電子部品の電極とを接合させることによって、電子部品が配線基板上に実装される。
【0004】
なお、このような半田バンプ付きの配線基板は、内部および/または表面に複数の配線導体を有する絶縁基板の表面に、配線導体に接続された略円形の複数の電子部品接続パッドおよびこの電子部品接続パッドの中央部を露出させる開口部を有する耐半田樹脂層を被着させ、次に耐半田樹脂層から露出する電子部品接続パッド上にフラックスおよび半田粉末から成る半田ペーストを従来周知のスクリーン印刷法を採用して印刷塗布するとともにこれを加熱して半田ペースト中のフラックスを気化除去するとともに半田ペースト中の半田粉末を溶融させて電子部品接続パッド上に半田バンプを形成することによって製作されている。
【0005】
〔特許文献1〕 特開2000−100852号公報
【0006】
【発明が解決しようとする課題】
しかしながら、近年、高集積化が進むICやLSI等の半導体素子を搭載する半導体素子収納用パッケージや各種電子部品を搭載する混成集積回路装置等に適用される配線基板においては、電子部品接続パッドの小型化および高密度配列化が要求されており、例えば電子部品接続パッドの直径が60μm以下で、配列ピッチが120μm以下のものが出現するようになってきている。ところが、従来のようにスクリーン印刷法を用いて各電子部品接続パッド上に半田ペーストを印刷した後、これを加熱して半田バンプを形成する方法では、半田ペーストの印刷量がばらつきやすいため、電子部品接続パッドの直径が60μm以下で、配列ピッチが120μm以下になると、半田バンプの高さのばらつきが大きくなって電子部品の電極と半田バンプとを正確かつ良好に接続させることが困難であった。また、半田バンプ同士のショートを防止するためには塗布される半田ペースト量を少なくする必要があり、そのため電子部品を実装するために必要な十分な高さの半田バンプを形成することが困難であった。
【0007】
本発明はかかる従来の問題点に鑑み完成されたものであり、その目的は、絶縁基板の表面に形成された電子部品接続パッドの直径および配列ピッチが小さい場合であっても、電子部品接続パッド上に形成された半田バンプに高さばらつきがなく、しかも電子部品を実装するために必要な十分な高さの半田バンプを備え、それにより電子部品の電極と半田バンプとを正確かつ良好に接続することが可能な半田バンプ付き配線基板を提供することにある。
【0008】
【課題を解決するための手段】
本発明の半田バンプ付き配線基板は、表面に電子部品接続パッドが形成された絶縁基板と、この絶縁基板の表面に被着されており、電子部品接続パッドの中央部を露出させる開口部を有するとともに電子部品接続パッドの外周部を被覆する耐半田樹脂層と、耐半田樹脂層の開口部内に露出した電子部品接続パッド上に、耐半田樹脂層の開口部内を埋めるとともに耐半田樹脂層から突出するようにして被着された半田バンプとを具備する半田バンプ付き配線基板であって、前記半田バンプは半田めっきから成り、その上端に研磨された平坦面を有していることを特徴とするものである。
【0009】
また、本発明の半田バンプ付き配線基板の製造方法は、表面に電子部品接続パッドを有する絶縁基板を準備する工程と、次に絶縁基板の表面に電子部品接続パッドの中央部を露出させる第一の開口部を有するとともに電子部品接続パッドの外周部を被覆する耐半田樹脂層を被着する工程と、次に耐半田樹脂層上に第一の開口部を露出させる第二の開口部を有する耐めっき樹脂層を被着する工程と、次に第一の開口部内に露出した電子部品接続パッド上および耐めっき樹脂層上に第一および第二の開口部を充填するように半田めっきを被着させる工程と、次に半田めっきおよび耐めっき樹脂層をそれらの表面が同一平面をなすように研磨する工程と、次に耐めっき樹脂層を除去することにより電子部品接続パッド上に第一の開口部を埋めるとともに耐半田樹脂層から突出し、その上端に研磨された平坦面を有する半田めっきから成る半田バンプを形成する工程とを行なうことを特徴とするものである。
【0010】
本発明の半田バンプ付き配線基板によれば、電子部品接続パッド上に耐半田樹脂層の開口部内を埋めるとともに耐半田樹脂層から突出するようにして被着された半田バンプを半田めっきにより形成し、その上端面を研磨された平坦面としたことから、電子部品接続パッドの直径および配列ピッチが小さい場合であっても各電子部品接続パッド上に均一な高さでかつ電子部品を実装するのに十分な高さの半田バンプが形成され、半田バンプと電子部品の電極とが良好に接触して電子部品の電極と配線基板の半田バンプとを正確かつ良好に接続することができる。
【0011】
また、本発明の半田バンプ付き配線基板の製造方法によれば、電子部品接続パッドの中央部を露出させる第一の開口部を有する耐半田樹脂層上に、第一の開口部を露出させる第二の開口部を有する耐めっき樹脂層を被着させ、次に第一の開口部内に露出した電子部品接続パッド上および耐めっき樹脂層上に第一および第二の開口部を充填するように半田めっきを被着させ、次に半田めっきおよび耐めっき樹脂層をそれらの表面が同一平面をなすように研磨し、次に耐めっき樹脂層を除去することにより電子部品接続パッド上に第一の開口部を埋めるとともに耐半田樹脂層から突出し、上端に研磨された平坦面を有する半田めっきから成る半田バンプを形成することから、電子部品接続パッドの直径および配列ピッチが小さい場合であっても各電子部品接続パッド上に均一な高さでかつ電子部品を実装するのに十分な高さの半田バンプを形成することができ、その結果、半田バンプと電子部品の電極とが良好に接触して電子部品の電極と配線基板の半田バンプとを半田を介して正確かつ良好に接続することが可能な半田バンプ付き配線基板を提供することができる。
【0012】
【発明の実施の形態】
次に、本発明を添付の図面に基づき詳細に説明する。図1は、本発明の半田バンプ付き配線基板の実施の形態の一例を示す断面図であり、図2はその要部拡大断面図である。また、図3は本発明の半田バンプ付き配線基板の製造方法を説明するための工程毎の要部断面図である。
【0013】
図1において、1は絶縁基板、2は配線導体、3は電子部品接続パッド、4は耐半田樹脂層、5は半田バンプ、6は外部リードピンであり、主にこれらで本例の半田バンプ付き配線基板が構成されている。なお、この例では外部リードピン6を有する例を示したが、外部リードピン6は必ずしも必要ではなく、外部リードピン6に代えて例えば半田から成る外部接続用の端子を設けてもよい。
【0014】
絶縁基板1は、例えばガラス繊維を縦横に織り込んだガラス繊維基材にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させて成る板状の芯体1aの上下面にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂から成る絶縁層1bをそれぞれ複数層ずつ積層して成り、芯体1aや各絶縁層1bの表面には銅箔や銅めっき膜等の導体層から成る複数の配線導体2が形成されている。
【0015】
絶縁基板1を構成する芯体1aは、厚みが0.3〜1.5mm程度であり、その上面から下面にかけて直径が0.1〜1.0mm程度の複数の貫通孔7を有している。そして、各貫通孔7の内壁には配線導体2の一部が被着されており、芯体1aの上下面に形成された配線導体2同士が貫通孔7内の配線導体2を介して電気的に接続されている。
【0016】
このような芯体1aは、ガラス織物に未硬化の熱硬化性樹脂を含浸させたシートを熱硬化させた後、これに上面から下面にかけて貫通孔7用のドリル加工を施すことにより製作される。なお、芯体1aの上下面の配線導体2は、芯体1a用のシートの上下全面に厚みが3〜50μm程度の銅箔を貼着しておくとともに、この銅箔をシートの硬化後にエッチング加工することにより芯体1aの上下面に所定のパターンに形成される。また、貫通孔7内の配線導体2は、芯体1aに貫通孔7を設けた後に、この貫通孔7の内壁に無電解めっき法および電解めっき法により厚みが3〜50μm程度の銅めっき膜を析出させることにより貫通孔7の内壁に被着形成される。
【0017】
さらに、芯体1aは、その貫通孔7の内部にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂から成る樹脂柱8が充填されている。樹脂柱8は、貫通孔7を塞ぐことにより貫通孔7の直上および直下に絶縁層1bを形成可能とするためのものであり、未硬化のペースト状の熱硬化性樹脂を貫通孔7内にスクリーン印刷法により充填し、これを熱硬化させた後、その上下面を略平坦に研磨することにより形成される。そして、この樹脂柱8を含む芯体1aの上下面に絶縁層1bが積層されている。
【0018】
芯体1aの上下面に積層された絶縁層1bは、それぞれの厚みが20〜60μm程度であり、各層の上面から下面にかけて直径が30〜100μm程度の複数の貫通孔9を有しており、これらの貫通孔9内には配線導体2の一部が被着形成されている。これらの絶縁層1bは、配線導体2を高密度に配線するための絶縁間隔を提供するためのものである。そして、上層の配線導体2と下層の配線導体2とを貫通孔9内の配線導体2を介して電気的に接続することにより高密度配線を立体的に形成可能としている。
【0019】
このような絶縁層1bは、厚みが20〜60μm程度の未硬化の熱硬化性樹脂のフィルムを芯体1a上下面に貼着し、これを熱硬化させるとともにレーザー加工により貫通孔9を穿孔し、さらにその上に同様にして次の絶縁層1bを順次積み重ねることによって形成される。なお、各絶縁層1b表面および貫通孔9内に被着された配線導体2は、各絶縁層1bを形成する毎に各絶縁層1bの表面および貫通孔9内に5〜50μm程度の厚みの銅めっき膜を公知のセミアディティブ法やサブトラクティブ法等のパターン形成法により所定のパターンに被着させることによって形成される。
【0020】
さらに、最表層の絶縁層1b上には耐半田樹脂層4が被着されている。耐半田樹脂層4は、例えばアクリル変性エポキシ樹脂にシリカやタルク等の無機物粉末フィラーを30〜70質量%程度分散させた絶縁材料から成り、表層の配線導体2同士の電気的絶縁信頼性を高めるとともに、後述する電子部品接続パッド3やピン接合パッド10の絶縁基板1への接合強度を大きなものとする作用をなす。
【0021】
このような耐半田樹脂層4は、その厚みが10〜50μm程度であり、感光性を有する耐半田樹脂層4用の未硬化樹脂ペーストをロールコーター法やスクリーン印刷法を採用して最表層の絶縁層1b上に塗布し、これを乾燥させた後、露光および現像処理を行なって電子部品接続パッド3やピン接合パッド10の中央部を露出させる開口部4a、4bを形成した後、これを熱硬化させることによって形成される。あるいは、耐半田樹脂層4用の未硬化の樹脂フィルムを最上層の絶縁層1b上に貼着した後、これを熱硬化させ、しかる後、電子部品接続パッド3やピン接合パッド10に対応する位置にレーザービームを照射し、硬化した樹脂フィルムを部分的に除去することによって電子部品接続パッド3やピン接合パッド10を露出させる開口部4a、4bを有するように形成される。
【0022】
また、絶縁基板1の上面から下面にかけて形成された配線導体2は、電子部品の各電極を外部電気回路基板に接続するための導電路として機能し、絶縁基板1の上面の実装領域に設けられた部位の一部が電子部品の各電極に半田バンプ5を介して接合される電子部品接続パッド3を、絶縁基板1の下面に露出した部位の一部が外部電気回路基板に接続される外部リードピン6を接合するためのピン接合パッド10を形成している。このような電子部品接続パッド3やピン接合パッド10は、配線導体2に接続された導体層から成る略円形のパターンの外周部を耐半田樹脂層4により15〜35μm程度の幅で被覆してその露出する外周縁を画定することによりその露出する直径が、電子部品接続パッド3であれば70〜200μm程度に、ピン接合パッド10であれば0.5〜2.5mm程度になるように形成されている。このように電子部品接続パッド3およびピン接合パッド10の外周部を耐半田樹脂層4により被覆することによって、電子部品接続パッド3同士やピン接合パッド10同士の電気的な短絡が有効に防止されるとともに、電子部品接続パッド3やピン接合パッド10の絶縁基板1に対する接合強度が高いものとなっている。
【0023】
なお、ピン接合パッド10の露出する表面には、ピン接合パッド10の酸化腐蝕の防止と外部リードピン6との接続を良好にするために、ニッケル、金等の良導電性で耐腐蝕性に優れた金属をめっき法により1〜20μmの厚さに被着することが好ましい。
【0024】
さらに、電子部品接合パッド3上には図2に要部拡大断面図で示すように、上端に研磨された平坦面を有する鉛−錫合金めっき等の半田めっきから成る半田バンプ5が、耐半田樹脂層4の開口部4aを埋めるとともに耐半田樹脂層4から突出するようにして被着形成されている。このような半田バンプ5は、電子部品接続パッド3と電子部品の電極とを電気的および機械的に接続するための端子として機能し、電子部品の各電極がそれぞれ対応する半田バンプ5に当接するようにして電子部品を載置するとともに、これらを例えば電気炉などの加熱装置で加熱して半田バンプ5を溶融させることにより半田バンプ5と電子部品の電極とが接続される。
【0025】
そして、本発明の配線基板においては、電子部品接続パッド3上に、耐半田樹脂層4の開口部4aを埋めるとともに耐半田樹脂層4から突出する半田バンプ5が半田めっきにより形成されているとともにその上端に研磨つれた平坦面を有していることから、電子部品接続パッド3の直径および配列ピッチが小さくても、各電子部品接続パッド3上に均一な高さでかつ電子部品を実装するのに十分な高さを有する半田バンプ5が形成され、その結果、半田バンプ5の表面と電子部品の電極とが良好に接触して電子部品の電極と半田バンプ5とが正確かつ良好に接続される。
【0026】
さらに、本発明の半田バンプ付き配線基板においては、半田バンプ5の耐半田樹脂層4から突出した部位の径を耐半田樹脂層4の開口部4aの径よりも大きなものとしておくことが好ましい。このように、半田バンプ5の耐半田樹脂層4から突出した部位の径を耐半田樹脂層4の開口部4aの径よりも大きなものとしておくことによって、半田バンプ5の上端面の面積が大きなものとなり、その結果、電子部品を配線基板の上面に搭載する際に、面積の大きな上端面を有する半田バンプ5と電子部品の電極とが良好に接触して電子部品の電極と半田バンプ5とを正確かつ良好に接続することができる。
【0027】
なお、本発明において、このような形状の半田バンプ5を電子部品接続パッド3上に形成するには、まず、図3(a)に要部断面図で示すように、絶縁基板1の上面に電子部品接続パッド3およびこの電子部品接続パッド3の中央部を露出させる開口部4aを有する耐半田樹脂層4を形成する。電子部品接続パッド3を形成するには、最上層の絶縁層1bの上面に5〜50μm程度の厚みの銅めっき膜を公知のセミアディティブ法やサブトラクティブ法等のパターン形成法により所定のパターンに被着させればよい。また、耐半田樹脂層4を形成するには、感光性を有する耐半田樹脂層4用の未硬化樹脂ペーストをロールコーター法やスクリーン印刷法を採用して最表層の絶縁層1b上に塗布し、これを乾燥させた後、露光および現像処理を行なって電子部品接続パッド3の中央部を露出させる開口部4aを形成した後、これを熱硬化させればよい。
【0028】
次に、図3(b)に要部断面図で示すように、耐半田樹脂層4の上に開口部4aを露出させる開口部11aを有する耐めっき樹脂層11を被着する。このような耐めっき樹脂層11は、感光性の樹脂ペーストを耐半田樹脂層4の上面に塗布するとともに周知のフォトリソグラフィ法により露光および現像することにより耐半田樹脂層4の開口部4aを露出させる開口部11aを有するように形成される。なお、このとき耐めっき樹脂層11の開口部11aの径を耐半田樹脂層4の開口部4aの径よりも大きなものとしておくと、後述するように、電子部品接続パッド3上に開口部4aおよび開口部11aを充填するように半田めっきを被着させて半田バンプ5を形成する際に、半田バンプ5の耐半田樹脂層4から突出する部位の径を開口部4aの径よりも大きなものとして、半田バンプ5の上端面の面積を広いものとすることができる。したがって、耐めっき樹脂層11の開口部11aは耐半田樹脂層4の開口部4aよりも大きなものとしておくことが好ましい。
【0029】
次に図3(c)に要部断面図で示すように、電子部品接続パッド3および耐半田樹脂層4および耐めっき樹脂層11の露出する表面の全面に厚みが1〜2μm程度の無電解めっき導体層12を被着させる。無電解めっき導体層12は、後述する半田めっき13を耐半田樹脂層4の開口部4aおよび耐めっき樹脂層11の開口部11aを充填するように被着させるための下地用めっき導体として機能し、この無電解めっき導体層12から電解めっきのための電流を印加することにより無電解めっき導体層12上に後述する半田めっき13を被着させることができる。このような無電解めっき導体層12としては、例えば無電解銅めっきや無電解ニッケルめっきが用いられ、無電解めっき導体層12が例えば無電解銅めっきから成る場合であれば、無電解めっき用のパラジウム触媒水溶液を用いて電子部品接続パッド3および耐半田樹脂層4および耐めっき樹脂層11の露出表面にパラジウム触媒を付着させ、次に硫酸銅、ロッセル塩、ホルマリン、EDTAナトリウム塩、安定剤等を含有する無電解銅めっき液を用いて電子部品接続パッド3および耐半田樹脂層4および耐めっき樹脂層11のパラジウム触媒が付着された露出表面に厚みが1〜2m程度の無電解銅めっきを析出させることにより被着される。
【0030】
次に、図3(d)に要部断面図で示すように、電子部品接続パッド3および耐半田樹脂層4および耐めっき樹脂層11の露出する表面に被着された無電解めっき導体層12の表面に半田めっき13を耐半田樹脂層4の開口部4aおよび耐めっき樹脂層11の開口部11aを充填するように電解めっき法により被着させる。半田めっき13としては、電解鉛−錫合金めっき、電解錫−銀合金めっき、電解錫−亜鉛合金めっき、電解錫−銅合金めっき等が用いられ、例えば半田めっき13が電解鉛−錫合金めっきから成る場合であれば、メタンスルフォン酸第1錫、メタンスルフォン酸鉛、ペプシン、界面活性剤等を含有する電解鉛−錫合金めっき液を用いて無電解めっき層12から数A/dmの電流を印加しながら無電解めっき層12の表面に電解鉛−錫合金めっきを析出させることにより被着される。
【0031】
次に、図3(e)に要部断面図で示すように、耐めっき樹脂層11の上に被着された無電解めっき導体層12および半田めっき13を耐めっき樹脂層11の一部とともに機械的研磨により除去する。このとき、耐半田樹脂層4の開口部4aおよび耐めっき樹脂層11の開口部11a内に半田バンプ5となる半田めっき13が残るとともに、半田めっき13の上端面と耐めっき樹脂層11の表面とが同一平面をなすように研磨される。このように半田バンプ5が耐半田樹脂層4の開口部4aおよび耐めっき樹脂層11の開口部11a内に半田めっき13を充填するとともにその上端面を耐めっき樹脂層11の上面と同一面をなすように研磨することによって形成されることから、電子部品接続パッド3の直径および配列ピッチが小さくても、均一な高さでかつ電子部品を実装するのに十分な高さの半田バンプ5を形成することができる。さらに、耐めっき樹脂層11の開口部11aの径が耐半田樹脂層4の開口部4aの径よりも大きなものであると、半田バンプ5の耐半田樹脂層4から突出する部位の径を開口部4aの径よりも大きなものとして、半田バンプ5の上端面の面積を大きなものとすることができ、その結果、電子部品を配線基板の上面に搭載する際に、面積の大きな上端面を有する半田バンプ5と電子部品の電極とが良好に接触して電子部品の電極と導体バンプ5とを正確かつ良好に接続することができる。
【0032】
次に、図3(f)に要部断面図で示すように、耐めっき樹脂層12を水酸化ナトリウム水溶液等の剥離液を用いて剥離した後、最後に図3(g)に要部断面図で示すように、半田バンプ5の側面に被着された無電解めっき導体12を硫酸−過酸化水素水等のエッチング液を用いてエッチング除去することにより、電子部品接続パッド3上に、耐半田樹脂層4の開口部4aを埋めるとともに耐半田樹脂層4から突出する半田めっきからなる半田バンプ5を形成する。
【0033】
このように本発明の製造方法によれば、電子部品接続パッド3の直径および配列ピッチが小さい場合であっても各電子部品接続パッド3上に均一な高さでかつ電子部品を実装するのに十分な高さの半田バンプ5を備え、電子部品の電極と半田バンプ5とを正確かつ良好に接続可能な半田バンプ付き配線基板を提供することができる。
【0034】
また、ピン接合パッド10には、銅や鉄−ニッケル−コバルト合金等の金属から成る外部リードピン6が半田を介して接合されている。外部リードピン6は、配線基板に実装される電子部品を外部電気回路基板に電気的に接続するための端子部材として機能し、外部リードピン6を外部電気回路基板の配線導体に半田やソケットを介して接続することにより、電子部品が外部電気回路に電気的に接続されることとなる。
【0035】
かくして本発明により提供される半田バンプ付き配線基板によると、配線基板の上面に電子部品をその電極が半田バンプ5に当接するようにして載置するとともに、半田バンプ5を溶融させて電子部品の電極と半田バンプ5とを接合させることにより電子装置となる。
【0036】
なお、本発明は、上述の実施形態の一例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更が可能であることはいうまでもない。
【発明の効果】
本発明の半田バンプ付き配線基板によれば、電子部品接続パッド上に、耐半田樹脂層の開口部内を埋めるとともに耐半田樹脂層から突出するようにして被着された半田バンプを半田めっきにより形成し、その上端面を研磨された平坦面としたことから、電子部品接続パッドの直径および配列ピッチが小さい場合であっても各電子部品接続パッド上に均一な高さでかつ電子部品を実装するのに十分な高さの半田バンプが形成され、半田バンプと電子部品の電極とが良好に接触して電子部品の電極と配線基板の半田バンプとを正確かつ良好に接続することができる。
【0037】
また、本発明の半田バンプ付き配線基板の製造方法によれば、電子部品接続パッドの中央部を露出させる第一の開口部を有する耐半田樹脂層上に、第一の開口部を露出させる第二の開口部を有する耐めっき樹脂層を被着させ、次に第一の開口部内に露出した電子部品接続パッド上および耐めっき樹脂層上に第一および第二の開口部を充填するように半田めっきを被着させ、次に半田めっきおよび耐めっき樹脂層をそれらの表面が同一平面をなすように研磨し、次に耐めっき樹脂層を除去することにより電子部品接続パッド上に第一の開口部を埋めるとともに耐半田樹脂層から突出し、上端に研磨された平坦面を有する半田めっきから成る半田バンプを形成することから、電子部品接続パッドの直径および配列ピッチが小さい場合であっても各電子部品接続パッド上に均一な高さでかつ電子部品を実装するのに十分な高さの半田バンプを形成することができ、その結果、半田バンプ表面と電子部品の電極とが良好に接触して電子部品の電極と配線基板の半田バンプとを半田を介して正確かつ良好に接続することが可能な半田バンプ付き配線基板を提供することができる。
【図面の簡単な説明】
【図1】本発明の半田バンプ付き配線基板の実施形態例の断面図である。
【図2】図1に示す半田バンプ付き配線基板の要部拡大断面図である。
【図3】本発明の半田バンプ付き配線基板の製造方法を説明するための工程毎の要部断面図である。
【符号の説明】
1・・・・・・絶縁基板
2・・・・・・配線導体
3・・・・・・電子部品接続パッド
4・・・・・・耐半田樹脂層
4a・・・・・耐半田樹脂層4の開口部(第一の開口部)
5・・・・・・半田バンプ
11・・・・・耐めっき樹脂層
11a・・・・耐めっき樹脂層11の開口部(第二の開口部)
12・・・・・半田めっき
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a wiring board with solder bumps for mounting electronic components such as semiconductor elements and resistors, and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, wiring boards used for mounting electronic components such as semiconductor elements and resistors are provided with an insulating plate made of a glass fiber base material and a thermosetting resin and a wiring conductor layer made of a copper foil or the like alternately. 2. Description of the Related Art Printed circuit boards formed by lamination, and build-up boards formed by laminating a plurality of insulating layers made of a thermosetting resin and a filler and wiring conductor layers made of a copper plating layer on an insulating plate have been used. Then, on the upper surface of a wiring board such as a printed board or a build-up board, an electronic component connection pad for connecting an electrode of an electronic component such as a semiconductor element, and a withstand resistance for exposing a central portion of the electronic component connection pad. A solder resin layer is adhered and formed, and a solder bump for joining the electronic component and the electronic component connection pad is formed on the electronic component connection pad exposed from the solder resistant resin layer.
[0003]
In such a wiring board with solder bumps, the electronic component is placed on the upper surface of the wiring board such that each electrode thereof comes into contact with the corresponding solder bump, and these are heated by, for example, an electric furnace. The electronic component is mounted on the wiring board by heating the device to melt the solder bump and joining the solder bump and the electrode of the electronic component.
[0004]
Note that such a wiring board with solder bumps includes a plurality of substantially circular electronic component connection pads connected to the wiring conductors on the surface of an insulating substrate having a plurality of wiring conductors inside and / or on the surface. A solder-resin layer having an opening for exposing the central portion of the connection pad is applied, and a solder paste made of a flux and a solder powder is then screen-printed on the electronic component connection pad exposed from the solder-resist layer. It is manufactured by applying a printing method and heating it to vaporize and remove the flux in the solder paste and melt the solder powder in the solder paste to form solder bumps on the electronic component connection pads. I have.
[0005]
[Patent Document 1] Japanese Patent Application Laid-Open No. 2000-100852
[Problems to be solved by the invention]
However, in recent years, in a wiring board applied to a semiconductor element housing package for mounting a semiconductor element such as an IC or an LSI, and a hybrid integrated circuit device for mounting various electronic parts, the integration of an electronic component connection pad is increasing. There is a demand for miniaturization and high-density arrangement. For example, electronic component connection pads having a diameter of 60 μm or less and an arrangement pitch of 120 μm or less have come to appear. However, in the conventional method of printing solder paste on each electronic component connection pad using a screen printing method and then heating the solder paste to form solder bumps, the printed amount of the solder paste tends to fluctuate. When the diameter of the component connection pad is 60 μm or less and the arrangement pitch is 120 μm or less, the variation in the height of the solder bump becomes large, and it is difficult to accurately and satisfactorily connect the electrode of the electronic component and the solder bump. . In addition, it is necessary to reduce the amount of solder paste to be applied in order to prevent short-circuiting between solder bumps. Therefore, it is difficult to form a solder bump having a sufficient height necessary for mounting electronic components. there were.
[0007]
The present invention has been completed in view of such conventional problems, and has as its object to provide an electronic component connection pad even when the diameter and arrangement pitch of the electronic component connection pads formed on the surface of the insulating substrate are small. Solder bumps formed on top have no height variations and are equipped with solder bumps that are high enough to mount electronic components, so that electrodes and solder bumps of electronic components can be connected accurately and well. It is an object of the present invention to provide a wiring board with solder bumps that can be used.
[0008]
[Means for Solving the Problems]
The wiring board with solder bumps of the present invention has an insulating substrate having an electronic component connection pad formed on the surface, and an opening that is attached to the surface of the insulating substrate and exposes a central portion of the electronic component connection pad. In addition, the solder resin layer covering the outer periphery of the electronic component connection pad and the electronic component connection pad exposed in the opening of the solder resin layer are filled in the opening of the solder resin layer and projected from the solder resin layer. A wiring board with solder bumps, the solder bumps being formed by solder plating, and having a polished flat surface at the upper end thereof. Things.
[0009]
The method for manufacturing a wiring board with solder bumps according to the present invention includes the steps of preparing an insulating substrate having electronic component connection pads on the surface thereof, and then exposing a central portion of the electronic component connection pads on the surface of the insulating substrate. A step of applying a solder-resistant resin layer that covers the outer peripheral portion of the electronic component connection pad, and then has a second opening that exposes the first opening on the solder-resistant resin layer. Applying a plating-resistant resin layer, and then applying solder plating on the electronic component connection pads and the plating-resistant resin layer exposed in the first opening so as to fill the first and second openings. Attaching, then polishing the solder plating and the plating resistant resin layer so that their surfaces are flush with each other, and then removing the plating resistant resin layer to form the first on the electronic component connection pad. To fill the opening To protrude from the soldering resin layer, and is characterized in that to perform the steps of forming a solder bump made of solder plating having a flat surface which is polished on its upper end.
[0010]
According to the wiring board with solder bumps of the present invention, solder bumps are formed by solder plating that fill the openings of the solder-resistant resin layer on the electronic component connection pads and are applied so as to protrude from the solder-resistant resin layer. Since the upper end surface is a polished flat surface, even when the diameter and arrangement pitch of the electronic component connection pads are small, the electronic components can be mounted on each electronic component connection pad at a uniform height. Is formed sufficiently high, and the solder bumps and the electrodes of the electronic component are in good contact with each other, so that the electrodes of the electronic component and the solder bumps of the wiring board can be accurately and satisfactorily connected.
[0011]
Further, according to the method for manufacturing a wiring board with solder bumps of the present invention, the first opening is exposed on the solder-resistant resin layer having the first opening exposing the central part of the electronic component connection pad. A plating-resistant resin layer having two openings is applied, and then the first and second openings are filled on the electronic component connection pads and the plating-resistant resin layer exposed in the first opening. A solder plating is applied, and then the solder plating and the anti-plating resin layer are polished so that their surfaces are flush with each other, and then the first anti-plating resin layer is removed on the electronic component connection pad by removing the anti-plating resin layer. Filling the opening and projecting from the solder-resistant resin layer, and forming a solder bump made of solder plating having a polished flat surface at the upper end, even if the diameter and arrangement pitch of the electronic component connection pads are small, Solder bumps having a uniform height and sufficient height for mounting electronic components can be formed on the child component connection pads, and as a result, the solder bumps and the electrodes of the electronic components are in good contact with each other. It is possible to provide a wiring board with solder bumps that can accurately and satisfactorily connect the electrodes of the electronic component and the solder bumps of the wiring board via solder.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an example of an embodiment of a wiring board with solder bumps of the present invention, and FIG. 2 is an enlarged cross-sectional view of a main part thereof. FIG. 3 is a cross-sectional view of a principal part in each step for explaining the method for manufacturing a wiring board with solder bumps of the present invention.
[0013]
In FIG. 1, reference numeral 1 denotes an insulating substrate, 2 denotes a wiring conductor, 3 denotes an electronic component connection pad, 4 denotes a solder-resistant resin layer, 5 denotes a solder bump, and 6 denotes an external lead pin. A wiring board is configured. In this example, the example having the external lead pins 6 is shown. However, the external lead pins 6 are not always necessary, and instead of the external lead pins 6, an external connection terminal made of, for example, solder may be provided.
[0014]
The insulating substrate 1 is formed by impregnating a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin into a glass fiber base material in which glass fibers are woven vertically and horizontally. A plurality of insulating layers 1b each made of a thermosetting resin such as a maleimide triazine resin are laminated, and a plurality of conductive layers such as a copper foil and a copper plating film are formed on the surface of the core 1a and each insulating layer 1b. The wiring conductor 2 is formed.
[0015]
The core 1a constituting the insulating substrate 1 has a thickness of about 0.3 to 1.5 mm and has a plurality of through holes 7 with a diameter of about 0.1 to 1.0 mm from the upper surface to the lower surface. . A part of the wiring conductor 2 is attached to the inner wall of each through hole 7, and the wiring conductors 2 formed on the upper and lower surfaces of the core 1 a are electrically connected to each other through the wiring conductor 2 in the through hole 7. Connected.
[0016]
Such a core 1a is manufactured by thermally curing a sheet in which a glass fabric is impregnated with an uncured thermosetting resin, and then performing drilling for the through holes 7 from the upper surface to the lower surface. . The wiring conductors 2 on the upper and lower surfaces of the core 1a are attached with copper foil having a thickness of about 3 to 50 μm on the entire upper and lower surfaces of the sheet for the core 1a, and the copper foil is etched after the sheet is cured. By processing, a predetermined pattern is formed on the upper and lower surfaces of the core 1a. The wiring conductor 2 in the through-hole 7 is formed by forming a through-hole 7 in the core 1a and then forming a copper plating film having a thickness of about 3 to 50 μm on the inner wall of the through-hole 7 by electroless plating and electrolytic plating. Is deposited on the inner wall of the through-hole 7.
[0017]
Further, the core 1a is filled with a resin column 8 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin inside the through hole 7. The resin pillar 8 is for enabling the insulating layer 1b to be formed directly above and directly below the through hole 7 by closing the through hole 7, and the uncured paste-like thermosetting resin is placed in the through hole 7. It is formed by filling by a screen printing method, thermally curing the material, and then polishing the upper and lower surfaces thereof to be substantially flat. An insulating layer 1b is laminated on the upper and lower surfaces of the core 1a including the resin columns 8.
[0018]
The insulating layer 1b laminated on the upper and lower surfaces of the core 1a has a thickness of about 20 to 60 μm, and has a plurality of through holes 9 having a diameter of about 30 to 100 μm from the upper surface to the lower surface of each layer. A part of the wiring conductor 2 is formed in these through holes 9. These insulating layers 1b are for providing an insulating interval for wiring the wiring conductors 2 at high density. By electrically connecting the upper layer wiring conductor 2 and the lower layer wiring conductor 2 via the wiring conductor 2 in the through-hole 9, high-density wiring can be formed three-dimensionally.
[0019]
Such an insulating layer 1b is formed by attaching an uncured thermosetting resin film having a thickness of about 20 to 60 μm to the upper and lower surfaces of the core 1a, thermally curing the same, and forming the through holes 9 by laser processing. The insulating layer 1b is formed by successively stacking the next insulating layers 1b in a similar manner. The wiring conductor 2 attached to the surface of each insulating layer 1b and the inside of the through hole 9 has a thickness of about 5 to 50 μm on the surface of each insulating layer 1b and the inside of the through hole 9 every time the insulating layer 1b is formed. It is formed by applying a copper plating film to a predetermined pattern by a known pattern forming method such as a semi-additive method or a subtractive method.
[0020]
Further, a solder-resistant resin layer 4 is provided on the outermost insulating layer 1b. The solder-resistant resin layer 4 is made of, for example, an insulating material in which an inorganic powder filler such as silica or talc is dispersed in an acrylic-modified epoxy resin by about 30 to 70% by mass, and improves the electrical insulation reliability between the surface wiring conductors 2. At the same time, it has the effect of increasing the bonding strength of the later-described electronic component connection pads 3 and pin bonding pads 10 to the insulating substrate 1.
[0021]
Such a solder-resistant resin layer 4 has a thickness of about 10 to 50 μm. The uncured resin paste for the solder-resistant resin layer 4 having photosensitivity is formed on the outermost layer by using a roll coater method or a screen printing method. After coating on the insulating layer 1b and drying it, exposure and development processing is performed to form openings 4a and 4b for exposing the central parts of the electronic component connection pads 3 and the pin bonding pads 10, and then these are formed. It is formed by heat curing. Alternatively, after an uncured resin film for the solder-resistant resin layer 4 is adhered on the uppermost insulating layer 1b, this is thermally cured, and then, the resin film corresponds to the electronic component connection pad 3 or the pin bonding pad 10. A position is irradiated with a laser beam, and the cured resin film is partially removed to form openings 4a and 4b for exposing the electronic component connection pads 3 and the pin bonding pads 10.
[0022]
The wiring conductor 2 formed from the upper surface to the lower surface of the insulating substrate 1 functions as a conductive path for connecting each electrode of the electronic component to an external electric circuit board, and is provided in a mounting area on the upper surface of the insulating substrate 1. A part of the exposed portion is connected to an electronic component connection pad 3 connected to each electrode of the electronic component via a solder bump 5, and a portion of the exposed portion on the lower surface of the insulating substrate 1 is connected to an external electric circuit board. A pin bonding pad 10 for bonding the lead pin 6 is formed. Such an electronic component connection pad 3 and a pin bonding pad 10 are formed by covering an outer peripheral portion of a substantially circular pattern formed of a conductor layer connected to the wiring conductor 2 with a solder-resistant resin layer 4 to a width of about 15 to 35 μm. By defining the exposed outer peripheral edge, the exposed diameter is formed to be about 70 to 200 μm for the electronic component connection pad 3 and about 0.5 to 2.5 mm for the pin bonding pad 10. Have been. By covering the outer peripheral portions of the electronic component connection pads 3 and the pin bonding pads 10 with the solder-resistant resin layer 4 in this manner, an electrical short circuit between the electronic component connection pads 3 and the pin bonding pads 10 is effectively prevented. In addition, the bonding strength of the electronic component connection pads 3 and the pin bonding pads 10 to the insulating substrate 1 is high.
[0023]
In addition, on the exposed surface of the pin bonding pad 10, in order to prevent oxidation corrosion of the pin bonding pad 10 and to improve the connection with the external lead pins 6, nickel, gold or the like has good conductivity and excellent corrosion resistance. It is preferable to apply the metal to a thickness of 1 to 20 μm by plating.
[0024]
Further, solder bumps 5 made of solder plating such as lead-tin alloy plating having a polished flat surface at the upper end are provided on the electronic component bonding pads 3 as shown in an enlarged sectional view of a main part in FIG. It is formed so as to fill the opening 4 a of the resin layer 4 and protrude from the solder-resistant resin layer 4. Such a solder bump 5 functions as a terminal for electrically and mechanically connecting the electronic component connection pad 3 and an electrode of the electronic component, and each electrode of the electronic component contacts the corresponding solder bump 5. In this way, the electronic components are placed, and these are heated by a heating device such as an electric furnace to melt the solder bumps 5, so that the solder bumps 5 and the electrodes of the electronic components are connected.
[0025]
In the wiring board of the present invention, the solder bumps 5 that fill the openings 4a of the solder-resistant resin layer 4 and protrude from the solder-resistant resin layer 4 are formed on the electronic component connection pads 3 by solder plating. Since it has a polished flat surface at its upper end, even if the diameter and arrangement pitch of the electronic component connection pads 3 are small, electronic components are mounted on each electronic component connection pad 3 at a uniform height. Is formed, and the surface of the solder bump 5 and the electrode of the electronic component are in good contact with each other, so that the electrode of the electronic component and the solder bump 5 are accurately and well connected. Is done.
[0026]
Further, in the wiring board with solder bumps of the present invention, it is preferable that the diameter of the portion of the solder bump 5 protruding from the solder-resistant resin layer 4 be larger than the diameter of the opening 4 a of the solder-resistant resin layer 4. By setting the diameter of the portion of the solder bump 5 protruding from the solder-resistant resin layer 4 to be larger than the diameter of the opening 4a of the solder-resistant resin layer 4, the area of the upper end surface of the solder bump 5 is large. As a result, when the electronic component is mounted on the upper surface of the wiring board, the solder bump 5 having a large upper end surface and the electrode of the electronic component are in good contact with each other, and the electrode of the electronic component and the solder bump 5 Can be connected accurately and well.
[0027]
In the present invention, in order to form the solder bump 5 having such a shape on the electronic component connection pad 3, first, as shown in a sectional view of a main part in FIG. An electronic component connection pad and a solder-resistant resin layer having an opening exposing a central portion of the electronic component connection pad are formed. In order to form the electronic component connection pads 3, a copper plating film having a thickness of about 5 to 50 μm is formed on the upper surface of the uppermost insulating layer 1b into a predetermined pattern by a known patterning method such as a semi-additive method or a subtractive method. What is necessary is just to adhere. In order to form the solder-resistant resin layer 4, an uncured resin paste for the solder-resistant resin layer 4 having photosensitivity is applied on the outermost insulating layer 1b by using a roll coater method or a screen printing method. After drying, an exposure and a development process are performed to form an opening 4a for exposing the central part of the electronic component connection pad 3, and then this may be thermally cured.
[0028]
Next, as shown in a sectional view of a main part in FIG. 3B, a plating-resistant resin layer 11 having an opening 11a exposing the opening 4a is applied on the solder-resistant resin layer 4. Such a plating-resistant resin layer 11 exposes the opening 4a of the solder-resistant resin layer 4 by applying a photosensitive resin paste on the upper surface of the solder-resistant resin layer 4 and exposing and developing by a known photolithography method. It is formed so as to have an opening 11a. At this time, if the diameter of the opening 11a of the plating-resistant resin layer 11 is larger than the diameter of the opening 4a of the solder-resistant resin layer 4, as described later, the opening 4a is formed on the electronic component connection pad 3. When the solder bump is formed by applying solder plating so as to fill the opening 11a, the diameter of a portion of the solder bump 5 protruding from the solder resistant resin layer 4 is larger than the diameter of the opening 4a. As a result, the area of the upper end surface of the solder bump 5 can be made large. Therefore, it is preferable that the opening 11 a of the plating-resistant resin layer 11 be larger than the opening 4 a of the solder-resistant resin layer 4.
[0029]
Next, as shown in the sectional view of the main part in FIG. 3 (c), the entire surface of the exposed surface of the electronic component connection pad 3, the solder-resisting resin layer 4 and the plating-resisting resin layer 11 has a thickness of about 1 to 2 μm. The plating conductor layer 12 is applied. The electroless plating conductor layer 12 functions as a base plating conductor for depositing a later-described solder plating 13 so as to fill the opening 4 a of the solder-resistant resin layer 4 and the opening 11 a of the plating-resistant resin layer 11. By applying a current for electrolytic plating from the electroless plating conductor layer 12, a later-described solder plating 13 can be deposited on the electroless plating conductor layer 12. As such an electroless plating conductor layer 12, for example, electroless copper plating or electroless nickel plating is used. If the electroless plating conductor layer 12 is made of, for example, electroless copper plating, the Using a palladium catalyst aqueous solution, a palladium catalyst is attached to the exposed surfaces of the electronic component connection pads 3, the solder-resisting resin layer 4, and the plating-resisting resin layer 11, and then copper sulfate, rossel salt, formalin, sodium EDTA, a stabilizer, Electroless copper plating having a thickness of about 1 to 2 m is applied to the exposed surfaces of the electronic component connection pads 3 and the solder-resistant resin layer 4 and the plating-resistant resin layer 11 to which the palladium catalyst is attached, using an electroless copper plating solution containing Deposited by deposition.
[0030]
Next, as shown in the sectional view of the main part in FIG. 3 (d), the electroless plating conductor layer 12 adhered to the exposed surfaces of the electronic component connection pad 3, the solder-resistant resin layer 4, and the plating-resistant resin layer 11 is exposed. Is applied by electrolytic plating so as to fill the opening 4a of the solder-resistant resin layer 4 and the opening 11a of the plating-resistant resin layer 11. As the solder plating 13, electrolytic lead-tin alloy plating, electrolytic tin-silver alloy plating, electrolytic tin-zinc alloy plating, electrolytic tin-copper alloy plating, or the like is used. If this is the case, a current of several A / dm 2 from the electroless plating layer 12 using an electrolytic lead-tin alloy plating solution containing stannous methanesulfonate, lead methanesulfonate, pepsin, a surfactant, etc. Is applied by precipitating electrolytic lead-tin alloy plating on the surface of the electroless plating layer 12 while applying pressure.
[0031]
Next, as shown in a sectional view of a main part in FIG. 3E, the electroless plating conductor layer 12 and the solder plating 13 adhered on the plating resistant resin layer 11 are combined with a part of the plating resistant resin layer 11. Removed by mechanical polishing. At this time, the solder plating 13 which becomes the solder bump 5 remains in the opening 4a of the solder-resistant resin layer 4 and the opening 11a of the plating-resistant resin layer 11, and the upper end surface of the solder plating 13 and the surface of the plating-resistant resin layer 11 Are polished so as to form the same plane. In this way, the solder bumps 5 fill the solder plating 13 into the openings 4a of the solder-resistant resin layer 4 and the openings 11a of the plating-resistant resin layer 11, and the upper ends thereof are flush with the upper surface of the plating-resistant resin layer 11. Since the bumps are formed by polishing, the solder bumps 5 having a uniform height and a sufficient height for mounting the electronic component even if the diameter and the arrangement pitch of the electronic component connection pads 3 are small. Can be formed. Further, if the diameter of the opening 11a of the plating-resistant resin layer 11 is larger than the diameter of the opening 4a of the solder-resistant resin layer 4, the diameter of the portion of the solder bump 5 projecting from the solder-resistant resin layer 4 is increased. When the electronic component is mounted on the upper surface of the wiring board, the upper end surface of the solder bump 5 has a larger area as a result of having a larger area than the diameter of the portion 4a. The solder bumps 5 and the electrodes of the electronic component are in good contact, and the electrodes of the electronic component and the conductor bumps 5 can be connected accurately and well.
[0032]
Next, as shown in FIG. 3 (f), the plating-resistant resin layer 12 is peeled off using a peeling solution such as an aqueous sodium hydroxide solution. Finally, FIG. As shown in the figure, the electroless plating conductor 12 adhered to the side surface of the solder bump 5 is removed by etching using an etching solution such as sulfuric acid-hydrogen peroxide solution, so that the anti-electrode plating conductor 12 is formed on the electronic component connection pad 3. Solder bumps 5 are formed by solder plating that fill the openings 4a of the solder resin layer 4 and protrude from the solder resistant resin layer 4.
[0033]
As described above, according to the manufacturing method of the present invention, even when the diameter and the arrangement pitch of the electronic component connection pads 3 are small, it is possible to mount electronic components on each electronic component connection pad 3 at a uniform height. It is possible to provide a wiring board with solder bumps that has solder bumps 5 with a sufficient height and that can accurately and satisfactorily connect the electrodes of the electronic component and the solder bumps 5.
[0034]
External lead pins 6 made of a metal such as copper or an iron-nickel-cobalt alloy are joined to the pin joining pads 10 via solder. The external lead pins 6 function as terminal members for electrically connecting electronic components mounted on the wiring board to the external electric circuit board, and connect the external lead pins 6 to the wiring conductors of the external electric circuit board via solder or socket. By making the connection, the electronic component is electrically connected to the external electric circuit.
[0035]
Thus, according to the wiring board with solder bumps provided by the present invention, the electronic component is placed on the upper surface of the wiring board such that its electrodes are in contact with the solder bumps 5, and the solder bumps 5 are melted to form the electronic component. An electronic device is obtained by joining the electrodes and the solder bumps 5.
[0036]
It should be noted that the present invention is not limited to the example of the above-described embodiment, and various changes can be made without departing from the scope of the present invention.
【The invention's effect】
According to the wiring board with solder bumps of the present invention, solder bumps are formed on the electronic component connection pads by solder plating so as to fill the openings of the solder-resistant resin layer and protrude from the solder-resistant resin layer. Since the upper end surface is a polished flat surface, even when the diameter and the arrangement pitch of the electronic component connection pads are small, the electronic components are mounted on each electronic component connection pad at a uniform height. Therefore, the solder bumps having a sufficient height are formed, and the solder bumps and the electrodes of the electronic component are in good contact with each other, so that the electrodes of the electronic component and the solder bumps of the wiring board can be connected accurately and well.
[0037]
Further, according to the method for manufacturing a wiring board with solder bumps of the present invention, the first opening is exposed on the solder-resistant resin layer having the first opening exposing the central part of the electronic component connection pad. A plating-resistant resin layer having two openings is applied, and then the first and second openings are filled on the electronic component connection pads and the plating-resistant resin layer exposed in the first opening. A solder plating is applied, and then the solder plating and the anti-plating resin layer are polished so that their surfaces are flush with each other, and then the first anti-plating resin layer is removed on the electronic component connection pad by removing the anti-plating resin layer. Filling the opening and projecting from the solder-resistant resin layer and forming a solder bump made of solder plating having a polished flat surface on the upper end, even if the diameter and arrangement pitch of the electronic component connection pads are small, each Solder bumps having a uniform height and sufficient height for mounting electronic components can be formed on the child component connection pads.As a result, the surface of the solder bumps and the electrodes of the electronic components are in good contact with each other. Accordingly, it is possible to provide a wiring board with solder bumps, which can accurately and satisfactorily connect the electrodes of the electronic component and the solder bumps of the wiring board via solder.
[Brief description of the drawings]
FIG. 1 is a sectional view of an embodiment of a wiring board with solder bumps of the present invention.
FIG. 2 is an enlarged sectional view of a main part of the wiring board with solder bumps shown in FIG. 1;
FIG. 3 is a cross-sectional view of a principal part in each step for explaining the method for manufacturing a wiring board with solder bumps of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Insulating board 2 ... Wiring conductor 3 ... Electronic component connection pad 4 ... Solder-resistant resin layer 4a ... Solder-resistant resin layer Opening 4 (first opening)
5... Solder bump 11... Plating-resistant resin layer 11a... Opening of plating-resistant resin layer 11 (second opening)
12 ... Solder plating

Claims (4)

表面に電子部品接続パッドが形成された絶縁基板と、該絶縁基板の表面に被着されており、前記電子部品接続パッドの中央部を露出させる開口部を有するとともに前記電子部品接続パッドの外周部を被覆する耐半田樹脂層と、前記開口部内に露出した前記電子部品接続パッド上に、前記開口部内を埋めるとともに前記耐半田樹脂層から突出するようにして被着された半田バンプとを具備して成る半田バンプ付き配線基板であって、前記半田バンプは半田めっきから成り、その上端に研磨された平坦面を有していることを特徴とする半田バンプ付き配線基板。An insulating substrate having an electronic component connection pad formed on the surface thereof, and an opening attached to the surface of the insulating substrate and exposing a central portion of the electronic component connection pad, and an outer peripheral portion of the electronic component connection pad A solder bump that is applied on the electronic component connection pad exposed in the opening and that fills the opening and protrudes from the solder resistant resin layer. A wiring board with solder bumps, wherein the solder bumps are made of solder plating and have a polished flat surface at an upper end thereof. 前記半田バンプは、前記耐半田樹脂層から突出する部位の径が前記開口部内の径よりも大きなことを特徴とする請求項1記載の半田バンプ付き配線基板。2. The wiring board with solder bumps according to claim 1, wherein a diameter of a portion of the solder bump protruding from the solder-resistant resin layer is larger than a diameter of the inside of the opening. 表面に電子部品接続パッドを有する絶縁基板を準備する工程と、次に前記絶縁基板の表面に前記電子部品接続パッドの中央部を露出させる第一の開口部を有するとともに前記電子部品接続パッドの外周部を被覆する耐半田樹脂層を被着する工程と、次に前記耐半田樹脂層上に前記第一の開口部を露出させる第二の開口部を有する耐めっき樹脂層を被着する工程と、次に前記第一の開口部内に露出した前記電子部品接続パッド上および前記耐めっき樹脂層上に前記第一および第二の開口部を充填するように半田めっきを被着させる工程と、次に前記半田めっきおよび耐めっき樹脂層をそれらの表面が同一平面をなすように研磨する工程と、次に前記耐めっき樹脂層を除去することにより前記電子部品接続パッド上に前記第一の開口部を埋めるとともに前記耐半田樹脂層から突出し、その上端に研磨された平坦面を有する前記半田めっきから成る半田バンプを形成する工程とを行なうことを特徴とする半田バンプ付き配線基板の製造方法。A step of preparing an insulating substrate having electronic component connection pads on the surface, and a first opening on the surface of the insulating substrate for exposing a central portion of the electronic component connection pad, and an outer periphery of the electronic component connection pad Applying a solder-resistant resin layer covering the portion, and then applying a plating-resistant resin layer having a second opening exposing the first opening on the solder-resistant resin layer; and Next, a step of applying solder plating on the electronic component connection pads exposed in the first opening and on the plating-resistant resin layer so as to fill the first and second openings, Polishing the solder plating and the plating-resistant resin layer so that their surfaces are flush with each other, and then removing the plating-resistant resin layer to form the first opening on the electronic component connection pad. Fill in Protruding from the soldering resin layer also, the manufacturing method of the solder bumps wiring board and performing the step of forming the solder bumps made of the solder plating having a flat surface which is polished on its upper end. 前記第二の開口部の径が前記第一の開口部の径よりも大きいことを特徴とする請求項3記載の半田バンプ付き配線基板の製造方法。4. The method according to claim 3, wherein a diameter of the second opening is larger than a diameter of the first opening.
JP2002367249A 2002-12-18 2002-12-18 Wiring board with solder bump, and manufacturing method thereof Pending JP2004200412A (en)

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008004870A (en) * 2006-06-26 2008-01-10 Fujikura Ltd Wiring board and manufacturing method thereof
KR100905922B1 (en) 2008-02-15 2009-07-02 삼성전기주식회사 Printed circuit board for package and manufacturing method thereof
US7649341B2 (en) 2004-11-30 2010-01-19 Shin-Kobe Electric Machinery Co., Ltd. Storage battery unit
JP2012506628A (en) * 2008-10-21 2012-03-15 アトテツク・ドイチユラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Method for forming a solder deposit on a substrate
DE102013001387A1 (en) 2012-02-01 2013-08-01 Fanuc Corporation Pulse width modulation rectifier with a modulation scheme selector switch for a motor drive
JP2013534367A (en) * 2010-08-02 2013-09-02 アトテツク・ドイチユラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Method for forming solder deposits and non-molten bumps on a substrate
JP2013222729A (en) * 2012-04-12 2013-10-28 Shinko Electric Ind Co Ltd Method for forming bump
US9380712B2 (en) 2012-11-28 2016-06-28 Shinko Electric Indstries Co., Ltd. Wiring substrate and semiconductor device
JP2016127222A (en) * 2015-01-08 2016-07-11 イビデン株式会社 Printed wiring board with bump

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7649341B2 (en) 2004-11-30 2010-01-19 Shin-Kobe Electric Machinery Co., Ltd. Storage battery unit
JP2008004870A (en) * 2006-06-26 2008-01-10 Fujikura Ltd Wiring board and manufacturing method thereof
KR100905922B1 (en) 2008-02-15 2009-07-02 삼성전기주식회사 Printed circuit board for package and manufacturing method thereof
JP2012506628A (en) * 2008-10-21 2012-03-15 アトテツク・ドイチユラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Method for forming a solder deposit on a substrate
JP2013534367A (en) * 2010-08-02 2013-09-02 アトテツク・ドイチユラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Method for forming solder deposits and non-molten bumps on a substrate
KR20140000663A (en) * 2010-08-02 2014-01-03 아토테크더치랜드게엠베하 Method to form solder deposits and non-melting bump structures on substrates
KR102055459B1 (en) * 2010-08-02 2019-12-12 아토테크더치랜드게엠베하 Method to form solder deposits and non-melting bump structures on substrates
DE102013001387A1 (en) 2012-02-01 2013-08-01 Fanuc Corporation Pulse width modulation rectifier with a modulation scheme selector switch for a motor drive
DE102013001387B4 (en) 2012-02-01 2022-07-07 Fanuc Corporation Pulse width modulation rectifier with a modulation scheme selector switch for a motor drive
JP2013222729A (en) * 2012-04-12 2013-10-28 Shinko Electric Ind Co Ltd Method for forming bump
US9380712B2 (en) 2012-11-28 2016-06-28 Shinko Electric Indstries Co., Ltd. Wiring substrate and semiconductor device
JP2016127222A (en) * 2015-01-08 2016-07-11 イビデン株式会社 Printed wiring board with bump

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