TW201141065A - Input circuit - Google Patents
Input circuit Download PDFInfo
- Publication number
- TW201141065A TW201141065A TW099137779A TW99137779A TW201141065A TW 201141065 A TW201141065 A TW 201141065A TW 099137779 A TW099137779 A TW 099137779A TW 99137779 A TW99137779 A TW 99137779A TW 201141065 A TW201141065 A TW 201141065A
- Authority
- TW
- Taiwan
- Prior art keywords
- input
- node
- voltage
- circuit
- transistor
- Prior art date
Links
- 230000000903 blocking effect Effects 0.000 claims description 11
- 239000013078 crystal Substances 0.000 claims description 4
- 230000004044 response Effects 0.000 abstract description 19
- 238000010586 diagram Methods 0.000 description 22
- 230000000694 effects Effects 0.000 description 13
- 238000013459 approach Methods 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 238000003780 insertion Methods 0.000 description 2
- 230000037431 insertion Effects 0.000 description 2
- LQIAZOCLNBBZQK-UHFFFAOYSA-N 1-(1,2-Diphosphanylethyl)pyrrolidin-2-one Chemical compound PCC(P)N1CCCC1=O LQIAZOCLNBBZQK-UHFFFAOYSA-N 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
- H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
- H03K5/1515—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs non-overlapping
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Nonlinear Science (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009258413A JP5421075B2 (ja) | 2009-11-11 | 2009-11-11 | 入力回路 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW201141065A true TW201141065A (en) | 2011-11-16 |
Family
ID=43973708
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW099137779A TW201141065A (en) | 2009-11-11 | 2010-11-03 | Input circuit |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20110109364A1 (cg-RX-API-DMAC7.html) |
| JP (1) | JP5421075B2 (cg-RX-API-DMAC7.html) |
| KR (1) | KR20110052520A (cg-RX-API-DMAC7.html) |
| CN (1) | CN102064694B (cg-RX-API-DMAC7.html) |
| TW (1) | TW201141065A (cg-RX-API-DMAC7.html) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9152237B1 (en) * | 2014-06-17 | 2015-10-06 | Realtek Semiconductor Corp. | Power bouncing reduction circuit and method thereof |
| JP7063651B2 (ja) * | 2018-02-19 | 2022-05-09 | エイブリック株式会社 | 信号検出回路及び信号検出方法 |
| JP7361474B2 (ja) * | 2019-01-31 | 2023-10-16 | エイブリック株式会社 | 入力回路 |
| WO2020176793A1 (en) | 2019-02-27 | 2020-09-03 | Nanomosaic Llc | Nanosensors and use thereof |
| JP2022083085A (ja) * | 2020-11-24 | 2022-06-03 | 株式会社東芝 | 半導体集積回路 |
| DE102021111796A1 (de) * | 2021-03-19 | 2022-09-22 | Infineon Technologies Ag | Hochgeschwindigkeitsdigitalsignaltreiber mit niedrigem leistungsverbrauch |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5877317A (ja) * | 1981-11-02 | 1983-05-10 | Matsushita Electric Ind Co Ltd | シユミツト・トリガ回路 |
| US4539489A (en) * | 1983-06-22 | 1985-09-03 | Motorola, Inc. | CMOS Schmitt trigger circuit |
| US5349246A (en) * | 1992-12-21 | 1994-09-20 | Sgs-Thomson Microelectronics, Inc. | Input buffer with hysteresis characteristics |
| US5386153A (en) * | 1993-09-23 | 1995-01-31 | Cypress Semiconductor Corporation | Buffer with pseudo-ground hysteresis |
| US5459437A (en) * | 1994-05-10 | 1995-10-17 | Integrated Device Technology | Logic gate with controllable hysteresis and high frequency voltage controlled oscillator |
| JPH10229331A (ja) * | 1997-02-14 | 1998-08-25 | Texas Instr Japan Ltd | 入力回路 |
| JPH10290145A (ja) * | 1997-04-14 | 1998-10-27 | Texas Instr Japan Ltd | ヒステリシス回路 |
| KR100266011B1 (ko) * | 1997-10-01 | 2000-09-15 | 김영환 | 히스테리시스입력버퍼 |
| US6433602B1 (en) * | 2000-08-30 | 2002-08-13 | Lattice Semiconductor Corp. | High speed Schmitt Trigger with low supply voltage |
| JP2004096319A (ja) * | 2002-08-30 | 2004-03-25 | Mitsubishi Electric Corp | シュミットトリガ回路 |
| US7183826B2 (en) * | 2004-03-11 | 2007-02-27 | Seiko Epson Corporation | High hysteresis width input circuit |
| US20090009217A1 (en) * | 2006-02-16 | 2009-01-08 | Nxp B.V. | Transformation of an input signal into a logical output voltage level with a hysteresis behavior |
| JP4887111B2 (ja) * | 2006-10-12 | 2012-02-29 | オンセミコンダクター・トレーディング・リミテッド | シュミット回路 |
| JP4983562B2 (ja) * | 2007-11-16 | 2012-07-25 | 富士通セミコンダクター株式会社 | シュミット回路 |
-
2009
- 2009-11-11 JP JP2009258413A patent/JP5421075B2/ja not_active Expired - Fee Related
-
2010
- 2010-11-03 TW TW099137779A patent/TW201141065A/zh unknown
- 2010-11-10 US US12/943,697 patent/US20110109364A1/en not_active Abandoned
- 2010-11-11 KR KR1020100112127A patent/KR20110052520A/ko not_active Ceased
- 2010-11-11 CN CN201010553872.2A patent/CN102064694B/zh not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20110109364A1 (en) | 2011-05-12 |
| CN102064694A (zh) | 2011-05-18 |
| CN102064694B (zh) | 2015-06-10 |
| JP5421075B2 (ja) | 2014-02-19 |
| JP2011103607A (ja) | 2011-05-26 |
| KR20110052520A (ko) | 2011-05-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8598936B2 (en) | Semiconductor integrated circuit | |
| US7034573B1 (en) | Level shifter without DC current flow | |
| JP5285773B2 (ja) | 入出力回路 | |
| TW201141065A (en) | Input circuit | |
| TWI382664B (zh) | 具有3伏特輔助的5伏特容限積體電路信號墊 | |
| JP3657243B2 (ja) | レベルシフタ、半導体集積回路及び情報処理システム | |
| JP3948621B2 (ja) | インターフェース回路 | |
| JP6288822B2 (ja) | 半導体回路内の電力を制御するためのシステムおよび方法 | |
| WO2012042683A1 (ja) | レベルシフト回路 | |
| JP5599993B2 (ja) | 半導体装置 | |
| CN110663185B (zh) | 三态输出缓冲器的栅极控制电路 | |
| JP3636848B2 (ja) | Cmosヒステリシス回路 | |
| CN107534441A (zh) | 电平移位器 | |
| JP5611118B2 (ja) | 半導体集積回路 | |
| JPWO2009147770A1 (ja) | クロック信号増幅回路 | |
| TW201121242A (en) | CMOS input buffer circuit | |
| JP2006270132A (ja) | 半導体集積回路装置 | |
| CN101388662A (zh) | 电平转换电路 | |
| CN113826325B (zh) | 电压电平移位器 | |
| TW201924211A (zh) | 與通用型輸入輸出(gpio)相容之低電壓晶體振盪器電路 | |
| JP7396774B2 (ja) | 論理回路 | |
| JP5805380B2 (ja) | 半導体集積装置における遅延回路及びインバータ | |
| JP3779509B2 (ja) | 半導体集積回路の出力回路 | |
| KR20220067490A (ko) | 지연 회로 | |
| KR102615562B1 (ko) | 듀얼 패드 전압 레벨 시프터용 정적 및 간헐적인 동적 멀티-바이어스 코어 |