TW200725745A - Method for forming semiconductor device having fin structure - Google Patents

Method for forming semiconductor device having fin structure

Info

Publication number
TW200725745A
TW200725745A TW095113623A TW95113623A TW200725745A TW 200725745 A TW200725745 A TW 200725745A TW 095113623 A TW095113623 A TW 095113623A TW 95113623 A TW95113623 A TW 95113623A TW 200725745 A TW200725745 A TW 200725745A
Authority
TW
Taiwan
Prior art keywords
forming
gate
semiconductor device
fin structure
over
Prior art date
Application number
TW095113623A
Other languages
English (en)
Other versions
TWI317977B (en
Inventor
Young-Bog Kim
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200725745A publication Critical patent/TW200725745A/zh
Application granted granted Critical
Publication of TWI317977B publication Critical patent/TWI317977B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H01L29/7851—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET with the body tied to the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
TW095113623A 2005-12-30 2006-04-17 Method for forming semiconductor device having fin structure TWI317977B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050135233A KR100720232B1 (ko) 2005-12-30 2005-12-30 핀 구조의 반도체 소자의 형성방법

Publications (2)

Publication Number Publication Date
TW200725745A true TW200725745A (en) 2007-07-01
TWI317977B TWI317977B (en) 2009-12-01

Family

ID=38214343

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095113623A TWI317977B (en) 2005-12-30 2006-04-17 Method for forming semiconductor device having fin structure

Country Status (5)

Country Link
US (1) US7566621B2 (zh)
JP (1) JP2007184518A (zh)
KR (1) KR100720232B1 (zh)
CN (1) CN100573849C (zh)
TW (1) TWI317977B (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100577562B1 (ko) * 2004-02-05 2006-05-08 삼성전자주식회사 핀 트랜지스터 형성방법 및 그에 따른 구조
KR100799121B1 (ko) * 2005-12-22 2008-01-29 주식회사 하이닉스반도체 벌브 리세스 게이트를 갖는 반도체 소자의 제조방법
KR100704475B1 (ko) * 2005-12-28 2007-04-09 주식회사 하이닉스반도체 듀얼 폴리 리세스 게이트를 갖는 반도체 소자의 제조방법
KR100838378B1 (ko) * 2006-09-29 2008-06-13 주식회사 하이닉스반도체 핀트랜지스터의 제조 방법
KR100762912B1 (ko) * 2006-09-30 2007-10-08 주식회사 하이닉스반도체 비대칭의 벌브형 리세스 게이트를 갖는 반도체 소자 및그의 제조방법
KR100968151B1 (ko) * 2008-05-06 2010-07-06 주식회사 하이닉스반도체 핀 구조의 채널을 갖는 반도체 소자 및 그 제조방법
KR101004482B1 (ko) * 2008-05-27 2010-12-31 주식회사 하이닉스반도체 반도체 소자의 형성 방법
KR101113794B1 (ko) 2008-08-04 2012-02-27 주식회사 하이닉스반도체 반도체 장치 제조 방법
KR101061321B1 (ko) * 2009-03-02 2011-08-31 주식회사 하이닉스반도체 융기된 랜딩 플러그 콘택을 갖는 새들 핀 트랜지스터 및 그형성 방법
US8552478B2 (en) * 2011-07-01 2013-10-08 Nanya Technology Corporation Corner transistor and method of fabricating the same
KR101595780B1 (ko) 2014-08-14 2016-02-19 경북대학교 산학협력단 GaN-Fin 구조 및 FinFET를 제조하는 방법 및 이러한 방법으로 제조된 GaN-Fin 구조를 사용하는 소자 및 FinFET
US9911806B2 (en) 2015-05-22 2018-03-06 Taiwan Semiconductor Manufacturing Company, Ltd. Solvent-based oxidation on germanium and III-V compound semiconductor materials
TWI699885B (zh) 2016-03-22 2020-07-21 聯華電子股份有限公司 半導體結構與其製作方法
US10242882B2 (en) 2017-06-12 2019-03-26 International Business Machines Corporation Cyclic etch process to remove dummy gate oxide layer for fin field effect transistor fabrication
US11417369B2 (en) * 2019-12-31 2022-08-16 Etron Technology, Inc. Semiconductor device structure with an underground interconnection embedded into a silicon substrate

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US5372960A (en) * 1994-01-04 1994-12-13 Motorola, Inc. Method of fabricating an insulated gate semiconductor device
US5362665A (en) * 1994-02-14 1994-11-08 Industrial Technology Research Institute Method of making vertical DRAM cross point memory cell
US5518950A (en) * 1994-09-02 1996-05-21 Advanced Micro Devices, Inc. Spin-on-glass filled trench isolation method for semiconductor circuits
US5851928A (en) * 1995-11-27 1998-12-22 Motorola, Inc. Method of etching a semiconductor substrate
US6297128B1 (en) * 1999-01-29 2001-10-02 Vantis Corporation Process for manufacturing shallow trenches filled with dielectric material having low mechanical stress
KR100295782B1 (ko) * 1999-07-03 2001-07-12 윤종용 얕은 트렌치 소자분리 방법
JP4860022B2 (ja) * 2000-01-25 2012-01-25 エルピーダメモリ株式会社 半導体集積回路装置の製造方法
KR100568854B1 (ko) * 2003-06-17 2006-04-10 삼성전자주식회사 반도체 메모리에서의 리세스 채널을 갖는 트랜지스터 형성방법
KR100517559B1 (ko) * 2003-06-27 2005-09-28 삼성전자주식회사 핀 전계효과 트랜지스터 및 그의 핀 형성방법
US7326619B2 (en) * 2003-08-20 2008-02-05 Samsung Electronics Co., Ltd. Method of manufacturing integrated circuit device including recessed channel transistor
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KR100577562B1 (ko) * 2004-02-05 2006-05-08 삼성전자주식회사 핀 트랜지스터 형성방법 및 그에 따른 구조
JP2006054431A (ja) * 2004-06-29 2006-02-23 Infineon Technologies Ag トランジスタ、メモリセルアレイ、および、トランジスタ製造方法
US7442609B2 (en) * 2004-09-10 2008-10-28 Infineon Technologies Ag Method of manufacturing a transistor and a method of forming a memory device with isolation trenches
US7189617B2 (en) * 2005-04-14 2007-03-13 Infineon Technologies Ag Manufacturing method for a recessed channel array transistor and corresponding recessed channel array transistor
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US7402856B2 (en) * 2005-12-09 2008-07-22 Intel Corporation Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same
US20090014810A1 (en) * 2007-06-26 2009-01-15 Eun-Jong Shin Method for fabricating shallow trench isolation and method for fabricating transistor

Also Published As

Publication number Publication date
KR100720232B1 (ko) 2007-05-23
TWI317977B (en) 2009-12-01
US7566621B2 (en) 2009-07-28
CN100573849C (zh) 2009-12-23
US20070155148A1 (en) 2007-07-05
CN1992201A (zh) 2007-07-04
JP2007184518A (ja) 2007-07-19

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees