TW200612797A - PCB and method for manufacturing PCB - Google Patents
PCB and method for manufacturing PCBInfo
- Publication number
- TW200612797A TW200612797A TW094115550A TW94115550A TW200612797A TW 200612797 A TW200612797 A TW 200612797A TW 094115550 A TW094115550 A TW 094115550A TW 94115550 A TW94115550 A TW 94115550A TW 200612797 A TW200612797 A TW 200612797A
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- solder
- pcb
- adhesiveness
- reduces
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01012—Magnesium [Mg]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3463—Solder compositions in relation to features of the printed circuit board or the mounting process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004300697A JP5066783B2 (ja) | 2004-10-14 | 2004-10-14 | 多層プリント配線板及び多層プリント配線板の製造方法 |
JP2004300696A JP4794154B2 (ja) | 2004-10-14 | 2004-10-14 | 多層プリント配線板の製造方法 |
JP2004373472A JP4679139B2 (ja) | 2004-12-24 | 2004-12-24 | プリント配線板及びプリント配線板の製造方法 |
JP2004373471A JP4812296B2 (ja) | 2004-12-24 | 2004-12-24 | プリント配線板およびプリント配線板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200612797A true TW200612797A (en) | 2006-04-16 |
TWI333404B TWI333404B (zh) | 2010-11-11 |
Family
ID=36148149
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094115550A TW200612797A (en) | 2004-10-14 | 2005-05-13 | PCB and method for manufacturing PCB |
Country Status (3)
Country | Link |
---|---|
US (2) | US7943861B2 (zh) |
TW (1) | TW200612797A (zh) |
WO (1) | WO2006040847A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI451822B (zh) * | 2007-10-05 | 2014-09-01 | Fujitsu Ltd | 電路板、半導體裝置及製造半導體裝置的方法 |
CN107079590A (zh) * | 2014-10-24 | 2017-08-18 | 住友电工印刷电路株式会社 | 柔性印刷电路板和用于制造柔性印刷电路板的方法 |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007258436A (ja) * | 2006-03-23 | 2007-10-04 | Alps Electric Co Ltd | 配線基板、及びその製造方法 |
US7808799B2 (en) * | 2006-04-25 | 2010-10-05 | Ngk Spark Plug Co., Ltd. | Wiring board |
US20080136019A1 (en) * | 2006-12-11 | 2008-06-12 | Johnson Michael E | Solder Bump/Under Bump Metallurgy Structure for High Temperature Applications |
JP2009004454A (ja) * | 2007-06-19 | 2009-01-08 | Shinko Electric Ind Co Ltd | 電極構造体及びその形成方法と電子部品及び実装基板 |
US8440916B2 (en) * | 2007-06-28 | 2013-05-14 | Intel Corporation | Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method |
US8877565B2 (en) * | 2007-06-28 | 2014-11-04 | Intel Corporation | Method of forming a multilayer substrate core structure using sequential microvia laser drilling and substrate core structure formed according to the method |
US8242378B2 (en) * | 2007-09-21 | 2012-08-14 | Agere Systems Inc. | Soldering method and related device for improved resistance to brittle fracture with an intermetallic compound region coupling a solder mass to an Ni layer which has a low concentration of P, wherein the amount of P in the underlying Ni layer is controlled as a function of the expected volume of the solder mass |
US8293587B2 (en) | 2007-10-11 | 2012-10-23 | International Business Machines Corporation | Multilayer pillar for reduced stress interconnect and method of making same |
KR20090042556A (ko) * | 2007-10-26 | 2009-04-30 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
WO2009057259A1 (ja) * | 2007-11-01 | 2009-05-07 | Panasonic Corporation | 電子部品実装構造体およびその製造方法 |
US8309856B2 (en) * | 2007-11-06 | 2012-11-13 | Ibiden Co., Ltd. | Circuit board and manufacturing method thereof |
KR20090067249A (ko) * | 2007-12-21 | 2009-06-25 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
KR20090081472A (ko) * | 2008-01-24 | 2009-07-29 | 삼성전자주식회사 | 실장 기판 및 이를 이용한 반도체 패키지의 제조 방법 |
KR101279291B1 (ko) * | 2008-03-05 | 2013-06-26 | 센주긴조쿠고교 가부시키가이샤 | 납프리 땜납 접속 구조체 및 땜납 볼 |
US8263878B2 (en) * | 2008-03-25 | 2012-09-11 | Ibiden Co., Ltd. | Printed wiring board |
TWI365517B (en) * | 2008-05-23 | 2012-06-01 | Unimicron Technology Corp | Circuit structure and manufactring method thereof |
JP2010050150A (ja) * | 2008-08-19 | 2010-03-04 | Panasonic Corp | 半導体装置及び半導体モジュール |
EP2177646B1 (en) * | 2008-10-17 | 2011-03-23 | ATOTECH Deutschland GmbH | Stress-reduced Ni-P/Pd stacks for bondable wafer surfaces |
KR101025520B1 (ko) * | 2008-11-26 | 2011-04-04 | 삼성전기주식회사 | 다층 인쇄회로기판 제조방법 |
US8013444B2 (en) * | 2008-12-24 | 2011-09-06 | Intel Corporation | Solder joints with enhanced electromigration resistance |
US8592691B2 (en) * | 2009-02-27 | 2013-11-26 | Ibiden Co., Ltd. | Printed wiring board |
JP4973761B2 (ja) * | 2009-05-25 | 2012-07-11 | 株式会社デンソー | 半導体装置 |
KR101070022B1 (ko) * | 2009-09-16 | 2011-10-04 | 삼성전기주식회사 | 다층 세라믹 회로 기판, 다층 세라믹 회로 기판 제조방법 및 이를 이용한 전자 디바이스 모듈 |
EP2309535A1 (en) | 2009-10-09 | 2011-04-13 | Telefonaktiebolaget L M Ericsson (Publ) | Chip package with a chip embedded in a wiring body |
JP5623308B2 (ja) * | 2010-02-26 | 2014-11-12 | 日本特殊陶業株式会社 | 多層配線基板及びその製造方法 |
KR101138542B1 (ko) * | 2010-08-09 | 2012-04-25 | 삼성전기주식회사 | 다층 인쇄회로기판의 제조방법 |
US8889995B2 (en) | 2011-03-03 | 2014-11-18 | Skyworks Solutions, Inc. | Wire bond pad system and method |
US9679869B2 (en) | 2011-09-02 | 2017-06-13 | Skyworks Solutions, Inc. | Transmission line for high performance radio frequency applications |
EP3567629A3 (en) * | 2012-06-14 | 2020-01-22 | Skyworks Solutions, Inc. | Power amplifier modules including related systems, devices, and methods |
JP2014013795A (ja) * | 2012-07-03 | 2014-01-23 | Seiko Epson Corp | ベース基板、電子デバイスおよび電子機器 |
US10123415B2 (en) * | 2012-09-07 | 2018-11-06 | Ngk Spark Plug Co., Ltd. | Wiring substrate and production method therefor |
KR101513494B1 (ko) * | 2013-12-04 | 2015-04-21 | 엠케이전자 주식회사 | 무연 솔더, 솔더 페이스트 및 반도체 장치 |
JP2015231003A (ja) * | 2014-06-06 | 2015-12-21 | イビデン株式会社 | 回路基板および回路基板の製造方法 |
KR20160010960A (ko) * | 2014-07-21 | 2016-01-29 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
JP2016076534A (ja) * | 2014-10-03 | 2016-05-12 | イビデン株式会社 | 金属ポスト付きプリント配線板およびその製造方法 |
US10049996B2 (en) * | 2016-04-01 | 2018-08-14 | Intel Corporation | Surface finishes for high density interconnect architectures |
KR20190012485A (ko) * | 2017-07-27 | 2019-02-11 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조 방법 |
JP2019140174A (ja) * | 2018-02-07 | 2019-08-22 | イビデン株式会社 | プリント配線板およびプリント配線板の製造方法 |
KR20200091060A (ko) * | 2019-01-21 | 2020-07-30 | 삼성디스플레이 주식회사 | 표시 장치 |
US11109481B2 (en) * | 2019-02-15 | 2021-08-31 | Ibiden Co., Ltd. | Method for manufacturing printed wiring board and printed wiring board |
US20220336400A1 (en) * | 2021-04-15 | 2022-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Connecting structure, package structure and manufacturing method thereof |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4094074B2 (ja) * | 1996-03-22 | 2008-06-04 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
JP3481392B2 (ja) * | 1996-06-13 | 2003-12-22 | 古河電気工業株式会社 | 電子部品リード部材及びその製造方法 |
JP3296992B2 (ja) * | 1996-09-27 | 2002-07-02 | イビデン株式会社 | 多層プリント配線板の製造方法 |
JPH11121529A (ja) * | 1997-10-15 | 1999-04-30 | Sumitomo Metal Smi Electron Devices Inc | Icパッケージ用の半田ボールパッド及びその製造方法 |
JP2000022027A (ja) * | 1998-06-29 | 2000-01-21 | Sony Corp | 半導体装置、その製造方法およびパッケージ用基板 |
JP3437453B2 (ja) | 1998-07-06 | 2003-08-18 | イビデン株式会社 | Icチップ実装用プリント配線板およびその製造方法 |
JP3465014B2 (ja) | 1999-06-01 | 2003-11-10 | シプレイ・ファーイースト株式会社 | パッケージ介挿基板及びその製造方法 |
JP3692272B2 (ja) | 2000-01-27 | 2005-09-07 | 京セラ株式会社 | 配線基板 |
JP3866503B2 (ja) * | 2000-10-18 | 2007-01-10 | 株式会社東芝 | 半導体装置 |
KR100371567B1 (ko) * | 2000-12-08 | 2003-02-07 | 삼성테크윈 주식회사 | Ag 선도금을 이용한 반도체 패키지용 리드프레임 |
JP3910363B2 (ja) * | 2000-12-28 | 2007-04-25 | 富士通株式会社 | 外部接続端子 |
JP4181759B2 (ja) | 2001-06-01 | 2008-11-19 | 日本電気株式会社 | 電子部品の実装方法および実装構造体の製造方法 |
JP2003037133A (ja) * | 2001-07-25 | 2003-02-07 | Hitachi Ltd | 半導体装置およびその製造方法ならびに電子装置 |
JP2003124533A (ja) * | 2001-10-18 | 2003-04-25 | Paloma Ind Ltd | 直列型熱電対 |
JP2003303842A (ja) * | 2002-04-12 | 2003-10-24 | Nec Electronics Corp | 半導体装置およびその製造方法 |
JP2004079891A (ja) | 2002-08-21 | 2004-03-11 | Ngk Spark Plug Co Ltd | 配線基板、及び、配線基板の製造方法 |
JP2004281937A (ja) | 2003-03-18 | 2004-10-07 | Ngk Spark Plug Co Ltd | 配線基板及びその製造方法 |
KR100923900B1 (ko) * | 2003-10-07 | 2009-10-28 | 센주긴조쿠고교 가부시키가이샤 | 무연 솔더볼 |
JP4794154B2 (ja) | 2004-10-14 | 2011-10-19 | イビデン株式会社 | 多層プリント配線板の製造方法 |
JP5066783B2 (ja) | 2004-10-14 | 2012-11-07 | イビデン株式会社 | 多層プリント配線板及び多層プリント配線板の製造方法 |
DE102006043133B4 (de) * | 2006-09-14 | 2009-09-24 | Infineon Technologies Ag | Anschlusspad zu einem Kontaktieren eines Bauelements und Verfahren zu dessen Herstellung |
US20080136019A1 (en) * | 2006-12-11 | 2008-06-12 | Johnson Michael E | Solder Bump/Under Bump Metallurgy Structure for High Temperature Applications |
-
2005
- 2005-03-15 WO PCT/JP2005/004558 patent/WO2006040847A1/ja active Application Filing
- 2005-03-15 US US11/576,987 patent/US7943861B2/en active Active
- 2005-05-13 TW TW094115550A patent/TW200612797A/zh unknown
-
2009
- 2009-06-30 US US12/494,948 patent/US8156646B2/en active Active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI451822B (zh) * | 2007-10-05 | 2014-09-01 | Fujitsu Ltd | 電路板、半導體裝置及製造半導體裝置的方法 |
US8952271B2 (en) | 2007-10-05 | 2015-02-10 | Fujitsu Limited | Circuit board, semiconductor device, and method of manufacturing semiconductor device |
CN107079590A (zh) * | 2014-10-24 | 2017-08-18 | 住友电工印刷电路株式会社 | 柔性印刷电路板和用于制造柔性印刷电路板的方法 |
CN107079590B (zh) * | 2014-10-24 | 2019-05-28 | 住友电工印刷电路株式会社 | 柔性印刷电路板和用于制造柔性印刷电路板的方法 |
Also Published As
Publication number | Publication date |
---|---|
US20090285980A1 (en) | 2009-11-19 |
US7943861B2 (en) | 2011-05-17 |
WO2006040847A1 (ja) | 2006-04-20 |
US8156646B2 (en) | 2012-04-17 |
TWI333404B (zh) | 2010-11-11 |
US20080264681A1 (en) | 2008-10-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200612797A (en) | PCB and method for manufacturing PCB | |
TW200629447A (en) | Wire bonding method | |
SG117395A1 (en) | Wire bonded microelectronic device assemblies and methods of manufacturing same | |
WO2005106497A3 (en) | Led bonding structures and methods of fabricating led bonding structures | |
WO2009014168A1 (ja) | 半導体装置用ボンディングワイヤおよびワイヤボンディング方法 | |
MX2009012573A (es) | Metodo para producir un dispositivo que comprende una antena transpondedora conectada a adaptadores de contacto y dispositivo que se obtiene. | |
TW200723443A (en) | Method of forming self-passivating interconnects and resulting devices | |
TW200504819A (en) | Room temperature metal direct bonding | |
EP1703558A3 (en) | Wiring board with embedded semiconductor chip, embedded reinforcing member and method of manufacturing the same | |
GB2441265A (en) | Method for manufacturing a circuit board structure, and a circuit board structure | |
US20110067908A1 (en) | Method for producing a printed circuit board and use and printed circuit board | |
MY152025A (en) | Ag-au-pd ternary alloy bonding wire | |
TW200603230A (en) | Circuit device and manufacturing method of the same | |
EP1903839A3 (en) | A method for producing a printed circuit board with a heat radiating structure and a printed circuit board with a heat radiating structure | |
TW200640325A (en) | Wiring board manufacturing method | |
EP2276063A3 (en) | Improvement of solder interconnect by addition of copper | |
TW200627584A (en) | Novel method for copper wafer wire bonding | |
TW200639992A (en) | Low cost lead-free preplated leadframe having improved adhesion and solderability | |
TW200616126A (en) | Methods of forming lead free solder bumps and related structures | |
TW200618251A (en) | A method of assembly and assembly thus made | |
TW200733332A (en) | Printed circuit board for semiconductor package and method of manufacturing the same | |
EP1443548A3 (en) | Composite metal column for mounting semiconductor device | |
DE502006009000D1 (de) | Ubm-pad, lötkontakt und verfahren zur herstellung einer lötverbindung | |
TW200516682A (en) | Pad structure of wiring board and its wiring board | |
EP1598908A3 (en) | Optical semiconductor device |