TW200537602A - Susceptor - Google Patents

Susceptor Download PDF

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Publication number
TW200537602A
TW200537602A TW094110103A TW94110103A TW200537602A TW 200537602 A TW200537602 A TW 200537602A TW 094110103 A TW094110103 A TW 094110103A TW 94110103 A TW94110103 A TW 94110103A TW 200537602 A TW200537602 A TW 200537602A
Authority
TW
Taiwan
Prior art keywords
sensor
inductor
barrel
type
planes
Prior art date
Application number
TW094110103A
Other languages
English (en)
Other versions
TWI376730B (zh
Inventor
Tunenobu Kimoto
Hiroyuki Matsunami
Hirokazu Fujiwara
Original Assignee
Toyo Tanso Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Tanso Co filed Critical Toyo Tanso Co
Publication of TW200537602A publication Critical patent/TW200537602A/zh
Application granted granted Critical
Publication of TWI376730B publication Critical patent/TWI376730B/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68785Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582Rigid and flat substrates, e.g. plates or discs
    • C23C16/4587Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially vertically
    • C23C16/4588Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially vertically the substrate being rotated
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/12Substrate holders or susceptors
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/06Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion material in the gaseous state
    • C30B31/14Substrate holders or susceptors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67103Apparatus for thermal treatment mainly by conduction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68771Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting more than one semiconductor substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Chemical Vapour Deposition (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

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200537602 (1) 九、發明說明 【發明所屬之技術領域】 本發明係,有關於將碳化矽、氮化鎵、氮化錫化合物 半導體,加以磊晶成長時所使用之感應器;特別係有關於 在複數的基板上可以各自得到均勻的嘉晶成長膜(以下簡 稱磊晶膜)之感應器。 Φ 【先前技術】 先前,半導體製造工程在晶圓上,係實施有使用化學 氣相成長法(c V D法),將原料氣體氣相反應,讓磊晶 層成長的單結晶製造方法。具體而言,CVD法係在感應 器上放置單結晶晶圓,將感應器與晶圓加熱並保持到磊晶 成長的溫度爲止。然後,將載體氣體及原料氣體的混合氣 體導入反應爐內,在高溫化下分解的原料氣體在晶圓上堆 積而形成磊晶層。對於能高速形成厚的磊晶層的反應爐, • 係經常使用使氣體上下流出的縱向之氣相成長裝置。(例 如、參考以下載專利文獻1、2 )。 專利文獻1 :日本特開平1 1 - 1 7675 7號公報 專利文獻2 :日本公開平5 - 8 7 1 2 8號公報 【發明內容】 發明所欲解決之課題 然而,先前之技術中,感應器之複數基板和與此等基 板對向的壁面間’距離有極大的差異,因此各基板間容易 -5- 200537602 (2) 產生溫度差。因此,基板間的磊晶膜成長的速度會有差異 ,使磊晶膜的厚度變的不同,而難以同時複數獲得同一品 質的磊晶膜。 因此,本發明的目的係提供一種用於半導體磊晶成長 ,可同時並複數得到均一性較高之磊晶膜的感應器。 用以解決課題之手段 # 本發明係被用在半導體磊晶成長的感應器;其特徵係 由在外側具有複數可自由裝置複數基板之面的桶型感應器 ;和其內部配置有上述桶型感應器,並具有分別對上述桶 型感應器的上述面各自以同方向傾斜配置之面的構件,所 構成。 依照上述的構成,將本發明之感應器用於半導體磊晶 成長工程時,係可使各基板的溫度保持一定,而同時複數 得到均一性較高的磊晶膜。 ® 本發明,係被用在半導體磊晶成長的感應器;其特徵 係由在內側具有複數可自由裝置複數基板之面的桶型感應 器;和其外周部配置有上述桶型感應器,並具有分別對上 述桶型感應器的上述面各自以同方向傾斜配置之面的構件 ,所構成。 依照上述的構成,將本發明之感應器用於半導體磊晶 成長的工程時,係可使各基板的溫度保持一定,而可以同 時複數得到均一性較高的磊晶膜。 本發明之感應器中,上述構件其上述感應器側的面, -6 - 200537602 (3) 係以可自由裝置複數基板者爲佳。 依照上述的構成,可同時得到更多均一性較高的磊晶 膜。 本發明之感應器中,上述桶型感應器或/以及上述部 材,係以加熱器者爲佳。 依照上述的構成,因直接使各基板之溫度成爲一定地 來加熱,故可同時複數獲得均一性更高之磊晶膜。 II 本發明的感應器,係以含有石墨之基材所構成爲佳。 又,本發明的感應器,係由多結晶的碳化矽及多結晶的碳 化鉅所覆蓋者爲佳。 進行使用高頻線圈之加熱方法的半導體磊晶成長時, 因感應器可以本身當成熱源,故可直接使各基板加熱到一 疋溫度。以此結果來ό兌’可更確貫的同時複數得到局均一* 性的嘉晶膜。又,以多結晶碳化砂或多結晶碳化鉬來覆蓋 ,可防止石墨所製造的感應器中雜質的釋放。特別以多結 • 晶碳化鉅覆蓋時,碳化鉅係對於高溫較有優越性的材料, 針對氫也有較好的耐蝕性’故可以防止覆蓋材的昇華或是 石墨之露出,也可以防止雜質的釋放。 【實施方式】 以下參考圖面,說明有關本發明的實施方式。 第1圖’係分別表示本發明第1實施方式之感應器之 構成物品的立體圖;(a )係桶型之內感應器,(b )係外 側構件。 200537602 (4) 第1圖所示的感應器1,係由以石墨爲基材 器2,及以石墨爲基材的外側部材3所構成。此 面,係以多結晶碳化矽或多結晶碳化鉅所覆蓋者 內感應器2,係將4塊具有2個凹狀之座孔 形平面(四塊梯形平面全爲相同面積),對垂直 度傾斜,將傾斜邊群相互結合構成,也就是成爲 器。 ® 外側構件3,係與內感應器2略爲類似的形 可將感應器2裝設配置在其內部者。又,將感應 在其內部時,各自對於內感應器2之具有座孔部 平面,係具有可平行或約略平行配置的梯形平面 塊梯形平面全爲相同面積)者。亦即,外側構件 平面,係各自相對於垂直的被傾斜特定角度者。 另外,內感應器2的梯形平面的傾斜角度, 於垂直方向的2〜4 5 °爲佳;,外側構件3的梯 ^ 傾斜角度,係以相對於垂直方向的2〜4 5。爲佳 以略平行來對向配置時,係以氣體入口側的流路 口側的流路較狹窄者爲佳。這是因爲,例如若內 的梯形平面的傾斜角度是相對於垂直的角度1 2。 構件3的梯形平面的傾斜角度爲相對於垂直的角 可達成。以這樣的構成方式,可以適度抑制氣體 且內感應器2與外側構件3間的平面間的距離 m m、理想上爲1 〇〜2 5 m m。 又座孔部4設置一個以上即可。更且,內感 的內感應 等之的表 爲佳。 部4的梯 以特定角 桶型感應 狀,而爲 器2裝置 4的梯形 4片(四 3的梯形 係以相對 形平面的 。在此, 較廣,出 感應器2 ,則外側 度8 °即 的加熱。 係 5〜6 0 應器2及 -8- 200537602 (5) 外側構件3的梯形平面的片數並不限定爲4片,各自爲3 片以上即可。 接下來,說明使用第一實施方式之感應器的磊晶成長 裝置。第2圖係表示第1圖的磊晶成長裝置的反應室附近 的槪略圖。 第2圖所示的磊晶成長裝置的反應室5的內部’係設 置有被配置於反應室5中心部之第1實施方式的感應器1 H ,及被配置於感應器1的外周部之隔熱材6。反應室5的 外周部,係設置有螺旋狀的高頻線圈7。 感應器1,係將第1圖(b )的外側部材的方向加以 上下反轉,以此覆蓋第1圖(a )之內感應器的配置構成 。另外,使內感應器2的梯形平面與外側構件3的梯形平 面,成平行或略平行地加以調整配置。 隔熱材6係爲了防止感應器1的放熱’而設置在反應 室5的內壁與感應器1的外周部之間。 ® 高頻線圈7,係將高頻波以石墨所構成的感應器1 ’ 而可使感應器1發熱者。 接下來參考第2圖,說明使用了第1實施方式的感應 器之磊晶成長。 首先,在感應器1的內感應器2中’裝置用以晶晶成 長的基板8。接下來,於第2圖的位置裝置內感應器2 ’ 使高頻線圈7運轉,將感應器加熱到磊晶成長的最適當的 溫度。然後使反應氣體,通過感應器1中內感應器2與外 側構件3之間。(參考第2圖的箭號) -9- 200537602 (6) 若依上述構成,因對半導體嘉晶成長工程使用第1實 施方式的感應器,故可使各基板溫度一定,也同時可複數 得到均一性高的磊晶膜。又,以多結晶碳化矽或多結晶碳 化鉅覆蓋,可防止由石墨所構成的感應器中雜質的釋放。 特別係以多結晶碳化鉬來覆蓋時,碳化鉅係高溫特性較好 的材料,且對於氫也具備優良耐蝕性,故可以防止覆蓋材 的昇華或是石墨的暴露,而可防止雜質的釋放。 Φ 另外,作爲本實施方式的變形例,亦可將內感應器2 或/及外側構件3作爲加熱器。 又,作爲感應器5內的配置之變形例,亦可如第3圖 所示,將第2圖的感應器1與隔熱材6加以上下翻轉的構 成亦可。此時,反應氣體之流動方向係從下往上的流向。 (參考第3圖的箭頭) 接下來,說明本發明之第2實施方式的感應器。 第4圖,係個別表示本發明第2實施方式的感應器之 ^ 各個構成物品的立體圖,(a )係內側構件,(b )係桶型 之外感應器。 第2圖所標示之感應器9,係由以石墨作爲基材的內 側構件1 〇,與以石墨作爲基材的外感應器1 1所構成。此 等的表面’係以多結晶碳化矽或係多結晶碳化鉅所覆蓋爲 佳。 外感應器1 1,係將具有座孔部1 2的梯形平面四片( 4片梯形平面全部面積相同)各自以相對於垂直的特定角 度傾斜,而將斜邊彼此相互結合所構成。 -10- 200537602 (7) 內側部材1 〇,係與外感應器l 1爲略相似的形狀,而 爲可配置在外感應器11的內部者。內側部材1 0裝置在內 部時,係分別對於外感應器1 1其具有座孔部1 2的梯形平 面,具有可各自以平行或略平的相對配置的梯形平面4片 (4片梯形平面全部面積相同)者。亦即內側構件1 〇之 梯形平面,係分別對垂直以特定方向傾斜者。 另外,內側構件1 〇的梯形平面其傾斜角度,係以相 B 對於垂直的2〜4 5 °爲佳;而外側構件1 1的梯形平面其傾 斜角度,係以相對於垂直的2〜4 5。爲佳。在此,以略平 行的對向配置時,係以氣體入口側的流路較廣,而出口側 的流路較狹窄者爲佳。這是因爲,例如將內感應器2的梯 形平面的傾斜角度,作爲相對於垂直的角度1 2。,則外側 構件3的梯形平面的傾斜角度,可由相對於垂直的角度8 °達成。以這樣的構成,可以適度抑制氣體的加熱。且內 感應器2與外側構件3間的平面間的距離係5〜60 mm, 而以10〜25mm爲佳。 又’座孔部1 2係設置個以上即可。更且,內感應器 2及外側構件3的梯形平面的片數並不限定爲4片,各自 爲3片以上即可。 本實施方式的感應器9,係可取代第2圖之磊晶成長 裝置的反應室5內之感應器1而適用。依此,可得到與第 1實施方式同樣的效果。又以本實施方式的變形例來說, 內側構件1 0或/及外感應器1 1也可作爲加熱器。 以桌1貫施方式及第2實施方式的變形例來說,亦可 -11 - 200537602 (8) 爲將第1圖的內感應器2與第2圖的外感應器11,作爲 已適用的感應器1 3之構成。此感應器1 3 ’係可以取代第 2圖中磊晶成長裝置的反應室5內的感應器1而適用。 又,以與重力相反方向裝置基板時’亦可使用針等使 其不會掉落而固定。 實施範例 • 取代第1圖的四面的桶型感應器1,以使用六面的桶 型感應器(不圖示)之桶型氣相反應裝置’表示其磊晶層 之形成的一個實施例。在此,說明以化合物半導體之一亦 即碳化矽的磊晶層形成。 在六面桶型感應器的內面設置各座孔中’分別放置直 徑2吋的單結晶碳化矽晶圓,而將感應器放置在特定的場 所。反應室內在以H2氣體轉換過後,進行真空吸引到達 5xlCT6 Torr。真空吸引後,將載體氣體亦即H2氣體從原 • 料氣體供給口(不圖示),而將惰性氣體亦即Ar氣體從 非活氣體供給口(不圖示)加以導入’將感應器內保持在 1 00 Tori*。H2氣體與Ar氣體從排氣口(不圖示)連續排 出,藉由被設置在在排氣口的下游之壓力閥’來控制反應 室內壓力。 對螺旋狀的高頻感應線圈7投入電力將感應器加熱’ 升溫達到1 3 5 0 °C爲止。此時爐內溫度,係藉由放射溫度 計來測定晶圓面上的溫度。溫度從1 3 5 0 °C以上開始’則 從供給口導入少量的原料氣體,抑制碳化矽晶圓的由& -12- 200537602 (9) 蝕刻所造成的傷害。在此情況下,使用SiH4與C3H8作爲 原料氣體。將感應器作爲加熱源或設置隔熱材的情況下, 不只加熱效率好而節省消耗電力,亦可由急速升溫來抑制 升溫中晶圓由氫蝕刻所造成的傷害。結果,可以得到高品 質的磊晶層。 更且,作爲磊晶層成長溫度,將感應器與晶圓加熱至 高溫的1 8 3 5 °C後,則使爐內保持一定溫度。以感應器當 Φ 作加熱源直接將晶圓加熱,或設置隔熱材,係可大幅增加 加熱效率,故在急速升溫,高溫下之磊晶成長係爲可能。 此時,將SiH4的流量增加爲120 seem,C3H8的流量增加 爲30 seem,供給摻雜氣體亦即N2氣體0.05 seem,而開 始磊晶層之形成。碳化矽磊晶層之形成條件,係成長溫度 爲 1835 °C,成長壓力爲 100 Tori*,C/Si 比爲 0.75,SiH4 /H2 比爲 〇·4 mol%、C3H8/H2 比爲 0.1 mol% ’ 成長時 間爲4小時。 Φ 此時的成長速度是3 3 // m/ h,而4小時的成長可形 成厚度約爲1 3 0 // m的磊晶層。厚的碳化矽磊晶層的表面 型悲爲鏡面,而可形成無表面大缺損、局品質的嘉晶層。 又,第6圖表示碳化矽磊晶層中,對於(a )氣體流的平 行方向與(b )直交方向其膜厚度及表面粗糙度的分佈。 若排除邊緣部,係可得σ / m爲2〜4 %的良好均一性。 這係因將感應器作爲加熱源使用或設置隔熱材,而使晶圓 溫度均一性的改善的效果。另外,第6圖中所謂RM S係 平均方根粗糙度,以下係相同。 -13- 200537602 (10) 依1 83 5°c的成長條件,調查Sitl4流量與 關係,係如第7圖,成長速度依S i Η 4流量的 而得到4 4 // m / h的高速成長。這是因將感應 源’故可將晶圓附近用以反應的原料氣體,有 所帶來的效果。即使在供給多量的SiH4的44 , 況下,亦可得〇 · 3 nm之平坦表面型態。此處 於1 0 X 1 0 // m2的範圍。 又’調查碳化矽磊晶層的摻雜密度分佈後 圖’對於氣體的流向,可進行平行方向與直交 X 1 014cm_3的高純度領域之摻雜控制。因爲感 的有效加熱或隔熱材的設置,使加熱效率大幅 低加熱的負擔並抑制感應器內璧的劣化的效果 摻雜密度的分佈可得2〜5 %的良好均一性。 感應器作爲加熱源直接對晶圓加熱,或隔熱材 使晶圓面內溫度的均一性提升的效果。 另外’本發明係在不超脫專利申請範圍的 計變更者,而非限制在上述實施型態與實施例| 【圖式簡單說明】 [第1圖]係分別表示本發明的第1實施方 其構成物品的立體圖。(a )係桶型內感應器, 側構件。 [第2圖]係表示使用第1圖之感應器的磊 其反應室附近的槪略圖。 成長速度的 比例增加, 器作爲加熱 效加熱分解 (/ m / h之情 RMS,係在 ,係如第8 方向同爲5 應器與晶圓 上升,而減 。又,針對 這是因爲以 的設置,而 範圔內可設 內者。 式之感應器 (b )係外 晶成長裝置 -14- 200537602 (11) [第3圖]係表示第2圖的變形例的圖。 [第4圖]係分別表示本發明的第2實施方式之感應器 的構成物品。(a )係內側構件,(b )係桶型的外感應器 〇 [第5圖]係第1圖的第1實施型態的感應器與第4圖 的第2實施方式的感應器之變形例的圖。 [第6圖]係表示本發明中的磊晶層的膜厚與表面粗糙 度的分佈關係線圖。(a )係對氣體流向之平行方向’ (b )係對氣體流向的垂直方向,表示其磊晶層的膜厚成長速 度與表面粗糙度分佈之關係關係的線圖。 [第7圖]本發明的實施範例中,表示磊晶層的膜厚成 長速度與表面的粗糙度,其與SiH4的流量相關性的線圖 〇 [第8圖]係表示本發明的實施範例其磊晶層的摻雜密 度分佈的線圖,(a )係對氣體流向之平行方向,(b )係 對氣體流向之垂直方向,表示其磊晶層的摻雜密度分佈之 線圖。 【主要元件符號說明】 1、9、13 感應器 2 內感應器 外側構件 座孔部 反應室 -15- 200537602 (12) 6 隔 熱 材 7 筒 頻 線 圈 8 基 板 10 內 側 構 件 11 外 感 應 器 12 座 孔 部

Claims (1)

  1. 200537602 (1) 十、申請專利範圍 1. 一種感應器’係被用在半導體磊晶成長的感應器 ;其特徵係由在外側具有複數可自由裝置複數基板之面的 桶型感應器;和其內部配置有上述桶型感應器,並具有分 別對上述桶型感應器的上述面各自以同方向傾斜配置之面 的構件,所構成。 2· —種感應益’係被用在半導體嘉晶成長的感應器 ;其特徵係由在內側具有複數可自由裝置複數基板之面的 桶型感應器;和其外周部配置有上述桶型感應器,並具有 分別對上述桶型感應器的上述面各自以同方向傾斜配置之 面的構件,所構成。 3 ·如申請專利範圍第1項或第2項所記載之感應器 ’其中’上述構件其上述感應器側的面,係可自由裝置複 數基板者。 4 ·如申請專利範圍第1項或第2項所記載之感應器 ’其中’上述桶型感應器或/以及上述部材,係加熱器者 〇 5 .如申請專利範圍第1項或第2項所記載之感應器 ,其中,係由含有石墨之基材所構成者。 6 .如申請專利範圍第5項所記載之感應器,其中, 係由多結晶碳化矽或多結晶碳化鉅所覆蓋者。 -17-
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