TW200523689A - A nitrous oxide stripping process for organosilicate glass - Google Patents

A nitrous oxide stripping process for organosilicate glass Download PDF

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Publication number
TW200523689A
TW200523689A TW093130026A TW93130026A TW200523689A TW 200523689 A TW200523689 A TW 200523689A TW 093130026 A TW093130026 A TW 093130026A TW 93130026 A TW93130026 A TW 93130026A TW 200523689 A TW200523689 A TW 200523689A
Authority
TW
Taiwan
Prior art keywords
layer
photoresist
organic
scope
patent application
Prior art date
Application number
TW093130026A
Other languages
English (en)
Chinese (zh)
Inventor
Rao Annapragada
Helen Zhu
Original Assignee
Lam Res Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Res Corp filed Critical Lam Res Corp
Publication of TW200523689A publication Critical patent/TW200523689A/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76808Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/42Stripping or agents therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • H01L21/31138Etching organic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76811Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving multiple stacked pre-patterned masks

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
TW093130026A 2003-10-08 2004-10-04 A nitrous oxide stripping process for organosilicate glass TW200523689A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/680,895 US7202177B2 (en) 2003-10-08 2003-10-08 Nitrous oxide stripping process for organosilicate glass

Publications (1)

Publication Number Publication Date
TW200523689A true TW200523689A (en) 2005-07-16

Family

ID=34422202

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093130026A TW200523689A (en) 2003-10-08 2004-10-04 A nitrous oxide stripping process for organosilicate glass

Country Status (7)

Country Link
US (1) US7202177B2 (enExample)
EP (1) EP1671363A4 (enExample)
JP (1) JP2007508698A (enExample)
KR (1) KR101197070B1 (enExample)
CN (1) CN100426469C (enExample)
TW (1) TW200523689A (enExample)
WO (1) WO2005038892A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050136681A1 (en) * 2003-12-23 2005-06-23 Tokyo Electron Limited Method and apparatus for removing photoresist from a substrate
KR100666881B1 (ko) * 2005-06-10 2007-01-10 삼성전자주식회사 포토레지스트 제거 방법 및 이를 이용한 반도체 소자의제조 방법.
JP5005702B2 (ja) * 2005-11-17 2012-08-22 エヌエックスピー ビー ヴィ 湿度センサー
US7932181B2 (en) * 2006-06-20 2011-04-26 Lam Research Corporation Edge gas injection for critical dimension uniformity improvement
US8283255B2 (en) * 2007-05-24 2012-10-09 Lam Research Corporation In-situ photoresist strip during plasma etching of active hard mask
US20110226280A1 (en) * 2008-11-21 2011-09-22 Axcelis Technologies, Inc. Plasma mediated ashing processes
US20100130017A1 (en) * 2008-11-21 2010-05-27 Axcelis Technologies, Inc. Front end of line plasma mediated ashing processes and apparatus
CN101996934B (zh) * 2009-08-20 2012-07-18 中芯国际集成电路制造(上海)有限公司 半导体器件的制作方法
JP6960839B2 (ja) * 2017-12-13 2021-11-05 東京エレクトロン株式会社 半導体装置の製造方法
CN115799028B (zh) * 2021-09-10 2025-12-05 长鑫存储技术有限公司 半导体结构的制备方法及半导体结构

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US111041A (en) * 1871-01-17 Improvement in hay-tedders
US5126231A (en) * 1990-02-26 1992-06-30 Applied Materials, Inc. Process for multi-layer photoresist etching with minimal feature undercut and unchanging photoresist load during etch
US5910453A (en) * 1996-01-16 1999-06-08 Advanced Micro Devices, Inc. Deep UV anti-reflection coating etch
US5970376A (en) * 1997-12-29 1999-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Post via etch plasma treatment method for forming with attenuated lateral etching a residue free via through a silsesquioxane spin-on-glass (SOG) dielectric layer
JP2000183040A (ja) * 1998-12-15 2000-06-30 Canon Inc 有機層間絶縁膜エッチング後のレジストアッシング方法
JP4221847B2 (ja) * 1999-10-25 2009-02-12 パナソニック電工株式会社 プラズマ処理装置及びプラズマ点灯方法
US6323121B1 (en) * 2000-05-12 2001-11-27 Taiwan Semiconductor Manufacturing Company Fully dry post-via-etch cleaning method for a damascene process
JP2002118087A (ja) * 2000-06-29 2002-04-19 Dms Co Ltd 紫外線照査装置
US6426304B1 (en) * 2000-06-30 2002-07-30 Lam Research Corporation Post etch photoresist strip with hydrogen for organosilicate glass low-κ etch applications
US6413877B1 (en) * 2000-12-22 2002-07-02 Lam Research Corporation Method of preventing damage to organo-silicate-glass materials during resist stripping
US6514860B1 (en) * 2001-01-31 2003-02-04 Advanced Micro Devices, Inc. Integration of organic fill for dual damascene process
US6777344B2 (en) 2001-02-12 2004-08-17 Lam Research Corporation Post-etch photoresist strip with O2 and NH3 for organosilicate glass low-K dielectric etch applications
US6566283B1 (en) * 2001-02-15 2003-05-20 Advanced Micro Devices, Inc. Silane treatment of low dielectric constant materials in semiconductor device manufacturing
US20020139771A1 (en) * 2001-02-22 2002-10-03 Ping Jiang Gas switching during an etch process to modulate the characteristics of the etch
US6617257B2 (en) * 2001-03-30 2003-09-09 Lam Research Corporation Method of plasma etching organic antireflective coating
KR100430472B1 (ko) * 2001-07-12 2004-05-10 삼성전자주식회사 듀얼 다마신 공정을 이용한 배선 형성 방법
US6498112B1 (en) * 2001-07-13 2002-12-24 Advanced Micro Devices, Inc. Graded oxide caps on low dielectric constant (low K) chemical vapor deposition (CVD) films
US6696222B2 (en) * 2001-07-24 2004-02-24 Silicon Integrated Systems Corp. Dual damascene process using metal hard mask
JP2003092349A (ja) * 2001-09-18 2003-03-28 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2003303880A (ja) * 2002-04-10 2003-10-24 Nec Corp 積層層間絶縁膜構造を利用した配線構造およびその製造方法
US7253112B2 (en) * 2002-06-04 2007-08-07 Taiwan Semiconductor Manufacturing Co., Ltd. Dual damascene process
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US6720256B1 (en) * 2002-12-04 2004-04-13 Taiwan Semiconductor Manufacturing Company Method of dual damascene patterning
US6916697B2 (en) * 2003-10-08 2005-07-12 Lam Research Corporation Etch back process using nitrous oxide

Also Published As

Publication number Publication date
KR101197070B1 (ko) 2012-11-06
US20050079710A1 (en) 2005-04-14
WO2005038892A1 (en) 2005-04-28
EP1671363A1 (en) 2006-06-21
CN1864249A (zh) 2006-11-15
CN100426469C (zh) 2008-10-15
US7202177B2 (en) 2007-04-10
EP1671363A4 (en) 2010-01-13
JP2007508698A (ja) 2007-04-05
KR20060107758A (ko) 2006-10-16

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