KR101197070B1 - 유기실리케이트 유리용 아산화질소 스트립 프로세스 - Google Patents

유기실리케이트 유리용 아산화질소 스트립 프로세스 Download PDF

Info

Publication number
KR101197070B1
KR101197070B1 KR1020067008588A KR20067008588A KR101197070B1 KR 101197070 B1 KR101197070 B1 KR 101197070B1 KR 1020067008588 A KR1020067008588 A KR 1020067008588A KR 20067008588 A KR20067008588 A KR 20067008588A KR 101197070 B1 KR101197070 B1 KR 101197070B1
Authority
KR
South Korea
Prior art keywords
layer
photoresist
osg
stripping
organic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020067008588A
Other languages
English (en)
Korean (ko)
Other versions
KR20060107758A (ko
Inventor
라오 아나프라가다
헬렌 주
Original Assignee
램 리써치 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 램 리써치 코포레이션 filed Critical 램 리써치 코포레이션
Publication of KR20060107758A publication Critical patent/KR20060107758A/ko
Application granted granted Critical
Publication of KR101197070B1 publication Critical patent/KR101197070B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76811—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving multiple stacked pre-patterned masks

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
KR1020067008588A 2003-10-08 2004-10-05 유기실리케이트 유리용 아산화질소 스트립 프로세스 Expired - Fee Related KR101197070B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/680,895 US7202177B2 (en) 2003-10-08 2003-10-08 Nitrous oxide stripping process for organosilicate glass
US10/680,895 2003-10-08
PCT/US2004/032793 WO2005038892A1 (en) 2003-10-08 2004-10-05 A nitrous oxide stripping process for organosilicate glass

Publications (2)

Publication Number Publication Date
KR20060107758A KR20060107758A (ko) 2006-10-16
KR101197070B1 true KR101197070B1 (ko) 2012-11-06

Family

ID=34422202

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020067008588A Expired - Fee Related KR101197070B1 (ko) 2003-10-08 2004-10-05 유기실리케이트 유리용 아산화질소 스트립 프로세스

Country Status (7)

Country Link
US (1) US7202177B2 (enExample)
EP (1) EP1671363A4 (enExample)
JP (1) JP2007508698A (enExample)
KR (1) KR101197070B1 (enExample)
CN (1) CN100426469C (enExample)
TW (1) TW200523689A (enExample)
WO (1) WO2005038892A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050136681A1 (en) * 2003-12-23 2005-06-23 Tokyo Electron Limited Method and apparatus for removing photoresist from a substrate
KR100666881B1 (ko) * 2005-06-10 2007-01-10 삼성전자주식회사 포토레지스트 제거 방법 및 이를 이용한 반도체 소자의제조 방법.
JP5005702B2 (ja) * 2005-11-17 2012-08-22 エヌエックスピー ビー ヴィ 湿度センサー
US7932181B2 (en) * 2006-06-20 2011-04-26 Lam Research Corporation Edge gas injection for critical dimension uniformity improvement
US8283255B2 (en) * 2007-05-24 2012-10-09 Lam Research Corporation In-situ photoresist strip during plasma etching of active hard mask
US20110226280A1 (en) * 2008-11-21 2011-09-22 Axcelis Technologies, Inc. Plasma mediated ashing processes
US20100130017A1 (en) * 2008-11-21 2010-05-27 Axcelis Technologies, Inc. Front end of line plasma mediated ashing processes and apparatus
CN101996934B (zh) * 2009-08-20 2012-07-18 中芯国际集成电路制造(上海)有限公司 半导体器件的制作方法
JP6960839B2 (ja) * 2017-12-13 2021-11-05 東京エレクトロン株式会社 半導体装置の製造方法
CN115799028B (zh) * 2021-09-10 2025-12-05 长鑫存储技术有限公司 半导体结构的制备方法及半导体结构

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US111041A (en) * 1871-01-17 Improvement in hay-tedders
US5126231A (en) * 1990-02-26 1992-06-30 Applied Materials, Inc. Process for multi-layer photoresist etching with minimal feature undercut and unchanging photoresist load during etch
US5910453A (en) * 1996-01-16 1999-06-08 Advanced Micro Devices, Inc. Deep UV anti-reflection coating etch
US5970376A (en) * 1997-12-29 1999-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Post via etch plasma treatment method for forming with attenuated lateral etching a residue free via through a silsesquioxane spin-on-glass (SOG) dielectric layer
JP2000183040A (ja) * 1998-12-15 2000-06-30 Canon Inc 有機層間絶縁膜エッチング後のレジストアッシング方法
JP4221847B2 (ja) * 1999-10-25 2009-02-12 パナソニック電工株式会社 プラズマ処理装置及びプラズマ点灯方法
US6323121B1 (en) * 2000-05-12 2001-11-27 Taiwan Semiconductor Manufacturing Company Fully dry post-via-etch cleaning method for a damascene process
JP2002118087A (ja) * 2000-06-29 2002-04-19 Dms Co Ltd 紫外線照査装置
US6426304B1 (en) * 2000-06-30 2002-07-30 Lam Research Corporation Post etch photoresist strip with hydrogen for organosilicate glass low-κ etch applications
US6413877B1 (en) * 2000-12-22 2002-07-02 Lam Research Corporation Method of preventing damage to organo-silicate-glass materials during resist stripping
US6514860B1 (en) * 2001-01-31 2003-02-04 Advanced Micro Devices, Inc. Integration of organic fill for dual damascene process
US6777344B2 (en) 2001-02-12 2004-08-17 Lam Research Corporation Post-etch photoresist strip with O2 and NH3 for organosilicate glass low-K dielectric etch applications
US6566283B1 (en) * 2001-02-15 2003-05-20 Advanced Micro Devices, Inc. Silane treatment of low dielectric constant materials in semiconductor device manufacturing
US20020139771A1 (en) * 2001-02-22 2002-10-03 Ping Jiang Gas switching during an etch process to modulate the characteristics of the etch
US6617257B2 (en) * 2001-03-30 2003-09-09 Lam Research Corporation Method of plasma etching organic antireflective coating
KR100430472B1 (ko) * 2001-07-12 2004-05-10 삼성전자주식회사 듀얼 다마신 공정을 이용한 배선 형성 방법
US6498112B1 (en) * 2001-07-13 2002-12-24 Advanced Micro Devices, Inc. Graded oxide caps on low dielectric constant (low K) chemical vapor deposition (CVD) films
US6696222B2 (en) * 2001-07-24 2004-02-24 Silicon Integrated Systems Corp. Dual damascene process using metal hard mask
JP2003092349A (ja) * 2001-09-18 2003-03-28 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2003303880A (ja) * 2002-04-10 2003-10-24 Nec Corp 積層層間絶縁膜構造を利用した配線構造およびその製造方法
US7253112B2 (en) * 2002-06-04 2007-08-07 Taiwan Semiconductor Manufacturing Co., Ltd. Dual damascene process
JP2004079901A (ja) * 2002-08-21 2004-03-11 Nec Electronics Corp 半導体装置及びその製造方法
US6720256B1 (en) * 2002-12-04 2004-04-13 Taiwan Semiconductor Manufacturing Company Method of dual damascene patterning
US6916697B2 (en) * 2003-10-08 2005-07-12 Lam Research Corporation Etch back process using nitrous oxide

Also Published As

Publication number Publication date
US20050079710A1 (en) 2005-04-14
WO2005038892A1 (en) 2005-04-28
EP1671363A1 (en) 2006-06-21
CN1864249A (zh) 2006-11-15
CN100426469C (zh) 2008-10-15
US7202177B2 (en) 2007-04-10
EP1671363A4 (en) 2010-01-13
TW200523689A (en) 2005-07-16
JP2007508698A (ja) 2007-04-05
KR20060107758A (ko) 2006-10-16

Similar Documents

Publication Publication Date Title
KR100849707B1 (ko) 탄소-도우핑된 저유전체들의 선택적 식각
KR100883291B1 (ko) 유기 반사 방지막 플라즈마 식각 방법
US6183655B1 (en) Tunable process for selectively etching oxide using fluoropropylene and a hydrofluorocarbon
KR100896160B1 (ko) 실리콘 카바이드 플라즈마 식각 방법
US6458516B1 (en) Method of etching dielectric layers using a removable hardmask
US6991739B2 (en) Method of photoresist removal in the presence of a dielectric layer having a low k-value
US7601246B2 (en) Methods of sputtering a protective coating on a semiconductor substrate
US6909195B2 (en) Trench etch process for low-k dielectrics
US7129171B2 (en) Selective oxygen-free etching process for barrier materials
TWI514516B (zh) 保護外露式低k表面的方法
US7534363B2 (en) Method for providing uniform removal of organic material
US6647994B1 (en) Method of resist stripping over low-k dielectric material
KR101197070B1 (ko) 유기실리케이트 유리용 아산화질소 스트립 프로세스
KR20060123144A (ko) 포토레지스트 스트립 동안의 배리어 재료의 손실 최소화
KR101276043B1 (ko) 아산화질소를 사용하는 에치백 프로세스
US6969685B1 (en) Etching a dielectric layer in an integrated circuit structure having a metal hard mask layer
US7192531B1 (en) In-situ plug fill
KR101068062B1 (ko) 도핑된 실리콘 카바이드에 대해 오르가노실리케이트유리를 선택적으로 에칭하는 방법

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20151008

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20171018

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20231030

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20231030