SG66452A1 - Metal-based semiconductor circuit substrates - Google Patents

Metal-based semiconductor circuit substrates

Info

Publication number
SG66452A1
SG66452A1 SG1998000720A SG1998000720A SG66452A1 SG 66452 A1 SG66452 A1 SG 66452A1 SG 1998000720 A SG1998000720 A SG 1998000720A SG 1998000720 A SG1998000720 A SG 1998000720A SG 66452 A1 SG66452 A1 SG 66452A1
Authority
SG
Singapore
Prior art keywords
metal
based semiconductor
semiconductor circuit
circuit substrates
substrates
Prior art date
Application number
SG1998000720A
Other languages
English (en)
Inventor
Moritsugu Morita
Hirofumi Tanaka
Kazuhito Fujita
Original Assignee
Mitsui Chemicals Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui Chemicals Inc filed Critical Mitsui Chemicals Inc
Publication of SG66452A1 publication Critical patent/SG66452A1/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/056Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01077Iridium [Ir]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01087Francium [Fr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Laminated Bodies (AREA)
SG1998000720A 1997-04-09 1998-04-08 Metal-based semiconductor circuit substrates SG66452A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9079497 1997-04-09
JP03765398A JP3982895B2 (ja) 1997-04-09 1998-02-19 金属ベース半導体回路基板

Publications (1)

Publication Number Publication Date
SG66452A1 true SG66452A1 (en) 1999-07-20

Family

ID=26376785

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1998000720A SG66452A1 (en) 1997-04-09 1998-04-08 Metal-based semiconductor circuit substrates

Country Status (6)

Country Link
US (1) US5990553A (ko)
EP (1) EP0871219A3 (ko)
JP (1) JP3982895B2 (ko)
KR (1) KR100306447B1 (ko)
SG (1) SG66452A1 (ko)
TW (1) TW419796B (ko)

Families Citing this family (29)

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US6495394B1 (en) 1999-02-16 2002-12-17 Sumitomo Metal (Smi) Electronics Devices Inc. Chip package and method for manufacturing the same
JP3097653B2 (ja) 1998-04-17 2000-10-10 日本電気株式会社 半導体装置用パッケージおよびその製造方法
JP2000261137A (ja) * 1999-03-12 2000-09-22 Nec Corp 電子部品接続状態検査装置及び電子部品接続状態検査方法
US6461745B2 (en) * 2000-04-25 2002-10-08 Nippon Denkai, Ltd. Copper foil for tape carrier and tab carrier tape and tab tape carrier using the copper foil
US6309912B1 (en) * 2000-06-20 2001-10-30 Motorola, Inc. Method of interconnecting an embedded integrated circuit
US6527162B2 (en) * 2000-08-04 2003-03-04 Denso Corporation Connecting method and connecting structure of printed circuit boards
US6274491B1 (en) * 2000-08-11 2001-08-14 Orient Semiconductor Electronics Limited Process of manufacturing thin ball grid array substrates
US20030059976A1 (en) * 2001-09-24 2003-03-27 Nathan Richard J. Integrated package and methods for making same
TW554500B (en) * 2002-07-09 2003-09-21 Via Tech Inc Flip-chip package structure and the processing method thereof
JP2004103700A (ja) 2002-09-06 2004-04-02 Toyota Industries Corp 低膨張部材及びその製造方法並びに低膨張部材を用いた半導体装置
KR20050089019A (ko) * 2002-12-03 2005-09-07 후루카와 덴키 고교 가부시키가이샤 전기전자부품용 금속재료
TWI377224B (en) * 2004-07-27 2012-11-21 Kaneka Corp Polyimide film having high adhesiveness and production method therefor
CN101027341B (zh) * 2004-09-24 2012-06-06 株式会社钟化 具有高粘接性的聚酰亚胺薄膜的制造方法
US7332801B2 (en) * 2004-09-30 2008-02-19 Intel Corporation Electronic device
KR101244589B1 (ko) * 2005-01-18 2013-03-25 가부시키가이샤 가네카 접착성이 개량된 신규 폴리이미드 필름
KR101045149B1 (ko) * 2005-08-04 2011-06-30 가부시키가이샤 가네카 금속 피복 폴리이미드 필름
DE102005043657B4 (de) * 2005-09-13 2011-12-15 Infineon Technologies Ag Chipmodul, Verfahren zur Verkapselung eines Chips und Verwendung eines Verkapselungsmaterials
US20080302564A1 (en) * 2007-06-11 2008-12-11 Ppg Industries Ohio, Inc. Circuit assembly including a metal core substrate and process for preparing the same
WO2009020467A1 (en) * 2007-08-07 2009-02-12 Skyworks Solutions, Inc. Near chip scale package integration process
US8148804B2 (en) * 2008-01-15 2012-04-03 Dai Nippon Printing Co., Ltd. Wiring device for semiconductor device, composite wiring device for semiconductor device, and resin-sealed semiconductor device
JP2009302212A (ja) 2008-06-11 2009-12-24 Fujitsu Microelectronics Ltd 半導体装置及びその製造方法
KR101444694B1 (ko) * 2009-05-25 2014-10-01 에스케이이노베이션 주식회사 연성금속박적층체 및 이의 제조방법
JP5313191B2 (ja) * 2010-02-26 2013-10-09 新日鉄住金化学株式会社 金属張積層板及びその製造方法
US8809690B2 (en) * 2010-03-04 2014-08-19 Rogers Corporation Dielectric bond plies for circuits and multilayer circuits, and methods of manufacture thereof
US8487426B2 (en) * 2011-03-15 2013-07-16 Advanced Semiconductor Engineering, Inc. Semiconductor package with embedded die and manufacturing methods thereof
JP6094044B2 (ja) * 2011-03-23 2017-03-15 大日本印刷株式会社 放熱基板およびそれを用いた素子
KR101330770B1 (ko) * 2011-11-16 2013-11-18 엘지이노텍 주식회사 백라이트 유닛용 절곡 인쇄회로기판
CN103167729B (zh) * 2013-02-25 2016-01-20 合肥京东方光电科技有限公司 柔性印刷电路板及显示装置
EP3528602A1 (en) * 2018-02-19 2019-08-21 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Thermoforming an electronic device with surface curvature

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JP2912526B2 (ja) * 1993-07-05 1999-06-28 三菱電機株式会社 半導体パワーモジュールおよび複合基板
JPH0883861A (ja) * 1994-07-12 1996-03-26 Nitto Denko Corp 半導体パッケージ被覆用金属箔材料および半導体装置
JPH08148608A (ja) * 1994-09-20 1996-06-07 Fujitsu Ltd 半導体装置及びその製造方法及び半導体装置用基板
JPH08172142A (ja) * 1994-12-16 1996-07-02 Nippon Micron Kk 半導体パッケージ及びその製造方法並びに半導体装置
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JP3396566B2 (ja) * 1995-10-25 2003-04-14 三菱電機株式会社 半導体装置

Also Published As

Publication number Publication date
KR100306447B1 (ko) 2002-03-08
US5990553A (en) 1999-11-23
KR19980081172A (ko) 1998-11-25
JP3982895B2 (ja) 2007-09-26
EP0871219A3 (en) 1999-08-11
JPH10340973A (ja) 1998-12-22
EP0871219A2 (en) 1998-10-14
TW419796B (en) 2001-01-21

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