GB2337648B - Electronic circuits - Google Patents

Electronic circuits

Info

Publication number
GB2337648B
GB2337648B GB9810770A GB9810770A GB2337648B GB 2337648 B GB2337648 B GB 2337648B GB 9810770 A GB9810770 A GB 9810770A GB 9810770 A GB9810770 A GB 9810770A GB 2337648 B GB2337648 B GB 2337648B
Authority
GB
United Kingdom
Prior art keywords
electronic circuits
circuits
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9810770A
Other versions
GB2337648A (en
GB9810770D0 (en
Inventor
Andrew Shelley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Original Assignee
LSI Logic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LSI Logic Corp filed Critical LSI Logic Corp
Priority to GB9810770A priority Critical patent/GB2337648B/en
Publication of GB9810770D0 publication Critical patent/GB9810770D0/en
Priority to US09/314,660 priority patent/US6446216B1/en
Publication of GB2337648A publication Critical patent/GB2337648A/en
Application granted granted Critical
Publication of GB2337648B publication Critical patent/GB2337648B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/506—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages
    • G06F7/508—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages using carry look-ahead circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Power Sources (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
GB9810770A 1998-05-19 1998-05-19 Electronic circuits Expired - Fee Related GB2337648B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB9810770A GB2337648B (en) 1998-05-19 1998-05-19 Electronic circuits
US09/314,660 US6446216B1 (en) 1998-05-19 1999-05-19 Electronic circuits having high/low power consumption modes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9810770A GB2337648B (en) 1998-05-19 1998-05-19 Electronic circuits

Publications (3)

Publication Number Publication Date
GB9810770D0 GB9810770D0 (en) 1998-07-15
GB2337648A GB2337648A (en) 1999-11-24
GB2337648B true GB2337648B (en) 2002-02-13

Family

ID=10832341

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9810770A Expired - Fee Related GB2337648B (en) 1998-05-19 1998-05-19 Electronic circuits

Country Status (2)

Country Link
US (1) US6446216B1 (en)
GB (1) GB2337648B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10338558B2 (en) 2014-10-17 2019-07-02 21, Inc. Sequential logic circuitry with reduced dynamic power consumption
US10409827B2 (en) * 2014-10-31 2019-09-10 21, Inc. Digital currency mining circuitry having shared processing logic

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5600267A (en) * 1994-06-24 1997-02-04 Cypress Semiconductor Corporation Apparatus for a programmable CML to CMOS translator for power/speed adjustment

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5675808A (en) * 1994-11-02 1997-10-07 Advanced Micro Devices, Inc. Power control of circuit modules within an integrated circuit
US5815693A (en) * 1995-12-15 1998-09-29 National Semiconductor Corporation Processor having a frequency modulated core clock based on the criticality of program activity
US6266780B1 (en) * 1998-12-23 2001-07-24 Agere Systems Guardian Corp. Glitchless clock switch

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5600267A (en) * 1994-06-24 1997-02-04 Cypress Semiconductor Corporation Apparatus for a programmable CML to CMOS translator for power/speed adjustment

Also Published As

Publication number Publication date
US6446216B1 (en) 2002-09-03
GB2337648A (en) 1999-11-24
GB9810770D0 (en) 1998-07-15

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20070519