SG166060A1 - Method of manufacturing soi substrate - Google Patents

Method of manufacturing soi substrate

Info

Publication number
SG166060A1
SG166060A1 SG201002398-4A SG2010023984A SG166060A1 SG 166060 A1 SG166060 A1 SG 166060A1 SG 2010023984 A SG2010023984 A SG 2010023984A SG 166060 A1 SG166060 A1 SG 166060A1
Authority
SG
Singapore
Prior art keywords
bond substrate
substrate
bond
soi substrate
embrittlement region
Prior art date
Application number
SG201002398-4A
Other languages
English (en)
Inventor
Kazuya Hanaoka
Hideki Tsuya
Masaharu Nagai
Original Assignee
Semiconductor Energy Lab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Lab filed Critical Semiconductor Energy Lab
Publication of SG166060A1 publication Critical patent/SG166060A1/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • H10P90/1916Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202Materials thereof
    • H10P14/3238Materials thereof being insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
SG201002398-4A 2009-04-22 2010-04-06 Method of manufacturing soi substrate SG166060A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009104203 2009-04-22

Publications (1)

Publication Number Publication Date
SG166060A1 true SG166060A1 (en) 2010-11-29

Family

ID=42992513

Family Applications (2)

Application Number Title Priority Date Filing Date
SG201002398-4A SG166060A1 (en) 2009-04-22 2010-04-06 Method of manufacturing soi substrate
SG2012056420A SG183670A1 (en) 2009-04-22 2010-04-06 Method of manufacturing soi substrate

Family Applications After (1)

Application Number Title Priority Date Filing Date
SG2012056420A SG183670A1 (en) 2009-04-22 2010-04-06 Method of manufacturing soi substrate

Country Status (5)

Country Link
US (2) US8168481B2 (https=)
JP (1) JP5721962B2 (https=)
KR (1) KR101752350B1 (https=)
CN (1) CN101872740B (https=)
SG (2) SG166060A1 (https=)

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US12434068B2 (en) 2017-05-23 2025-10-07 The Regents Of The University Of California Accessing spinal networks to address sexual dysfunction
DE20168827T1 (de) 2017-06-30 2021-01-21 Gtx Medical B.V. System zur neuromodulierung
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EP3840638A4 (en) 2018-08-23 2022-05-18 The Regents Of The University Of California NON-INVASIVE SPINAL CORD STIMULATION FOR NERVE ROOT PALSY, CAUDA SYNDROME AND RESTORATION OF FUNCTION OF THE UPPER EXTREMITIES
DE18205821T1 (de) 2018-11-13 2020-12-24 Gtx Medical B.V. Steuerungssystem zur bewegungsrekonstruktion und/oder wiederherstellung für einen patienten
EP3653260A1 (en) 2018-11-13 2020-05-20 GTX medical B.V. Sensor in clothing of limbs or footwear
EP3695878B1 (en) 2019-02-12 2023-04-19 ONWARD Medical N.V. A system for neuromodulation
EP3824948A1 (en) 2019-11-19 2021-05-26 ONWARD Medical B.V. A planning and/or control system for a neuromodulation system
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Also Published As

Publication number Publication date
US20120208348A1 (en) 2012-08-16
CN101872740A (zh) 2010-10-27
US20100273310A1 (en) 2010-10-28
SG183670A1 (en) 2012-09-27
KR20100116536A (ko) 2010-11-01
KR101752350B1 (ko) 2017-06-29
US8168481B2 (en) 2012-05-01
JP2010272851A (ja) 2010-12-02
JP5721962B2 (ja) 2015-05-20
US8486772B2 (en) 2013-07-16
CN101872740B (zh) 2014-05-07

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