SG11201807493WA - Ground reference scheme for a memory cell - Google Patents
Ground reference scheme for a memory cellInfo
- Publication number
- SG11201807493WA SG11201807493WA SG11201807493WA SG11201807493WA SG11201807493WA SG 11201807493W A SG11201807493W A SG 11201807493WA SG 11201807493W A SG11201807493W A SG 11201807493WA SG 11201807493W A SG11201807493W A SG 11201807493WA SG 11201807493W A SG11201807493W A SG 11201807493WA
- Authority
- SG
- Singapore
- Prior art keywords
- digit line
- boise
- memory cell
- international
- voltage
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2273—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/221—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements using ferroelectric capacitors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2297—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2293—Timing circuits or methods
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Medicinal Preparation (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/057,914 US9934837B2 (en) | 2016-03-01 | 2016-03-01 | Ground reference scheme for a memory cell |
| PCT/US2017/020251 WO2017151803A1 (fr) | 2016-03-01 | 2017-03-01 | Schéma de référence de masse pour cellule de mémoire |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG11201807493WA true SG11201807493WA (en) | 2018-09-27 |
Family
ID=59724273
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG11201807493WA SG11201807493WA (en) | 2016-03-01 | 2017-03-01 | Ground reference scheme for a memory cell |
Country Status (8)
| Country | Link |
|---|---|
| US (3) | US9934837B2 (fr) |
| EP (1) | EP3424052B1 (fr) |
| JP (1) | JP7022071B2 (fr) |
| KR (1) | KR102248175B1 (fr) |
| CN (1) | CN109074837B (fr) |
| SG (1) | SG11201807493WA (fr) |
| TW (2) | TWI673713B (fr) |
| WO (1) | WO2017151803A1 (fr) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9934837B2 (en) * | 2016-03-01 | 2018-04-03 | Micron Technology, Inc. | Ground reference scheme for a memory cell |
| US10056129B1 (en) | 2017-08-10 | 2018-08-21 | Micron Technology, Inc. | Cell bottom node reset in a memory array |
| US10725913B2 (en) | 2017-10-02 | 2020-07-28 | Micron Technology, Inc. | Variable modulation scheme for memory device access or operation |
| US10446198B2 (en) | 2017-10-02 | 2019-10-15 | Micron Technology, Inc. | Multiple concurrent modulation schemes in a memory system |
| US11403241B2 (en) | 2017-10-02 | 2022-08-02 | Micron Technology, Inc. | Communicating data with stacked memory dies |
| US10410721B2 (en) * | 2017-11-22 | 2019-09-10 | Micron Technology, Inc. | Pulsed integrator and memory techniques |
| US10446214B1 (en) * | 2018-08-13 | 2019-10-15 | Micron Technology, Inc. | Sense amplifier with split capacitors |
| US10902935B2 (en) * | 2018-08-13 | 2021-01-26 | Micron Technology, Inc. | Access schemes for access line faults in a memory device |
| US11360704B2 (en) | 2018-12-21 | 2022-06-14 | Micron Technology, Inc. | Multiplexed signal development in a memory device |
| US10692557B1 (en) * | 2019-04-11 | 2020-06-23 | Micron Technology, Inc. | Reference voltage management |
| US11056178B1 (en) * | 2020-07-20 | 2021-07-06 | Micron Technology, Inc. | Read operations based on a dynamic reference |
| US11749329B1 (en) * | 2022-05-20 | 2023-09-05 | Micron Technology, Inc. | Off-state word line voltage control for fixed plate voltage operation |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100256226B1 (ko) | 1997-06-26 | 2000-05-15 | 김영환 | 레퍼런스 전압 발생 장치 |
| US20050094457A1 (en) | 1999-06-10 | 2005-05-05 | Symetrix Corporation | Ferroelectric memory and method of operating same |
| JP2001319472A (ja) | 2000-05-10 | 2001-11-16 | Toshiba Corp | 半導体記憶装置 |
| JP4153780B2 (ja) | 2002-11-25 | 2008-09-24 | 富士通株式会社 | システムおよび強誘電体メモリのデータ読み出し方法 |
| WO2004093088A1 (fr) * | 2003-04-10 | 2004-10-28 | Fujitsu Limited | Memoire ferroelectrique et procede permettant de lire ses donnees |
| KR100568861B1 (ko) | 2003-12-15 | 2006-04-10 | 삼성전자주식회사 | 레퍼런스 전압 발생 회로를 갖는 강유전체 메모리 장치 |
| US7009864B2 (en) * | 2003-12-29 | 2006-03-07 | Texas Instruments Incorporated | Zero cancellation scheme to reduce plateline voltage in ferroelectric memory |
| JP4785180B2 (ja) * | 2004-09-10 | 2011-10-05 | 富士通セミコンダクター株式会社 | 強誘電体メモリ、多値データ記録方法、および多値データ読出し方法 |
| JP4638193B2 (ja) | 2004-09-24 | 2011-02-23 | パトレネラ キャピタル リミテッド， エルエルシー | メモリ |
| US8570812B2 (en) | 2011-08-23 | 2013-10-29 | Texas Instruments Incorporated | Method of reading a ferroelectric memory cell |
| US20140029326A1 (en) * | 2012-07-26 | 2014-01-30 | Texas Instruments Incorporated | Ferroelectric random access memory with a non-destructive read |
| US9934837B2 (en) * | 2016-03-01 | 2018-04-03 | Micron Technology, Inc. | Ground reference scheme for a memory cell |
-
2016
- 2016-03-01 US US15/057,914 patent/US9934837B2/en active Active
-
2017
- 2017-03-01 JP JP2018545414A patent/JP7022071B2/ja active Active
- 2017-03-01 EP EP17760740.5A patent/EP3424052B1/fr active Active
- 2017-03-01 CN CN201780024670.9A patent/CN109074837B/zh active Active
- 2017-03-01 TW TW107111426A patent/TWI673713B/zh active
- 2017-03-01 KR KR1020187027375A patent/KR102248175B1/ko active IP Right Grant
- 2017-03-01 WO PCT/US2017/020251 patent/WO2017151803A1/fr active Application Filing
- 2017-03-01 SG SG11201807493WA patent/SG11201807493WA/en unknown
- 2017-03-01 TW TW106106624A patent/TWI623935B/zh active
- 2017-12-27 US US15/855,326 patent/US10163482B2/en active Active
-
2018
- 2018-11-08 US US16/184,480 patent/US10978126B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| EP3424052B1 (fr) | 2021-09-15 |
| TW201735038A (zh) | 2017-10-01 |
| KR20180110682A (ko) | 2018-10-10 |
| US9934837B2 (en) | 2018-04-03 |
| TWI673713B (zh) | 2019-10-01 |
| CN109074837A (zh) | 2018-12-21 |
| EP3424052A1 (fr) | 2019-01-09 |
| CN109074837B (zh) | 2021-02-09 |
| WO2017151803A1 (fr) | 2017-09-08 |
| US20190130955A1 (en) | 2019-05-02 |
| US10978126B2 (en) | 2021-04-13 |
| KR102248175B1 (ko) | 2021-05-06 |
| JP7022071B2 (ja) | 2022-02-17 |
| US20170256300A1 (en) | 2017-09-07 |
| TWI623935B (zh) | 2018-05-11 |
| TW201824280A (zh) | 2018-07-01 |
| US20180190337A1 (en) | 2018-07-05 |
| EP3424052A4 (fr) | 2019-11-06 |
| US10163482B2 (en) | 2018-12-25 |
| JP2019513278A (ja) | 2019-05-23 |
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