SG10202006118SA - Memory device - Google Patents
Memory deviceInfo
- Publication number
- SG10202006118SA SG10202006118SA SG10202006118SA SG10202006118SA SG10202006118SA SG 10202006118S A SG10202006118S A SG 10202006118SA SG 10202006118S A SG10202006118S A SG 10202006118SA SG 10202006118S A SG10202006118S A SG 10202006118SA SG 10202006118S A SG10202006118S A SG 10202006118SA
- Authority
- SG
- Singapore
- Prior art keywords
- memory device
- memory
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020190125694A KR20210042759A (ko) | 2019-10-10 | 2019-10-10 | 메모리 장치 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG10202006118SA true SG10202006118SA (en) | 2021-05-28 |
Family
ID=75155992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG10202006118SA SG10202006118SA (en) | 2019-10-10 | 2020-06-25 | Memory device |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US11430808B2 (ko) |
| JP (1) | JP2021064778A (ko) |
| KR (1) | KR20210042759A (ko) |
| CN (1) | CN112652628A (ko) |
| DE (1) | DE102020111651B4 (ko) |
| SG (1) | SG10202006118SA (ko) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI844824B (zh) * | 2022-02-23 | 2024-06-11 | 旺宏電子股份有限公司 | 半導體結構與其製作方法 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102002802B1 (ko) | 2012-09-05 | 2019-07-23 | 삼성전자주식회사 | 반도체 장치 |
| KR102161814B1 (ko) * | 2013-11-19 | 2020-10-06 | 삼성전자주식회사 | 수직형 메모리 장치 및 그 제조 방법 |
| US10202910B2 (en) | 2014-07-07 | 2019-02-12 | Ford Global Technologies, Llc | System and method for selective cylinder deactivation |
| KR20160080365A (ko) | 2014-12-29 | 2016-07-08 | 에스케이하이닉스 주식회사 | 전자 장치 및 그 제조 방법 |
| KR20170011394A (ko) | 2015-07-22 | 2017-02-02 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조 방법 |
| US20170104000A1 (en) | 2015-10-13 | 2017-04-13 | Joo-Hee PARK | Vertical memory devices |
| KR20170119158A (ko) | 2016-04-18 | 2017-10-26 | 삼성전자주식회사 | 반도체 메모리 장치 및 반도체 장치 |
| KR102630954B1 (ko) | 2016-11-08 | 2024-01-31 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조방법 |
| KR20180106727A (ko) | 2017-03-21 | 2018-10-01 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조 방법 |
| US10685914B2 (en) | 2017-08-31 | 2020-06-16 | SK Hynix Inc. | Semiconductor device and manufacturing method thereof |
| KR102521282B1 (ko) | 2017-10-12 | 2023-04-14 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조방법 |
| KR102484394B1 (ko) | 2017-12-06 | 2023-01-03 | 삼성전자주식회사 | 반도체 장치 |
| US11342351B2 (en) | 2018-01-10 | 2022-05-24 | Samsung Electronics Co., Ltd. | Three-dimensional semiconductor device |
-
2019
- 2019-10-10 KR KR1020190125694A patent/KR20210042759A/ko active IP Right Grant
-
2020
- 2020-04-29 DE DE102020111651.9A patent/DE102020111651B4/de active Active
- 2020-06-08 US US16/895,364 patent/US11430808B2/en active Active
- 2020-06-25 SG SG10202006118SA patent/SG10202006118SA/en unknown
- 2020-08-11 CN CN202010802422.6A patent/CN112652628A/zh active Pending
- 2020-08-27 JP JP2020143873A patent/JP2021064778A/ja active Pending
-
2022
- 2022-08-01 US US17/878,304 patent/US20220367513A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE102020111651A1 (de) | 2021-04-15 |
| CN112652628A (zh) | 2021-04-13 |
| DE102020111651A9 (de) | 2021-06-10 |
| DE102020111651B4 (de) | 2024-10-17 |
| KR20210042759A (ko) | 2021-04-20 |
| JP2021064778A (ja) | 2021-04-22 |
| US20220367513A1 (en) | 2022-11-17 |
| US11430808B2 (en) | 2022-08-30 |
| US20210111188A1 (en) | 2021-04-15 |
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