SG10202003583UA - Semiconductor Memory Device - Google Patents

Semiconductor Memory Device

Info

Publication number
SG10202003583UA
SG10202003583UA SG10202003583UA SG10202003583UA SG10202003583UA SG 10202003583U A SG10202003583U A SG 10202003583UA SG 10202003583U A SG10202003583U A SG 10202003583UA SG 10202003583U A SG10202003583U A SG 10202003583UA SG 10202003583U A SG10202003583U A SG 10202003583UA
Authority
SG
Singapore
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Application number
SG10202003583UA
Inventor
Hae Min Lee
Shin Hwan Kang
Jee Hoon Han
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10202003583UA publication Critical patent/SG10202003583UA/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
SG10202003583UA 2019-07-29 2020-04-20 Semiconductor Memory Device SG10202003583UA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020190091409A KR20210013790A (en) 2019-07-29 2019-07-29 Semiconductor memory device

Publications (1)

Publication Number Publication Date
SG10202003583UA true SG10202003583UA (en) 2021-02-25

Family

ID=74165602

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10202003583UA SG10202003583UA (en) 2019-07-29 2020-04-20 Semiconductor Memory Device

Country Status (5)

Country Link
US (1) US11631692B2 (en)
KR (1) KR20210013790A (en)
CN (1) CN112382636A (en)
DE (1) DE102020109687A1 (en)
SG (1) SG10202003583UA (en)

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0714028B2 (en) 1987-11-27 1995-02-15 シャープ株式会社 Method for manufacturing three-dimensional semiconductor device
JP3179595B2 (en) 1992-11-12 2001-06-25 株式会社日立製作所 Semiconductor integrated circuit device and method of manufacturing the same
JP2755143B2 (en) 1993-12-24 1998-05-20 日本電気株式会社 Method for manufacturing semiconductor device
US6576505B2 (en) 1999-11-25 2003-06-10 Imec, Vzw Method for transferring and stacking of semiconductor devices
JP3910047B2 (en) * 2001-11-20 2007-04-25 松下電器産業株式会社 Semiconductor memory device
KR101434588B1 (en) 2008-06-11 2014-08-29 삼성전자주식회사 Semiconductor Device And Method Of Fabricating The Same
KR101502585B1 (en) 2008-10-09 2015-03-24 삼성전자주식회사 Vertical type semiconductor device and forming method of the same
JP5330017B2 (en) 2009-02-17 2013-10-30 株式会社東芝 Nonvolatile semiconductor memory device and manufacturing method thereof
KR102234799B1 (en) 2014-08-14 2021-04-02 삼성전자주식회사 Semiconductor device
KR102398666B1 (en) 2015-08-19 2022-05-16 삼성전자주식회사 Non volatile memory devices and non volatile memory system comprising thereof
US9679912B1 (en) 2015-12-03 2017-06-13 Kabushiki Kaisha Toshiba Semiconductor device
US9818693B2 (en) * 2015-12-22 2017-11-14 Sandisk Technologies Llc Through-memory-level via structures for a three-dimensional memory device
US10269620B2 (en) * 2016-02-16 2019-04-23 Sandisk Technologies Llc Multi-tier memory device with through-stack peripheral contact via structures and method of making thereof
KR102589301B1 (en) * 2016-04-29 2023-10-13 삼성전자주식회사 Non volatile memory devices
US10249640B2 (en) * 2016-06-08 2019-04-02 Sandisk Technologies Llc Within-array through-memory-level via structures and method of making thereof
EP3580783B1 (en) * 2017-03-08 2024-05-01 Yangtze Memory Technologies Co., Ltd. Through array contact structure of three-dimensional memory device
KR102442933B1 (en) * 2017-08-21 2022-09-15 삼성전자주식회사 Three-dimensional semiconductor device
KR102533145B1 (en) * 2017-12-01 2023-05-18 삼성전자주식회사 Three-dimensional semiconductor memory devices
KR102641737B1 (en) * 2018-06-21 2024-03-04 삼성전자주식회사 Three-dimensional semiconductor memory devices
KR20200055186A (en) * 2018-11-12 2020-05-21 삼성전자주식회사 Three-dimensional semiconductor memory device and method for fabricating the same
KR20200132136A (en) * 2019-05-15 2020-11-25 삼성전자주식회사 Three dimensional semiconductor memory device
KR20210078099A (en) * 2019-12-18 2021-06-28 삼성전자주식회사 Semiconductor memory device
CN111886696B (en) * 2020-06-12 2021-09-14 长江存储科技有限责任公司 Three-dimensional memory device with drain select gate cut and method of forming the same

Also Published As

Publication number Publication date
KR20210013790A (en) 2021-02-08
DE102020109687A1 (en) 2021-02-04
US20210036013A1 (en) 2021-02-04
CN112382636A (en) 2021-02-19
US11631692B2 (en) 2023-04-18

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