SG10202007886XA - Three-Dimensional Semiconductor Memory Device - Google Patents
Three-Dimensional Semiconductor Memory DeviceInfo
- Publication number
- SG10202007886XA SG10202007886XA SG10202007886XA SG10202007886XA SG10202007886XA SG 10202007886X A SG10202007886X A SG 10202007886XA SG 10202007886X A SG10202007886X A SG 10202007886XA SG 10202007886X A SG10202007886X A SG 10202007886XA SG 10202007886X A SG10202007886X A SG 10202007886XA
- Authority
- SG
- Singapore
- Prior art keywords
- memory device
- semiconductor memory
- dimensional semiconductor
- dimensional
- semiconductor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5283—Cross-sectional geometry
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
- H10B12/488—Word lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020190135889A KR20210052660A (en) | 2019-10-29 | 2019-10-29 | Three-dimensional Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10202007886XA true SG10202007886XA (en) | 2021-05-28 |
Family
ID=75378934
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10202007886XA SG10202007886XA (en) | 2019-10-29 | 2020-08-18 | Three-Dimensional Semiconductor Memory Device |
Country Status (5)
Country | Link |
---|---|
US (1) | US11502084B2 (en) |
KR (1) | KR20210052660A (en) |
CN (1) | CN112750829A (en) |
DE (1) | DE102020116751A1 (en) |
SG (1) | SG10202007886XA (en) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11239238B2 (en) | 2019-10-29 | 2022-02-01 | Intel Corporation | Thin film transistor based memory cells on both sides of a layer of logic devices |
US11257822B2 (en) * | 2019-11-21 | 2022-02-22 | Intel Corporation | Three-dimensional nanoribbon-based dynamic random-access memory |
US11469232B2 (en) * | 2021-02-09 | 2022-10-11 | Micron Technology, Inc. | Epitaxial silicon within horizontal access devices in vertical three dimensional (3D) memory |
KR20220122293A (en) * | 2021-02-26 | 2022-09-02 | 에스케이하이닉스 주식회사 | Semiconductor dedvice and method for fabricating the same |
KR20230038342A (en) * | 2021-09-10 | 2023-03-20 | 삼성전자주식회사 | Semiconductor memory device and manufacturing method of the same |
CN116997178A (en) * | 2022-04-24 | 2023-11-03 | 长鑫存储技术有限公司 | Semiconductor structure and forming method thereof |
CN116234306B (en) * | 2022-05-31 | 2024-02-20 | 北京超弦存储器研究院 | Field effect transistor, memory, preparation method of memory and electronic equipment |
CN117334722A (en) * | 2022-06-21 | 2024-01-02 | 长鑫存储技术有限公司 | Semiconductor device and method of forming the same |
CN115332255A (en) * | 2022-08-29 | 2022-11-11 | 长鑫存储技术有限公司 | Semiconductor structure, manufacturing method thereof and memory array structure |
CN116761423B (en) * | 2023-02-08 | 2024-03-01 | 北京超弦存储器研究院 | 3D stacked semiconductor device, manufacturing method thereof, 3D memory and electronic equipment |
CN116322041B (en) * | 2023-04-13 | 2023-11-24 | 北京超弦存储器研究院 | Memory, manufacturing method thereof and electronic equipment |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8564057B1 (en) * | 2007-01-09 | 2013-10-22 | Maxpower Semiconductor, Inc. | Power devices, structures, components, and methods using lateral drift, fixed net charge, and shield |
US11018133B2 (en) * | 2009-10-12 | 2021-05-25 | Monolithic 3D Inc. | 3D integrated circuit |
US10354995B2 (en) * | 2009-10-12 | 2019-07-16 | Monolithic 3D Inc. | Semiconductor memory device and structure |
US8890233B2 (en) | 2010-07-06 | 2014-11-18 | Macronix International Co., Ltd. | 3D memory array with improved SSL and BL contact layout |
US9281044B2 (en) | 2013-05-17 | 2016-03-08 | Micron Technology, Inc. | Apparatuses having a ferroelectric field-effect transistor memory array and related method |
US9230985B1 (en) * | 2014-10-15 | 2016-01-05 | Sandisk 3D Llc | Vertical TFT with tunnel barrier |
US9490017B2 (en) * | 2015-03-10 | 2016-11-08 | Macronix International Co., Ltd. | Forced-bias method in sub-block erase |
US9419003B1 (en) | 2015-05-15 | 2016-08-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices and methods of manufacture thereof |
US9653617B2 (en) * | 2015-05-27 | 2017-05-16 | Sandisk Technologies Llc | Multiple junction thin film transistor |
CN115942752A (en) | 2015-09-21 | 2023-04-07 | 莫诺利特斯3D有限公司 | 3D semiconductor device and structure |
US10121553B2 (en) | 2015-09-30 | 2018-11-06 | Sunrise Memory Corporation | Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays |
WO2018044456A1 (en) | 2016-08-31 | 2018-03-08 | Micron Technology, Inc. | Memory cells and memory arrays |
US10692874B2 (en) | 2017-06-20 | 2020-06-23 | Sunrise Memory Corporation | 3-dimensional NOR string arrays in segmented stacks |
EP3646379A4 (en) | 2017-06-29 | 2020-07-01 | Micron Technology, Inc. | Memory arrays comprising vertically-alternating tiers of insulative material and memory cells and methods of forming a memory array comprising memory cells individually comprising a transistor and a capacitor |
US10867675B2 (en) | 2017-07-13 | 2020-12-15 | Micron Technology, Inc. | Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells |
US10636796B2 (en) | 2017-08-02 | 2020-04-28 | Winbond Electronics Corp. | Dynamic random access memory and method of fabricating the same |
US10535659B2 (en) | 2017-09-29 | 2020-01-14 | Samsung Electronics Co., Ltd. | Semiconductor memory devices |
KR102524614B1 (en) | 2017-11-24 | 2023-04-24 | 삼성전자주식회사 | Semiconductor memory device |
KR102484394B1 (en) | 2017-12-06 | 2023-01-03 | 삼성전자주식회사 | Semiconductor devices |
US10468414B2 (en) * | 2017-12-28 | 2019-11-05 | Samsung Electronics Co., Ltd. | Semiconductor memory devices |
CN110660822A (en) * | 2018-06-29 | 2020-01-07 | 三星电子株式会社 | Variable resistance memory device |
KR102650525B1 (en) * | 2018-08-03 | 2024-03-25 | 삼성전자주식회사 | Semiconductor memory device |
KR20210002775A (en) | 2019-06-27 | 2021-01-11 | 삼성전자주식회사 | Semiconductor memory device |
-
2019
- 2019-10-29 KR KR1020190135889A patent/KR20210052660A/en active Search and Examination
-
2020
- 2020-06-25 DE DE102020116751.2A patent/DE102020116751A1/en active Pending
- 2020-08-06 US US16/986,367 patent/US11502084B2/en active Active
- 2020-08-11 CN CN202010801170.5A patent/CN112750829A/en active Pending
- 2020-08-18 SG SG10202007886XA patent/SG10202007886XA/en unknown
Also Published As
Publication number | Publication date |
---|---|
US11502084B2 (en) | 2022-11-15 |
US20210125989A1 (en) | 2021-04-29 |
CN112750829A (en) | 2021-05-04 |
KR20210052660A (en) | 2021-05-11 |
DE102020116751A1 (en) | 2021-04-29 |
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