SG10201404766WA - Semiconductor device and method of balancing surfaces of an embedded pcb unit with a dummy copper pattern - Google Patents

Semiconductor device and method of balancing surfaces of an embedded pcb unit with a dummy copper pattern

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Publication number
SG10201404766WA
SG10201404766WA SG10201404766WA SG10201404766WA SG10201404766WA SG 10201404766W A SG10201404766W A SG 10201404766WA SG 10201404766W A SG10201404766W A SG 10201404766WA SG 10201404766W A SG10201404766W A SG 10201404766WA SG 10201404766W A SG10201404766W A SG 10201404766WA
Authority
SG
Singapore
Prior art keywords
semiconductor device
copper pattern
pcb unit
embedded pcb
dummy copper
Prior art date
Application number
SG10201404766WA
Other languages
English (en)
Inventor
Yaojian Lin
Kang Chen
Hin Hwa Goh
Il Kwon Shim
Original Assignee
Stats Chippac Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stats Chippac Ltd filed Critical Stats Chippac Ltd
Publication of SG10201404766WA publication Critical patent/SG10201404766WA/en

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SG10201404766WA 2013-10-29 2014-08-08 Semiconductor device and method of balancing surfaces of an embedded pcb unit with a dummy copper pattern SG10201404766WA (en)

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CN109411410B (zh) 2023-09-26
US20160351419A1 (en) 2016-12-01
US20190109015A1 (en) 2019-04-11
US9449943B2 (en) 2016-09-20
CN104576517A (zh) 2015-04-29
US20150115465A1 (en) 2015-04-30
CN104576517B (zh) 2018-10-16
CN117080161A (zh) 2023-11-17
TWI608578B (zh) 2017-12-11
US10177010B2 (en) 2019-01-08
TW201517218A (zh) 2015-05-01
KR20150051304A (ko) 2015-05-12
CN109411410A (zh) 2019-03-01
KR101798702B1 (ko) 2017-11-16

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