SE452537B - Sett och apparat for kodning av ett n-bit-informationsord till ett m-bit-kodord, samt sett och apparat for avkodning - Google Patents

Sett och apparat for kodning av ett n-bit-informationsord till ett m-bit-kodord, samt sett och apparat for avkodning

Info

Publication number
SE452537B
SE452537B SE8007667A SE8007667A SE452537B SE 452537 B SE452537 B SE 452537B SE 8007667 A SE8007667 A SE 8007667A SE 8007667 A SE8007667 A SE 8007667A SE 452537 B SE452537 B SE 452537B
Authority
SE
Sweden
Prior art keywords
bit
disparity
codeword
word
bits
Prior art date
Application number
SE8007667A
Other languages
English (en)
Swedish (sv)
Other versions
SE8007667L (sv
Inventor
T Shimada
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of SE8007667L publication Critical patent/SE8007667L/
Publication of SE452537B publication Critical patent/SE452537B/sv

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Dc Digital Transmission (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Television Signal Processing For Recording (AREA)
SE8007667A 1979-11-02 1980-10-31 Sett och apparat for kodning av ett n-bit-informationsord till ett m-bit-kodord, samt sett och apparat for avkodning SE452537B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14225279A JPS5665314A (en) 1979-11-02 1979-11-02 Encoder for binary signal

Publications (2)

Publication Number Publication Date
SE8007667L SE8007667L (sv) 1981-06-18
SE452537B true SE452537B (sv) 1987-11-30

Family

ID=15310981

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8007667A SE452537B (sv) 1979-11-02 1980-10-31 Sett och apparat for kodning av ett n-bit-informationsord till ett m-bit-kodord, samt sett och apparat for avkodning

Country Status (15)

Country Link
US (1) US4499454A (nl)
JP (1) JPS5665314A (nl)
AT (1) AT399627B (nl)
AU (1) AU533027B2 (nl)
BR (1) BR8007071A (nl)
CA (1) CA1193015A (nl)
CH (1) CH638646A5 (nl)
DE (1) DE3039726A1 (nl)
FR (1) FR2469047B1 (nl)
GB (1) GB2066629B (nl)
IT (1) IT1188868B (nl)
NL (1) NL8005999A (nl)
SE (1) SE452537B (nl)
SU (1) SU1148572A3 (nl)
ZA (1) ZA806196B (nl)

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JPH0233221A (ja) * 1988-07-22 1990-02-02 Matsushita Electric Ind Co Ltd コード変換装置と復号装置
FR2664765B1 (fr) * 1990-07-11 2003-05-16 Bull Sa Dispositif de serialisation et de deserialisation de donnees et systeme de transmission numerique de donnees en serie en resultant.
NL9002070A (nl) * 1990-09-21 1992-04-16 Philips Nv Inrichting voor het optekenen van een digitaal informatiesignaal in een registratiedrager.
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DE69328642T2 (de) * 1992-02-19 2001-01-11 Mitsubishi Electric Corp Datenumsetzungsverfahren und Aufzeichnungs-/Wiedergabegerät zur Durchführung desselben
GB2267416B (en) * 1992-05-27 1995-09-20 Sony Broadcast & Communication Coding of digital signals
KR0141126B1 (ko) * 1992-08-31 1998-07-15 윤종용 디지탈 기록재생시스템에 있어서 코드변환제어장치 및 방법
US5805632A (en) * 1992-11-19 1998-09-08 Cirrus Logic, Inc. Bit rate doubler for serial data transmission or storage
US5341134A (en) * 1992-12-30 1994-08-23 Datatape Incorporated Simple coding scheme for DC free channel codes of form M/N, where M=N-1 and M and N are positive integers
JP3240341B2 (ja) * 1993-07-06 2001-12-17 三菱電機株式会社 情報変換方法及び記録再生装置
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US5450443A (en) * 1993-09-01 1995-09-12 International Business Machines Corporation Method and apparatus for constructing asymptotically optimal second order DC-free channel codes
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US6111528A (en) * 1995-06-07 2000-08-29 Emc Corporation Communications arrangements for network digital data processing system
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US6229462B1 (en) * 1999-03-30 2001-05-08 Intel Corporation Method and apparatus for reducing the disparity of set and clear bits on a serial line
KR100435215B1 (ko) * 1999-12-30 2004-06-09 삼성전자주식회사 버스 인코딩/디코딩 장치 및 그 방법
JP2004093462A (ja) * 2002-09-02 2004-03-25 Oki Electric Ind Co Ltd 半導体集積回路とその試験方法
US7190653B2 (en) * 2002-10-21 2007-03-13 Ricoh Company, Ltd. Data recording/reproducing device
US7199741B2 (en) * 2003-10-24 2007-04-03 Infineon Technologies Ag Method for digital/analog conversion and corresponding digital/analog converter device
US6914545B1 (en) * 2004-10-13 2005-07-05 Seiko Epson Corporation Circuitry and methods for reducing run-length of encoded data
US7158057B1 (en) 2005-09-07 2007-01-02 Seiko Epson Corporation Circuitry and methods for high speed data encoding
US8201071B2 (en) * 2006-11-15 2012-06-12 Qimonda Ag Information transmission and reception
US7786904B1 (en) * 2008-11-05 2010-08-31 Mingchih Hsieh Voltage level digital system
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US8116024B2 (en) * 2009-08-10 2012-02-14 Seagate Technology Llc Timing recovery detector

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Also Published As

Publication number Publication date
ATA536080A (de) 1994-10-15
CA1193015A (en) 1985-09-03
SU1148572A3 (ru) 1985-03-30
AU533027B2 (en) 1983-10-27
IT8025717A0 (it) 1980-10-31
SE8007667L (sv) 1981-06-18
JPS6367268B2 (nl) 1988-12-23
IT1188868B (it) 1988-01-28
DE3039726A1 (de) 1981-05-14
ZA806196B (en) 1981-09-30
NL8005999A (nl) 1981-06-01
JPS5665314A (en) 1981-06-03
FR2469047A1 (fr) 1981-05-08
US4499454A (en) 1985-02-12
DE3039726C2 (nl) 1987-05-14
BR8007071A (pt) 1981-05-05
AU6389980A (en) 1981-05-07
GB2066629A (en) 1981-07-08
GB2066629B (en) 1984-10-24
AT399627B (de) 1995-06-26
CH638646A5 (fr) 1983-09-30
FR2469047B1 (fr) 1986-03-28

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