NL8103541A - Inrichting met geintegreerde schakelingen en met een metalen verbindingsnetwerk, en een werkwijze voor het vervaardigen van deze inrichting. - Google Patents

Inrichting met geintegreerde schakelingen en met een metalen verbindingsnetwerk, en een werkwijze voor het vervaardigen van deze inrichting. Download PDF

Info

Publication number
NL8103541A
NL8103541A NL8103541A NL8103541A NL8103541A NL 8103541 A NL8103541 A NL 8103541A NL 8103541 A NL8103541 A NL 8103541A NL 8103541 A NL8103541 A NL 8103541A NL 8103541 A NL8103541 A NL 8103541A
Authority
NL
Netherlands
Prior art keywords
conductors
metal
supply
network
type
Prior art date
Application number
NL8103541A
Other languages
English (en)
Dutch (nl)
Original Assignee
Cii Honeywell Bull
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cii Honeywell Bull filed Critical Cii Honeywell Bull
Publication of NL8103541A publication Critical patent/NL8103541A/nl

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Layout of the interconnection structure
    • H01L23/5286Arrangements of power or ground buses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
NL8103541A 1980-12-05 1981-07-27 Inrichting met geintegreerde schakelingen en met een metalen verbindingsnetwerk, en een werkwijze voor het vervaardigen van deze inrichting. NL8103541A (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8025860 1980-12-05
FR8025860A FR2495835A1 (fr) 1980-12-05 1980-12-05 Dispositif a circuits integres a reseau metallique d'interconnexion, et procede de fabrication de ce dispositif

Publications (1)

Publication Number Publication Date
NL8103541A true NL8103541A (nl) 1982-07-01

Family

ID=9248719

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8103541A NL8103541A (nl) 1980-12-05 1981-07-27 Inrichting met geintegreerde schakelingen en met een metalen verbindingsnetwerk, en een werkwijze voor het vervaardigen van deze inrichting.

Country Status (6)

Country Link
JP (1) JPS57113259A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3147948A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR2495835A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB2089121B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
IT (1) IT1139897B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
NL (1) NL8103541A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594050A (ja) * 1982-06-30 1984-01-10 Fujitsu Ltd 半導体装置
JPH0290651A (ja) * 1988-09-28 1990-03-30 Nec Corp 半導体集積回路
GB2263018B (en) * 1991-03-23 1995-06-21 Sony Corp Static random access memories
GB2254487B (en) * 1991-03-23 1995-06-21 Sony Corp Full CMOS type static random access memories

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3312871A (en) * 1964-12-23 1967-04-04 Ibm Interconnection arrangement for integrated circuits
DE2165844C2 (de) * 1971-12-31 1983-02-17 Elena Vadimovna Moskva Chrenova Integrierte Schaltung
JPS50134385A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-04-09 1975-10-24
DE2822011C3 (de) * 1978-05-19 1987-09-10 Fujitsu Ltd., Kawasaki, Kanagawa Halbleiteranordnung und Verfahren zu deren Herstellung

Also Published As

Publication number Publication date
FR2495835B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1985-04-12
GB2089121B (en) 1985-02-27
DE3147948A1 (de) 1982-07-08
IT8125429A0 (it) 1981-12-03
FR2495835A1 (fr) 1982-06-11
GB2089121A (en) 1982-06-16
JPS57113259A (en) 1982-07-14
IT1139897B (it) 1986-09-24

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Legal Events

Date Code Title Description
A85 Still pending on 85-01-01
BA A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
BV The patent application has lapsed