MY8700639A - A dynamic random access memory - Google Patents

A dynamic random access memory

Info

Publication number
MY8700639A
MY8700639A MY639/87A MY8700639A MY8700639A MY 8700639 A MY8700639 A MY 8700639A MY 639/87 A MY639/87 A MY 639/87A MY 8700639 A MY8700639 A MY 8700639A MY 8700639 A MY8700639 A MY 8700639A
Authority
MY
Malaysia
Prior art keywords
random access
access memory
dynamic random
dynamic
memory
Prior art date
Application number
MY639/87A
Other languages
English (en)
Inventor
Kunihiko Ikuzaki
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of MY8700639A publication Critical patent/MY8700639A/xx

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
MY639/87A 1982-03-10 1987-12-30 A dynamic random access memory MY8700639A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57036422A JPS58155596A (ja) 1982-03-10 1982-03-10 ダイナミツク型ｍｏｓｒａｍ

Publications (1)

Publication Number Publication Date
MY8700639A true MY8700639A (en) 1987-12-31

Family

ID=12469383

Family Applications (1)

Application Number Title Priority Date Filing Date
MY639/87A MY8700639A (en) 1982-03-10 1987-12-30 A dynamic random access memory

Country Status (10)

Country Link
US (2) US4549284A (it)
JP (1) JPS58155596A (it)
KR (1) KR910002028B1 (it)
DE (1) DE3305501A1 (it)
FR (1) FR2523356A1 (it)
GB (1) GB2116338B (it)
HK (1) HK69387A (it)
IT (1) IT1160500B (it)
MY (1) MY8700639A (it)
SG (1) SG41587G (it)

Families Citing this family (45)

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JPS58155596A (ja) * 1982-03-10 1983-09-16 Hitachi Ltd ダイナミツク型ｍｏｓｒａｍ
JPS58192148A (ja) * 1982-05-07 1983-11-09 Hitachi Ltd 演算処理装置
US4639858A (en) * 1983-07-05 1987-01-27 Honeywell Information Systems Inc. Apparatus and method for testing and verifying the refresh logic of dynamic MOS memories
JPS6055593A (ja) * 1983-09-06 1985-03-30 Nec Corp 擬似スタティックメモリ
US4625296A (en) * 1984-01-17 1986-11-25 The Perkin-Elmer Corporation Memory refresh circuit with varying system transparency
JPS615495A (ja) * 1984-05-31 1986-01-11 Toshiba Corp 半導体記憶装置
JPS6199199A (ja) * 1984-09-28 1986-05-17 株式会社東芝 音声分析合成装置
JPS621187A (ja) * 1985-06-26 1987-01-07 Toshiba Corp ダイナミツクメモリのアクセス制御方式
JPS6212991A (ja) * 1985-07-10 1987-01-21 Fujitsu Ltd 半導体記憶装置
JPS62103898A (ja) * 1985-10-31 1987-05-14 Mitsubishi Electric Corp ダイナミツクランダムアクセスメモリ装置
JPH0612616B2 (ja) * 1986-08-13 1994-02-16 日本テキサス・インスツルメンツ株式会社 半導体記憶装置
JPS6355797A (ja) * 1986-08-27 1988-03-10 Fujitsu Ltd メモリ
JPS63140490A (ja) * 1986-12-03 1988-06-13 Sharp Corp ダイナミツクｒａｍ
US4924441A (en) * 1987-03-18 1990-05-08 Hayes Microcomputer Products, Inc. Method and apparatus for refreshing a dynamic memory
JPS63247997A (ja) * 1987-04-01 1988-10-14 Mitsubishi Electric Corp 半導体記憶装置
JPH0253293A (ja) * 1988-08-17 1990-02-22 Sharp Corp ダイナミックメモリ
JPH0253292A (ja) * 1988-08-17 1990-02-22 Sharp Corp ダイナミックメモリ
JP2617779B2 (ja) * 1988-08-31 1997-06-04 三菱電機株式会社 半導体メモリ装置
US4953131A (en) * 1988-09-07 1990-08-28 Unisys Corporation Unconditional clock and automatic refresh logic
JP2646032B2 (ja) * 1989-10-14 1997-08-25 三菱電機株式会社 Ｌｉｆｏ方式の半導体記憶装置およびその制御方法
US5033027A (en) * 1990-01-19 1991-07-16 Dallas Semiconductor Corporation Serial DRAM controller with multi generation interface
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US5148546A (en) * 1991-04-22 1992-09-15 Blodgett Greg A Method and system for minimizing power demands on portable computers and the like by refreshing selected dram cells
JP3143950B2 (ja) * 1991-04-30 2001-03-07 日本電気株式会社 ダイナミックメモリー
GB2265035B (en) * 1992-03-12 1995-11-22 Apple Computer Method and apparatus for improved dram refresh operations
US5430680A (en) * 1993-10-12 1995-07-04 United Memories, Inc. DRAM having self-timed burst refresh mode
KR970001699B1 (ko) * 1994-03-03 1997-02-13 삼성전자 주식회사 자동프리차아지기능을 가진 동기식 반도체메모리장치
USRE36532E (en) * 1995-03-02 2000-01-25 Samsung Electronics Co., Ltd. Synchronous semiconductor memory device having an auto-precharge function
US6028804A (en) * 1998-03-09 2000-02-22 Monolithic System Technology, Inc. Method and apparatus for 1-T SRAM compatible memory
US6072746A (en) 1998-08-14 2000-06-06 International Business Machines Corporation Self-timed address decoder for register file and compare circuit of a multi-port CAM
US6415353B1 (en) 1998-10-01 2002-07-02 Monolithic System Technology, Inc. Read/write buffers for complete hiding of the refresh of a semiconductor memory and method of operating same
US6504780B2 (en) 1998-10-01 2003-01-07 Monolithic System Technology, Inc. Method and apparatus for completely hiding refresh operations in a dram device using clock division
US6370073B2 (en) 1998-10-01 2002-04-09 Monlithic System Technology, Inc. Single-port multi-bank memory system having read and write buffers and method of operating same
US5999474A (en) 1998-10-01 1999-12-07 Monolithic System Tech Inc Method and apparatus for complete hiding of the refresh of a semiconductor memory
US6898140B2 (en) 1998-10-01 2005-05-24 Monolithic System Technology, Inc. Method and apparatus for temperature adaptive refresh in 1T-SRAM compatible memory using the subthreshold characteristics of MOSFET transistors
US6707743B2 (en) 1998-10-01 2004-03-16 Monolithic System Technology, Inc. Method and apparatus for completely hiding refresh operations in a DRAM device using multiple clock division
US6496437B2 (en) 1999-01-20 2002-12-17 Monolithic Systems Technology, Inc. Method and apparatus for forcing idle cycles to enable refresh operations in a semiconductor memory
US6529433B2 (en) 2001-04-03 2003-03-04 Hynix Semiconductor, Inc. Refresh mechanism in dynamic memories
KR100431303B1 (ko) 2002-06-28 2004-05-12 주식회사 하이닉스반도체 페이지 기록 모드를 수행할 수 있는 슈도 스태틱램
US6795364B1 (en) * 2003-02-28 2004-09-21 Monolithic System Technology, Inc. Method and apparatus for lengthening the data-retention time of a DRAM device in standby mode
US7113439B2 (en) * 2004-04-22 2006-09-26 Memocom Corp. Refresh methods for RAM cells featuring high speed access
US7433996B2 (en) * 2004-07-01 2008-10-07 Memocom Corp. System and method for refreshing random access memory cells
US7532532B2 (en) 2005-05-31 2009-05-12 Micron Technology, Inc. System and method for hidden-refresh rate modification
US7274618B2 (en) * 2005-06-24 2007-09-25 Monolithic System Technology, Inc. Word line driver for DRAM embedded in a logic process
US7369451B2 (en) * 2005-10-31 2008-05-06 Mosaid Technologies Incorporated Dynamic random access memory device and method for self-refreshing memory cells

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
HU169522B (it) * 1974-12-03 1976-12-28
US4084154A (en) * 1975-05-01 1978-04-11 Burroughs Corporation Charge coupled device memory system with burst mode
US4005395A (en) * 1975-05-08 1977-01-25 Sperry Rand Corporation Compatible standby power driver for a dynamic semiconductor
DE2543515A1 (de) * 1975-09-30 1977-04-07 Licentia Gmbh Verfahren zum regenerieren der speicherinhalte von speicherzellen in mos-speichern und mos-speicher zur durchfuehrung des verfahrens
US4079462A (en) * 1976-05-07 1978-03-14 Intel Corporation Refreshing apparatus for MOS dynamic RAMs
JPS5384534A (en) * 1976-12-29 1978-07-26 Fujitsu Ltd Refresh system for memory unit
JPS53148347A (en) * 1977-05-31 1978-12-23 Toshiba Corp Dynamic memory unit
US4238842A (en) * 1978-12-26 1980-12-09 Ibm Corporation LARAM Memory with reordered selection sequence for refresh
JPS55150192A (en) * 1979-05-08 1980-11-21 Nec Corp Memory unit
US4296480A (en) * 1979-08-13 1981-10-20 Mostek Corporation Refresh counter
DE3009872C2 (de) * 1980-03-14 1984-05-30 Siemens AG, 1000 Berlin und 8000 München Verfahren zum Regenerieren von in einem dynamischen MOS-Speicher gespeicherten Daten unter Berücksichtigung von Schreib- und Lesezyklen und Schaltungsanordnung zur Durchführung des Verfahrens
US4412314A (en) * 1980-06-02 1983-10-25 Mostek Corporation Semiconductor memory for use in conjunction with error detection and correction circuit
JPS58155596A (ja) * 1982-03-10 1983-09-16 Hitachi Ltd ダイナミツク型ｍｏｓｒａｍ

Also Published As

Publication number Publication date
HK69387A (en) 1987-10-02
KR910002028B1 (ko) 1991-03-30
FR2523356A1 (fr) 1983-09-16
IT1160500B (it) 1987-03-11
SG41587G (en) 1987-07-17
JPS58155596A (ja) 1983-09-16
US4549284A (en) 1985-10-22
GB2116338A (en) 1983-09-21
GB8301839D0 (en) 1983-02-23
GB2116338B (en) 1986-07-23
IT8319986A0 (it) 1983-03-09
KR840003893A (ko) 1984-10-04
US4636989A (en) 1987-01-13
DE3305501A1 (de) 1983-09-15

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