MY140213A - Adhesive sheet for producing semiconductor device, semiconductor device, and manufacturing method thereof - Google Patents

Adhesive sheet for producing semiconductor device, semiconductor device, and manufacturing method thereof

Info

Publication number
MY140213A
MY140213A MYPI20044574A MYPI20044574A MY140213A MY 140213 A MY140213 A MY 140213A MY PI20044574 A MYPI20044574 A MY PI20044574A MY PI20044574 A MYPI20044574 A MY PI20044574A MY 140213 A MY140213 A MY 140213A
Authority
MY
Malaysia
Prior art keywords
semiconductor device
manufacturing
adhesive sheet
producing
base material
Prior art date
Application number
MYPI20044574A
Other languages
English (en)
Inventor
Takeshi Satou
Akinori Sei
Nobuhiro Hashimoto
Original Assignee
Tomoegawa Paper Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tomoegawa Paper Co Ltd filed Critical Tomoegawa Paper Co Ltd
Publication of MY140213A publication Critical patent/MY140213A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Adhesive Tapes (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
MYPI20044574A 2003-11-07 2004-11-04 Adhesive sheet for producing semiconductor device, semiconductor device, and manufacturing method thereof MY140213A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003378118A JP4319892B2 (ja) 2003-11-07 2003-11-07 半導体装置製造用接着シート及び半導体装置の製造方法

Publications (1)

Publication Number Publication Date
MY140213A true MY140213A (en) 2009-11-30

Family

ID=34688606

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI20044574A MY140213A (en) 2003-11-07 2004-11-04 Adhesive sheet for producing semiconductor device, semiconductor device, and manufacturing method thereof

Country Status (6)

Country Link
JP (1) JP4319892B2 (ja)
KR (1) KR100618640B1 (ja)
CN (1) CN1300845C (ja)
MY (1) MY140213A (ja)
SG (1) SG150377A1 (ja)
TW (1) TWI249222B (ja)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100635053B1 (ko) 2005-06-21 2006-10-16 도레이새한 주식회사 전자부품용 접착테이프
JP4538398B2 (ja) * 2005-10-31 2010-09-08 株式会社巴川製紙所 半導体装置製造用接着シート及び半導体装置の製造方法
JP4505644B2 (ja) * 2006-02-17 2010-07-21 フジコピアン株式会社 固定シート
JP4505645B2 (ja) * 2006-02-17 2010-07-21 フジコピアン株式会社 固定シートの貼付方法
JP4505646B2 (ja) * 2006-02-20 2010-07-21 フジコピアン株式会社 固定シート
JP4505649B2 (ja) * 2006-03-23 2010-07-21 フジコピアン株式会社 固定シート
JP5067927B2 (ja) * 2007-03-27 2012-11-07 日東電工株式会社 半導体装置製造用接着フィルム
KR100910672B1 (ko) * 2007-08-03 2009-08-04 도레이새한 주식회사 내열성 점착시트
KR101073698B1 (ko) 2009-09-07 2011-10-14 도레이첨단소재 주식회사 점착테이프와 리드프레임의 라미네이션 방법
JP2011134851A (ja) * 2009-12-24 2011-07-07 Hitachi Chem Co Ltd 半導体装置、その製造法、半導体装置接続用配線基材、半導体装置搭載用配線板及びその製造法
JP2011134960A (ja) * 2009-12-25 2011-07-07 Hitachi Chem Co Ltd 半導体装置、その製造法、半導体素子接続用配線基材、半導体装置搭載配線板及びその製造法
KR20110087547A (ko) * 2010-01-26 2011-08-03 도레이첨단소재 주식회사 내열성 점착시트를 이용한 반도체 장치의 제조방법
CN102386107B (zh) * 2010-09-01 2015-04-01 群成科技股份有限公司 四边扁平无接脚封装方法
CN102386105B (zh) * 2010-09-01 2016-02-03 群成科技股份有限公司 四边扁平无接脚封装方法及其制成的结构
CN102386104B (zh) * 2010-09-01 2014-11-12 群成科技股份有限公司 四边扁平无接脚封装方法
TWI510155B (zh) * 2011-04-26 2015-11-21 Adl Engineering Inc 半導體封裝結構及其製造方法
JP5687230B2 (ja) * 2012-02-28 2015-03-18 信越化学工業株式会社 ウエハ加工体、ウエハ加工用部材、ウエハ加工用仮接着材、及び薄型ウエハの製造方法
JP5824402B2 (ja) * 2012-04-02 2015-11-25 株式会社巴川製紙所 半導体装置製造用マスクシート及びそれを用いた半導体装置の製造方法
JP5925560B2 (ja) * 2012-04-02 2016-05-25 株式会社巴川製紙所 半導体装置製造用マスクシート及びそれを用いた半導体装置の製造方法
KR101557841B1 (ko) 2012-12-07 2015-10-06 제일모직주식회사 이방 전도성 필름
JP6322026B2 (ja) * 2014-03-31 2018-05-09 日東電工株式会社 ダイボンドフィルム、ダイシングシート付きダイボンドフィルム、半導体装置、及び、半導体装置の製造方法
CN105720021B (zh) * 2016-01-25 2020-02-11 苏州日月新半导体有限公司 集成电路封装件及其制造方法
JP6956492B2 (ja) 2017-02-02 2021-11-02 株式会社巴川製紙所 半導体装置製造用接着シート及びそれを用いた半導体装置の製造方法
JP6443590B1 (ja) * 2017-02-28 2018-12-26 住友ベークライト株式会社 半導体基板加工用粘着テープおよび半導体装置の製造方法
JP6909171B2 (ja) 2018-02-12 2021-07-28 株式会社巴川製紙所 半導体装置製造用接着シート及びそれを用いた半導体装置の製造方法
JP7187906B2 (ja) * 2018-09-10 2022-12-13 昭和電工マテリアルズ株式会社 半導体装置の製造方法
JP7447647B2 (ja) * 2020-04-06 2024-03-12 株式会社レゾナック 半導体封止成形用仮保護フィルム及びその製造方法、仮保護フィルム付きリードフレーム、封止成形体、並びに、半導体パッケージを製造する方法
KR20220160680A (ko) 2020-05-26 2022-12-06 가부시키가이샤 도모에가와 세이시쇼 반도체 장치 제조용 접착 시트 및 그것을 이용한 반도체 장치의 제조 방법
WO2022176585A1 (ja) 2021-02-16 2022-08-25 株式会社巴川製紙所 半導体装置製造用接着シート及びそれを用いた半導体装置の製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002093830A (ja) * 2000-09-14 2002-03-29 Sony Corp チップ状電子部品の製造方法、及びその製造に用いる疑似ウェーハの製造方法
JP4173346B2 (ja) * 2001-12-14 2008-10-29 株式会社ルネサステクノロジ 半導体装置
TWI289155B (en) * 2002-04-03 2007-11-01 Tomoegawa Paper Co Ltd Adhesive sheet for producing semiconductor devices

Also Published As

Publication number Publication date
TWI249222B (en) 2006-02-11
JP2005142401A (ja) 2005-06-02
TW200522252A (en) 2005-07-01
KR100618640B1 (ko) 2006-09-06
JP4319892B2 (ja) 2009-08-26
SG150377A1 (en) 2009-03-30
KR20050044259A (ko) 2005-05-12
CN1300845C (zh) 2007-02-14
CN1617332A (zh) 2005-05-18

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