MX9206693A - Memoria de acceso multiple en serie para utilizarse en sistemas de retroalimentacion, tal como television de movimiento compensado - Google Patents

Memoria de acceso multiple en serie para utilizarse en sistemas de retroalimentacion, tal como television de movimiento compensado

Info

Publication number
MX9206693A
MX9206693A MX9206693A MX9206693A MX9206693A MX 9206693 A MX9206693 A MX 9206693A MX 9206693 A MX9206693 A MX 9206693A MX 9206693 A MX9206693 A MX 9206693A MX 9206693 A MX9206693 A MX 9206693A
Authority
MX
Mexico
Prior art keywords
data
output
array
serial
shift register
Prior art date
Application number
MX9206693A
Other languages
English (en)
Spanish (es)
Inventor
Paul Shen
Woo H Paik
Edward A Krause
Original Assignee
Gen Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Instrument Corp filed Critical Gen Instrument Corp
Publication of MX9206693A publication Critical patent/MX9206693A/es

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1036—Read-write modes for single port memories, i.e. having either a random port or a serial port using data shift registers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/43—Hardware specially adapted for motion estimation or compensation
    • H04N19/433—Hardware specially adapted for motion estimation or compensation characterised by techniques for memory access
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
    • H04N19/51—Motion estimation or motion compensation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Image Input (AREA)
  • Dram (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Information Transfer Systems (AREA)
  • Nitrogen Condensed Heterocyclic Rings (AREA)
  • Other In-Based Heterocyclic Compounds (AREA)
  • Hydrogenated Pyridines (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Television Signal Processing For Recording (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
MX9206693A 1991-11-19 1992-11-19 Memoria de acceso multiple en serie para utilizarse en sistemas de retroalimentacion, tal como television de movimiento compensado MX9206693A (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/791,369 US5315388A (en) 1991-11-19 1991-11-19 Multiple serial access memory for use in feedback systems such as motion compensated television

Publications (1)

Publication Number Publication Date
MX9206693A true MX9206693A (es) 1993-05-01

Family

ID=25153524

Family Applications (1)

Application Number Title Priority Date Filing Date
MX9206693A MX9206693A (es) 1991-11-19 1992-11-19 Memoria de acceso multiple en serie para utilizarse en sistemas de retroalimentacion, tal como television de movimiento compensado

Country Status (11)

Country Link
US (1) US5315388A (enExample)
EP (2) EP0543197B1 (enExample)
JP (1) JP3194500B2 (enExample)
KR (1) KR970000604B1 (enExample)
AT (2) ATE174449T1 (enExample)
AU (1) AU661637B2 (enExample)
CA (1) CA2082133C (enExample)
DE (2) DE69227821T2 (enExample)
MX (1) MX9206693A (enExample)
NO (1) NO302679B1 (enExample)
TW (1) TW225081B (enExample)

Families Citing this family (73)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6067379A (en) * 1988-12-09 2000-05-23 Cognex Corporation Method and apparatus for locating patterns in an optical image
KR0122741B1 (ko) * 1992-09-23 1997-11-17 배순훈 병렬 구조를 갖는 기억 장치
JPH06189292A (ja) * 1992-12-15 1994-07-08 Sony Corp 動画像復号装置
JP3381077B2 (ja) * 1992-12-04 2003-02-24 ソニー株式会社 動画像復号装置
US7558324B2 (en) 1993-01-18 2009-07-07 Sony Corporation Apparatus for encoding and decoding header data in picture signal transmission
US7075991B1 (en) 1993-01-18 2006-07-11 Sony Corporation Apparatus for encoding and decoding header data in picture signal transmission
US5448310A (en) * 1993-04-27 1995-09-05 Array Microsystems, Inc. Motion estimation coprocessor
US5526050A (en) * 1994-03-31 1996-06-11 Cognex Corporation Methods and apparatus for concurrently acquiring video data from multiple video data sources
FR2719398B1 (fr) * 1994-04-27 1996-07-19 Sgs Thomson Microelectronics Dispositif et procédé d'adressage d'une mémoire cache d'un circuit de compression d'images mobiles.
TW245871B (en) * 1994-08-15 1995-04-21 Gen Instrument Corp Method and apparatus for efficient addressing of dram in a video decompression processor
US5596376A (en) * 1995-02-16 1997-01-21 C-Cube Microsystems, Inc. Structure and method for a multistandard video encoder including an addressing scheme supporting two banks of memory
US5585863A (en) * 1995-04-07 1996-12-17 Eastman Kodak Company Memory organizing and addressing method for digital video images
JP2956527B2 (ja) * 1995-04-28 1999-10-04 松下電器産業株式会社 画像メモリ機能付き映像装置
US6806916B1 (en) 1995-04-28 2004-10-19 Matsushita Electric Industrial Co., Ltd. Video apparatus with image memory function
US6026176A (en) * 1995-07-25 2000-02-15 Cognex Corporation Machine vision methods and articles of manufacture for ball grid array inspection
US5809538A (en) * 1996-02-07 1998-09-15 General Instrument Corporation DRAM arbiter for video decoder
US5805931A (en) * 1996-02-09 1998-09-08 Micron Technology, Inc. Programmable bandwidth I/O port and a communication interface using the same port having a plurality of serial access memories capable of being configured for a variety of protocols
US5872870A (en) * 1996-02-16 1999-02-16 Cognex Corporation Machine vision methods for identifying extrema of objects in rotated reference frames
US5909504A (en) * 1996-03-15 1999-06-01 Cognex Corporation Method of testing a machine vision inspection system
US6298149B1 (en) 1996-03-21 2001-10-02 Cognex Corporation Semiconductor device image inspection with contrast enhancement
US6259827B1 (en) 1996-03-21 2001-07-10 Cognex Corporation Machine vision methods for enhancing the contrast between an object and its background using multiple on-axis images
US5978502A (en) * 1996-04-01 1999-11-02 Cognex Corporation Machine vision methods for determining characteristics of three-dimensional objects
US5719642A (en) * 1996-05-07 1998-02-17 National Science Council Of R.O.C. Full-search block matching motion estimation processor
US6137893A (en) * 1996-10-07 2000-10-24 Cognex Corporation Machine vision calibration targets and methods of determining their location and orientation in an image
US5960125A (en) 1996-11-21 1999-09-28 Cognex Corporation Nonfeedback-based machine vision method for determining a calibration relationship between a camera and a moveable object
US5784108A (en) * 1996-12-03 1998-07-21 Zapex Technologies (Israel) Ltd. Apparatus for and method of reducing the memory bandwidth requirements of a systolic array
US5953130A (en) * 1997-01-06 1999-09-14 Cognex Corporation Machine vision methods and apparatus for machine vision illumination of an object
US6912680B1 (en) 1997-02-11 2005-06-28 Micron Technology, Inc. Memory system with dynamic timing correction
US5940608A (en) 1997-02-11 1999-08-17 Micron Technology, Inc. Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal
US5946244A (en) 1997-03-05 1999-08-31 Micron Technology, Inc. Delay-locked loop with binary-coupled capacitor
US6075881A (en) 1997-03-18 2000-06-13 Cognex Corporation Machine vision methods for identifying collinear sets of points from an image
US5974169A (en) * 1997-03-20 1999-10-26 Cognex Corporation Machine vision methods for determining characteristics of an object using boundary points and bounding regions
US6141033A (en) * 1997-05-15 2000-10-31 Cognex Corporation Bandwidth reduction of multichannel images for machine vision
US6173432B1 (en) * 1997-06-20 2001-01-09 Micron Technology, Inc. Method and apparatus for generating a sequence of clock signals
US6608647B1 (en) 1997-06-24 2003-08-19 Cognex Corporation Methods and apparatus for charge coupled device image acquisition with independent integration and readout
US6101197A (en) 1997-09-18 2000-08-08 Micron Technology, Inc. Method and apparatus for adjusting the timing of signals over fine and coarse ranges
US5978080A (en) * 1997-09-25 1999-11-02 Cognex Corporation Machine vision methods using feedback to determine an orientation, pixel width and pixel height of a field of view
US6208772B1 (en) 1997-10-17 2001-03-27 Acuity Imaging, Llc Data processing system for logically adjacent data samples such as image data in a machine vision system
US6157751A (en) * 1997-12-30 2000-12-05 Cognex Corporation Method and apparatus for interleaving a parallel image processing memory
US6307588B1 (en) 1997-12-30 2001-10-23 Cognex Corporation Method and apparatus for address expansion in a parallel image processing memory
US6025854A (en) * 1997-12-31 2000-02-15 Cognex Corporation Method and apparatus for high speed image acquisition
US5982395A (en) * 1997-12-31 1999-11-09 Cognex Corporation Method and apparatus for parallel addressing of an image processing memory
US6282328B1 (en) 1998-01-28 2001-08-28 Cognex Corporation Machine vision systems and methods for morphological transformation of an image with non-uniform offsets
US6236769B1 (en) 1998-01-28 2001-05-22 Cognex Corporation Machine vision systems and methods for morphological transformation of an image with zero or other uniform offsets
US6381375B1 (en) 1998-02-20 2002-04-30 Cognex Corporation Methods and apparatus for generating a projection of an image
US6215915B1 (en) 1998-02-20 2001-04-10 Cognex Corporation Image processing methods and apparatus for separable, general affine transformation of an image
US6269451B1 (en) 1998-02-27 2001-07-31 Micron Technology, Inc. Method and apparatus for adjusting data timing by delaying clock signal
FR2782878B1 (fr) * 1998-08-28 2000-11-10 Holding Bev Sa Systeme de compression et de decompression de signaux video numeriques
US6338127B1 (en) 1998-08-28 2002-01-08 Micron Technology, Inc. Method and apparatus for resynchronizing a plurality of clock signals used to latch respective digital signals, and memory device using same
US6349399B1 (en) * 1998-09-03 2002-02-19 Micron Technology, Inc. Method and apparatus for generating expect data from a captured bit pattern, and memory device using same
US6279090B1 (en) 1998-09-03 2001-08-21 Micron Technology, Inc. Method and apparatus for resynchronizing a plurality of clock signals used in latching respective digital signals applied to a packetized memory device
US6430696B1 (en) 1998-11-30 2002-08-06 Micron Technology, Inc. Method and apparatus for high speed data capture utilizing bit-to-bit timing correction, and memory device using same
US6374360B1 (en) 1998-12-11 2002-04-16 Micron Technology, Inc. Method and apparatus for bit-to-bit timing correction of a high speed memory bus
US6687402B1 (en) 1998-12-18 2004-02-03 Cognex Corporation Machine vision methods and systems for boundary feature comparison of patterns and images
US6381366B1 (en) 1998-12-18 2002-04-30 Cognex Corporation Machine vision methods and system for boundary point-based comparison of patterns and images
US6377713B1 (en) 1999-01-27 2002-04-23 General Instrument Corporation Synchronous DRAM bandwidth optimization for display downsizing of an MPEG-2 image
US6470060B1 (en) 1999-03-01 2002-10-22 Micron Technology, Inc. Method and apparatus for generating a phase dependent control signal
JP2000358193A (ja) * 1999-06-15 2000-12-26 Matsushita Electric Ind Co Ltd 画像メモリ機能付き映像装置
US6684402B1 (en) 1999-12-01 2004-01-27 Cognex Technology And Investment Corporation Control methods and apparatus for coupling multiple image acquisition devices to a digital data processor
US6748104B1 (en) 2000-03-24 2004-06-08 Cognex Corporation Methods and apparatus for machine vision inspection using single and multiple templates or patterns
US7006669B1 (en) 2000-12-31 2006-02-28 Cognex Corporation Machine vision method and apparatus for thresholding images of non-uniform materials
US6801989B2 (en) * 2001-06-28 2004-10-05 Micron Technology, Inc. Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
US7072395B2 (en) * 2001-07-20 2006-07-04 Ess Technology, Inc. Memory control apparatus and efficient search pattern for block-matching motion estimation
US7168027B2 (en) 2003-06-12 2007-01-23 Micron Technology, Inc. Dynamic synchronization of data capture on an optical or other high speed communications link
US7234070B2 (en) 2003-10-27 2007-06-19 Micron Technology, Inc. System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding
CN101924945B (zh) * 2004-03-08 2012-07-18 三叉微系统(远东)有限公司 具有可变压缩比和用于存储及检索参考帧数据的缓冲器的视频解码器
US7639861B2 (en) 2005-09-14 2009-12-29 Cognex Technology And Investment Corporation Method and apparatus for backlighting a wafer during alignment
US8111904B2 (en) 2005-10-07 2012-02-07 Cognex Technology And Investment Corp. Methods and apparatus for practical 3D vision system
JP4987364B2 (ja) * 2006-06-23 2012-07-25 株式会社東芝 ラインメモリ実装装置とテレビジョン受信装置
US8162584B2 (en) 2006-08-23 2012-04-24 Cognex Corporation Method and apparatus for semiconductor wafer alignment
JP4911223B2 (ja) * 2007-06-06 2012-04-04 富士通株式会社 中継装置および端末装置
JP2008304763A (ja) * 2007-06-08 2008-12-18 Hitachi Displays Ltd 表示装置
US9544587B2 (en) 2012-05-14 2017-01-10 Google Technology Holdings LLC Scalable video coding with enhanced base layer

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3996559A (en) * 1974-11-07 1976-12-07 International Business Machines Corporation Method and apparatus for accessing horizontal sequences, vertical sequences and regularly spaced rectangular subarrays from an array stored in a modified word organized random access memory system
GB1568378A (en) * 1976-01-30 1980-05-29 Micro Consultants Ltd Video processing system
JPS592227B2 (ja) * 1978-08-21 1984-01-17 株式会社日立製作所 雑音除去方式
US4275418A (en) * 1978-09-14 1981-06-23 Micro Consultants Limited Video noise reduction systems
US4321695A (en) * 1979-11-23 1982-03-23 Texas Instruments Incorporated High speed serial access semiconductor memory with fault tolerant feature
US4541075A (en) * 1982-06-30 1985-09-10 International Business Machines Corporation Random access memory having a second input/output port
JPS6072020A (ja) * 1983-09-29 1985-04-24 Nec Corp デュアルポ−トメモリ回路
JPH06101841B2 (ja) * 1984-01-11 1994-12-12 日本電気株式会社 動画像信号の符号化方法およびその装置
US4602275A (en) * 1984-03-19 1986-07-22 Rca Corporation Television memory system
DE3588186T2 (de) * 1985-01-22 1998-12-03 Texas Instruments Inc., Dallas, Tex. Halbleiterspeicher mit Serienzugriff
CA1293565C (en) * 1986-04-28 1991-12-24 Norio Ebihara Semiconductor memory
US4864402A (en) * 1986-06-20 1989-09-05 Sony Corporation Video memory
JPH01224993A (ja) * 1988-03-04 1989-09-07 Nec Corp マルチポートメモリ
JP3028963B2 (ja) * 1988-09-21 2000-04-04 株式会社東芝 ビデオメモリ装置
JP2925157B2 (ja) * 1989-02-28 1999-07-28 キヤノン株式会社 データ記憶装置
US5036493A (en) * 1990-03-15 1991-07-30 Digital Equipment Corporation System and method for reducing power usage by multiple memory modules
JPH0782747B2 (ja) * 1990-05-07 1995-09-06 インターナショナル・ビジネス・マシーンズ・コーポレイション ランダムアクセスポートおよびシリアルアクセスポートを有するメモリアレイ
US5057916A (en) * 1990-11-16 1991-10-15 General Instrument Corporation Method and apparatus for refreshing motion compensated sequential video images
US5216503A (en) * 1991-12-24 1993-06-01 General Instrument Corporation Statistical multiplexer for a multichannel image compression system

Also Published As

Publication number Publication date
EP0543197A2 (en) 1993-05-26
AU2845692A (en) 1993-05-20
EP0862333A2 (en) 1998-09-02
KR970000604B1 (ko) 1997-01-14
EP0862333A3 (en) 2000-09-27
ATE218263T1 (de) 2002-06-15
ATE174449T1 (de) 1998-12-15
AU661637B2 (en) 1995-07-27
NO924452L (no) 1993-05-20
JPH0612485A (ja) 1994-01-21
DE69232623T2 (de) 2003-02-06
CA2082133A1 (en) 1993-05-20
NO924452D0 (no) 1992-11-18
US5315388A (en) 1994-05-24
DE69227821D1 (de) 1999-01-21
EP0543197A3 (enExample) 1994-04-20
DE69232623D1 (de) 2002-07-04
EP0862333B1 (en) 2002-05-29
EP0543197B1 (en) 1998-12-09
TW225081B (enExample) 1994-06-11
CA2082133C (en) 2000-05-02
KR930011726A (ko) 1993-06-24
NO302679B1 (no) 1998-04-06
JP3194500B2 (ja) 2001-07-30
DE69227821T2 (de) 1999-06-17

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