MX2019012019A - Metodo de procesamiento de informacion, aparato y dispositivo de comunicacion. - Google Patents

Metodo de procesamiento de informacion, aparato y dispositivo de comunicacion.

Info

Publication number
MX2019012019A
MX2019012019A MX2019012019A MX2019012019A MX2019012019A MX 2019012019 A MX2019012019 A MX 2019012019A MX 2019012019 A MX2019012019 A MX 2019012019A MX 2019012019 A MX2019012019 A MX 2019012019A MX 2019012019 A MX2019012019 A MX 2019012019A
Authority
MX
Mexico
Prior art keywords
communication device
matrix
basis
information processing
processing method
Prior art date
Application number
MX2019012019A
Other languages
English (en)
Inventor
Ma Liang
Zheng Chen
Liu Xiaojian
Wei Yuejun
Zeng Xin
Original Assignee
Huawei Tech Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Tech Co Ltd filed Critical Huawei Tech Co Ltd
Priority claimed from PCT/CN2018/081003 external-priority patent/WO2019001046A1/zh
Publication of MX2019012019A publication Critical patent/MX2019012019A/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/618—Shortening and extension of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
    • H04L1/0013—Rate matching, e.g. puncturing or repetition of code symbols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0076—Distributed coding, e.g. network coding, involving channel coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computational Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Algebra (AREA)
  • Computing Systems (AREA)
  • Quality & Reliability (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Semiconductor Lasers (AREA)
  • Optical Couplings Of Light Guides (AREA)

Abstract

Esta solicitud describe un método de codificación, un aparato, un dispositivo de comunicación y un sistema de comunicación. El método incluye: codificar una secuencia de bits de entrada al utilizar una matriz de comprobación de paridad de baja densidad LDPC, donde la matriz de LDPC se obtiene basándose en un factor de elevación Z y una matriz base, la matriz base incluye de la fila 0 a la fila 4 y de la columna 0 a la columna 26 en una de las matrices mostradas en la FIGURA 3b-1, FIGURA 3b-2, FIGURA 3b-3, FIGURA 3b-4, FIGURA 3b-5, FIGURA 3b-6, FIGURA 3b-7, FIGURA 3b-8, FIGURA 3b-9 y FIGURA 3b-10, o la matriz base incluye de la fila 0 a la fila 4 y algunas de la columna 0 a la columna 26 en una de las matrices mostradas en la FIGURA 3b-1, FIGURA 3b-2, FIGURA 3b-3, FIGURA 3b-4, FIGURA 3b-5, FIGURA 3b-6, FIGURA 3b-7, FIGURA 3b-8, FIGURA 3b-9 y FIGURA 3b-10. El método de codificación, el aparato, el dispositivo de comunicación y el sistema de comunicación en esta solicitud pueden cumplir un requisito de codificación de canal.
MX2019012019A 2017-06-27 2018-03-29 Metodo de procesamiento de informacion, aparato y dispositivo de comunicacion. MX2019012019A (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CN201710502600 2017-06-27
CN201710572348.1A CN109150196A (zh) 2017-06-27 2017-07-13 信息处理的方法、装置和通信设备
PCT/CN2018/081003 WO2019001046A1 (zh) 2017-06-27 2018-03-29 信息处理的方法、装置和通信设备

Publications (1)

Publication Number Publication Date
MX2019012019A true MX2019012019A (es) 2019-11-11

Family

ID=64807111

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2019012019A MX2019012019A (es) 2017-06-27 2018-03-29 Metodo de procesamiento de informacion, aparato y dispositivo de comunicacion.

Country Status (11)

Country Link
US (4) US10784893B2 (es)
EP (2) EP3582398B1 (es)
JP (1) JP6815537B2 (es)
KR (1) KR102194617B1 (es)
CN (3) CN109150196A (es)
AU (1) AU2018290395B2 (es)
BR (2) BR112019020898B1 (es)
ES (1) ES2922630T3 (es)
MX (1) MX2019012019A (es)
RU (1) RU2769096C2 (es)
ZA (1) ZA201905739B (es)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10879927B2 (en) * 2017-05-17 2020-12-29 Futurewei Technologies, Inc. Compact low density parity check (LDPC) base graph
CN109150196A (zh) * 2017-06-27 2019-01-04 华为技术有限公司 信息处理的方法、装置和通信设备
KR102395537B1 (ko) * 2017-08-18 2022-05-10 에스케이하이닉스 주식회사 H 행렬 생성 회로, 그것의 동작 방법 및 그것에 의해 생성된 h 행렬을 사용하는 에러 정정 회로
CN108052285B (zh) * 2017-12-12 2018-12-11 清华大学 一种自适应编码长度的时序数据存储的方法和装置
US11184888B2 (en) * 2018-09-25 2021-11-23 Qualcomm Incorporated Rate matching for a downlink transmission with multiple transmission configurations
CN111327330B (zh) * 2018-12-14 2022-04-08 深圳市中兴微电子技术有限公司 一种信息处理方法、设备及计算机存储介质
CN112149049A (zh) * 2019-06-26 2020-12-29 北京百度网讯科技有限公司 用于变换矩阵的装置和方法、数据处理系统
CN114946144B (zh) * 2020-01-21 2023-05-12 华为技术有限公司 低密度奇偶校验码编码方法和编码器
CN115529108A (zh) * 2021-06-25 2022-12-27 华为技术有限公司 数据传输方法及相关装置
KR20230037264A (ko) * 2021-09-09 2023-03-16 삼성전자주식회사 통신 시스템에서 신호 송수신 방법 및 장치
CN115118289B (zh) * 2022-08-29 2022-11-18 北京航空航天大学 一种基于gpu的5gldpc编码器的编码方法
CN117749315A (zh) * 2022-09-13 2024-03-22 华为技术有限公司 编码方法、译码方法、通信装置及计算机可读存储介质

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2282671T3 (es) 2002-07-03 2007-10-16 The Directv Group, Inc. Codificacion de codigos de comprobacion de paridad de baja densidad (ldpc) utilizando una matriz de comprobacion de paridad estructurada.
US7617439B2 (en) * 2005-01-10 2009-11-10 Broadcom Corporation Algebraic construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices
CN100546205C (zh) * 2006-04-29 2009-09-30 北京泰美世纪科技有限公司 构造低密度奇偶校验码的方法、译码方法及其传输系统
KR101119111B1 (ko) * 2006-05-04 2012-03-16 엘지전자 주식회사 Ｌｄｐｃ 부호를 이용한 데이터 재전송 방법
RU2443053C2 (ru) 2007-01-24 2012-02-20 Квэлкомм Инкорпорейтед Кодирование и декодирование ldpc пакетов переменных размеров
CN101431337A (zh) * 2007-11-09 2009-05-13 松下电器产业株式会社 提高编码并行度实现降低编码时延的方法
CN101272223B (zh) * 2008-04-30 2011-04-20 中兴通讯股份有限公司 一种低密度生成矩阵码的译码方法及装置
CN101662290B (zh) * 2008-08-26 2013-08-28 华为技术有限公司 生成准循环ldpc码及编码的方法与装置
CN101834613B (zh) * 2009-03-09 2012-11-21 电信科学技术研究院 一种ldpc码的编码方法及编码器
CN102025441B (zh) * 2009-09-11 2013-07-31 北京泰美世纪科技有限公司 Ldpc码校验矩阵的构造方法、ldpc码的编码方法和编码装置
CN103053116B (zh) * 2011-06-28 2016-10-05 华为技术有限公司 低密度奇偶校验码的编码方法和装置
US9077378B2 (en) * 2013-01-31 2015-07-07 Lsi Corporation Integrated-interleaved low density parity check (LDPC) codes
CN104981978B (zh) * 2013-02-13 2017-12-08 高通股份有限公司 使用准循环构造和穿孔以实现高速率、高并行性和低差错本底的ldpc设计
TWI540844B (zh) * 2013-03-27 2016-07-01 國立清華大學 雙重準循環低密度同位校驗碼
CN103731160B (zh) * 2014-01-09 2016-08-17 西安电子科技大学 分组空间耦合低密度奇偶校验编码方法
US9264074B2 (en) * 2014-02-11 2016-02-16 Entropic Communications, Llc LDPC code matrices
CN104202057B (zh) * 2014-02-12 2019-08-16 中兴通讯股份有限公司 信息处理方法及装置
CN104868925B (zh) * 2014-02-21 2019-01-22 中兴通讯股份有限公司 结构化ldpc码的编码方法、译码方法、编码装置和译码装置
US20150381025A1 (en) 2014-06-25 2015-12-31 Mada Energie Llc Laes operating phase change materials
US9432055B2 (en) * 2014-06-26 2016-08-30 Sandisk Technologies Llc Encoder for quasi-cyclic low-density parity-check codes over subfields using fourier transform
KR102270310B1 (ko) * 2014-08-26 2021-06-30 한국전자통신연구원 Ldpc 부호화기 및 이를 이용한 ldpc 부호화 방법
CN104333390B (zh) * 2014-11-26 2019-08-06 西安烽火电子科技有限责任公司 一种ldpc码的校验矩阵的构造方法与编码方法
US20160173132A1 (en) 2014-12-10 2016-06-16 Alcatel-Lucent Usa Inc. Construction of Structured LDPC Convolutional Codes
US20160218750A1 (en) * 2015-01-23 2016-07-28 Empire Technology Development Llc Parity check code encoder
CN104821831B (zh) 2015-03-24 2019-03-05 东南大学 一种适用于高码率qc-ldpc码的双循环构造方法
US10340953B2 (en) * 2015-05-19 2019-07-02 Samsung Electronics Co., Ltd. Method and apparatus for encoding and decoding low density parity check codes
CN106685586B (zh) * 2015-11-11 2020-02-14 华为技术有限公司 生成用于在信道中传输的低密度奇偶校验码的方法及设备
US10469104B2 (en) * 2016-06-14 2019-11-05 Qualcomm Incorporated Methods and apparatus for compactly describing lifted low-density parity-check (LDPC) codes
US10804933B2 (en) * 2016-09-30 2020-10-13 Lg Electronics Inc. QC LDPC code rate matching method and device therefor
CN106849958B (zh) * 2016-12-29 2020-10-27 上海华为技术有限公司 低密度奇偶校验码校验矩阵的构造方法、编码方法及系统
WO2018157390A1 (en) * 2017-03-03 2018-09-07 Huawei Technologies Co., Ltd. High-rate long ldpc codes
CN110535474B (zh) * 2017-05-05 2023-06-06 华为技术有限公司 信息处理的方法、通信装置
CN109314527B (zh) * 2017-05-05 2021-10-26 联发科技股份有限公司 Qc-ldpc编码方法、装置及非暂时性计算机可读介质
CN108712174B9 (zh) * 2017-06-27 2019-08-30 华为技术有限公司 信息处理的方法、装置和通信设备
CN109150196A (zh) * 2017-06-27 2019-01-04 华为技术有限公司 信息处理的方法、装置和通信设备

Also Published As

Publication number Publication date
CN111052615A (zh) 2020-04-21
US11469776B2 (en) 2022-10-11
RU2019131324A3 (es) 2021-08-05
US20200403636A1 (en) 2020-12-24
KR102194617B1 (ko) 2020-12-24
EP3582398B1 (en) 2022-06-15
US20240056100A1 (en) 2024-02-15
AU2018290395B2 (en) 2020-05-21
RU2019131324A (ru) 2021-04-05
ZA201905739B (en) 2021-07-28
CN110677157A (zh) 2020-01-10
RU2769096C2 (ru) 2022-03-28
BR112019020898A2 (pt) 2020-04-28
CN109150196A (zh) 2019-01-04
BR112019020898B1 (pt) 2022-02-15
US20190349006A1 (en) 2019-11-14
JP2020516147A (ja) 2020-05-28
BR112019026818A2 (pt) 2020-06-30
AU2018290395A1 (en) 2019-09-19
EP3582398A1 (en) 2019-12-18
ES2922630T3 (es) 2022-09-19
EP4113848A1 (en) 2023-01-04
US20230059125A1 (en) 2023-02-23
JP6815537B2 (ja) 2021-01-20
US11770135B2 (en) 2023-09-26
CN110677157B (zh) 2023-02-07
KR20190112129A (ko) 2019-10-02
US10784893B2 (en) 2020-09-22
EP3582398A4 (en) 2020-08-12

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