MX2019014457A - Aparato de transmision y metodo de intercalacion del mismo. - Google Patents
Aparato de transmision y metodo de intercalacion del mismo.Info
- Publication number
- MX2019014457A MX2019014457A MX2019014457A MX2019014457A MX2019014457A MX 2019014457 A MX2019014457 A MX 2019014457A MX 2019014457 A MX2019014457 A MX 2019014457A MX 2019014457 A MX2019014457 A MX 2019014457A MX 2019014457 A MX2019014457 A MX 2019014457A
- Authority
- MX
- Mexico
- Prior art keywords
- ldpc codeword
- transmitting apparatus
- bits
- map
- modulator
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
- H04L1/0058—Block-coded modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/36—Modulator circuits; Transmitter circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Computer Security & Cryptography (AREA)
- Quality & Reliability (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
Se proporciona un aparato de transmisión. El aparato de transmisión incluye: un codificador configurado para llevar a cabo una codificación de comprobación de paridad de baja densidad (LDPC) en bits ingresados utilizando una matriz de comprobación de paridad para generar una contraseña LDPC comprendiendo bits de palabra de información y bits de paridad; un intercalador configurado para intercalar la contraseña LDPC; y un modulador configurado para mapear la contraseña LDPC intercalada en un símbolo de modulación, en donde el modulador está además configurado para mapear un bit incluido en un grupo de bit predeterminado de entre una pluralidad de grupos de bit que constituye la contraseña LDPC en un bit predeterminado del símbolo de modulación.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201462001168P | 2014-05-21 | 2014-05-21 | |
KR1020150000672A KR101775703B1 (ko) | 2014-05-21 | 2015-01-05 | 송신 장치 및 그의 인터리빙 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2019014457A true MX2019014457A (es) | 2020-02-10 |
Family
ID=54882732
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016015203A MX370107B (es) | 2014-05-21 | 2015-05-21 | Aparato de transmision y metodo de intercalacion del mismo. |
MX2019014456A MX2019014456A (es) | 2014-05-21 | 2016-11-18 | Aparato de transmision y metodo de intercalacion del mismo. |
MX2019014457A MX2019014457A (es) | 2014-05-21 | 2016-11-18 | Aparato de transmision y metodo de intercalacion del mismo. |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016015203A MX370107B (es) | 2014-05-21 | 2015-05-21 | Aparato de transmision y metodo de intercalacion del mismo. |
MX2019014456A MX2019014456A (es) | 2014-05-21 | 2016-11-18 | Aparato de transmision y metodo de intercalacion del mismo. |
Country Status (6)
Country | Link |
---|---|
US (2) | US10992415B2 (es) |
EP (1) | EP3146636A4 (es) |
KR (5) | KR101775703B1 (es) |
CN (1) | CN106416084B (es) |
CA (3) | CA3101042A1 (es) |
MX (3) | MX370107B (es) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101775703B1 (ko) * | 2014-05-21 | 2017-09-06 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
WO2016117904A1 (ko) * | 2015-01-21 | 2016-07-28 | 엘지전자 주식회사 | 방송 신호 송신 장치, 방송 신호 수신 장치, 방송 신호 송신 방법, 및 방송 신호 수신 방법 |
US10277439B2 (en) | 2016-07-18 | 2019-04-30 | Qualcomm Incorporated | Dual stage channel interleaving for data transmission |
CN108989840B (zh) * | 2017-06-02 | 2020-10-16 | 上海数字电视国家工程研究中心有限公司 | 适用于高速运动接收的数据帧的设计方法和传输系统 |
US11258535B2 (en) | 2017-06-16 | 2022-02-22 | Lg Electronics Inc. | Method and apparatus for transmitting information |
CN109218248A (zh) * | 2017-06-29 | 2019-01-15 | 上海数字电视国家工程研究中心有限公司 | 解复用系统 |
US10447303B2 (en) * | 2017-12-20 | 2019-10-15 | Qualcomm Incorporated | Low-density parity check (LDPC) incremental parity-check matrix rotation |
DE102019200256B4 (de) * | 2019-01-10 | 2020-07-30 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verschachteler |
Family Cites Families (31)
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ATE556491T1 (de) * | 2002-07-03 | 2012-05-15 | Dtvg Licensing Inc | Methode und verfahren für die speicherverwaltung in low density parity check (ldpc) decodern |
US7570698B2 (en) | 2004-11-16 | 2009-08-04 | Intel Corporation | Multiple output multicarrier transmitter and methods for spatial interleaving a plurality of spatial streams |
US7555696B2 (en) * | 2004-12-09 | 2009-06-30 | General Instrument Corporation | Method and apparatus for forward error correction in a content distribution system |
EP2186200B1 (en) * | 2007-08-28 | 2016-06-15 | Samsung Electronics Co., Ltd. | Apparatus and method for transmitting and receiving data in a communication system using low density parity check codes |
EP2056510B1 (en) * | 2007-10-30 | 2013-04-03 | Sony Corporation | Data processing apparatus and method |
KR101435681B1 (ko) | 2007-11-08 | 2014-09-02 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서데이터 송수신 장치 및 방법 |
EA021906B1 (ru) * | 2007-11-26 | 2015-09-30 | Сони Корпорейшн | Устройство и способ передачи данных |
AU2008332040B2 (en) | 2007-12-06 | 2012-04-05 | Postech Academy Industry Foundation | Method and apparatus for encoding and decoding channel in a communication system using low-density parity-check codes |
GB2460459B (en) | 2008-05-30 | 2012-07-11 | Sony Corp | Data processing apparatus and method |
EP2329602B1 (en) | 2008-10-03 | 2015-03-11 | Thomson Licensing | Method and apparatus for adapting a bit interleaver to ldpc codes and modulations under awgn channel conditions using binary erasure surrogate channels |
TWI427936B (zh) | 2009-05-29 | 2014-02-21 | Sony Corp | 接收設備,接收方法,程式,及接收系統 |
EP2337259B1 (en) * | 2009-11-18 | 2021-08-25 | Samsung Electronics Co., Ltd. | Method and apparatus for transmitting and receiving data in a communication system |
WO2012026787A2 (en) * | 2010-08-26 | 2012-03-01 | Samsung Electronics Co., Ltd. | Apparatus and method for transmitting and receiving data in a communication or broadcasting system using linear block code |
JP5601182B2 (ja) | 2010-12-07 | 2014-10-08 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
JP5630282B2 (ja) | 2011-01-19 | 2014-11-26 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
JP5637393B2 (ja) * | 2011-04-28 | 2014-12-10 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
EP2560311A1 (en) * | 2011-08-17 | 2013-02-20 | Panasonic Corporation | Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes |
EP2690790A1 (en) * | 2012-07-27 | 2014-01-29 | Panasonic Corporation | Bit interleaving for rotated constellations with quasi-cyclic LDPC codes |
KR20150005853A (ko) | 2013-07-05 | 2015-01-15 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
US9577679B2 (en) | 2013-10-04 | 2017-02-21 | Samsung Electronics Co., Ltd. | Transmitting apparatus and signal processing method thereof |
US9871621B2 (en) | 2013-10-30 | 2018-01-16 | Samsung Electronics Co., Ltd. | Transmitting apparatus and signal processing method thereof |
US10425110B2 (en) | 2014-02-19 | 2019-09-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
US9602137B2 (en) | 2014-02-19 | 2017-03-21 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
US9596116B2 (en) | 2014-02-20 | 2017-03-14 | Lg Electronics Inc. | Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals |
US9685980B2 (en) | 2014-03-19 | 2017-06-20 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
US9780808B2 (en) | 2014-05-21 | 2017-10-03 | Samsung Electronics Co., Ltd. | Transmitter apparatus and bit interleaving method thereof |
US10396824B2 (en) | 2014-05-21 | 2019-08-27 | Sony Corporation | Data processing device and data processing method |
KR101775703B1 (ko) * | 2014-05-21 | 2017-09-06 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
US9800269B2 (en) | 2014-05-21 | 2017-10-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
US9602245B2 (en) | 2014-05-21 | 2017-03-21 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
US20160204804A1 (en) * | 2015-01-13 | 2016-07-14 | Sony Corporation | Data processing apparatus and method |
-
2015
- 2015-01-05 KR KR1020150000672A patent/KR101775703B1/ko active IP Right Grant
- 2015-05-21 CA CA3101042A patent/CA3101042A1/en active Pending
- 2015-05-21 CA CA2949371A patent/CA2949371C/en active Active
- 2015-05-21 CN CN201580027204.7A patent/CN106416084B/zh active Active
- 2015-05-21 MX MX2016015203A patent/MX370107B/es active IP Right Grant
- 2015-05-21 CA CA3027065A patent/CA3027065C/en active Active
- 2015-05-21 EP EP15796379.4A patent/EP3146636A4/en active Pending
-
2016
- 2016-11-18 MX MX2019014456A patent/MX2019014456A/es unknown
- 2016-11-18 MX MX2019014457A patent/MX2019014457A/es unknown
-
2017
- 2017-04-28 KR KR1020170055714A patent/KR101776276B1/ko active IP Right Grant
- 2017-08-31 KR KR1020170111423A patent/KR101965371B1/ko active IP Right Grant
-
2019
- 2019-03-28 KR KR1020190036064A patent/KR102116117B1/ko active IP Right Grant
- 2019-06-17 US US16/443,691 patent/US10992415B2/en active Active
-
2020
- 2020-05-21 KR KR1020200061181A patent/KR102329775B1/ko active IP Right Grant
-
2021
- 2021-03-30 US US17/217,205 patent/US11637655B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
MX2019014456A (es) | 2020-02-10 |
KR20150134257A (ko) | 2015-12-01 |
CA2949371C (en) | 2019-01-29 |
EP3146636A4 (en) | 2018-02-21 |
KR102116117B1 (ko) | 2020-05-27 |
MX2016015203A (es) | 2017-03-03 |
CN106416084A (zh) | 2017-02-15 |
CA3027065A1 (en) | 2015-11-26 |
KR101775703B1 (ko) | 2017-09-06 |
KR20170052551A (ko) | 2017-05-12 |
MX370107B (es) | 2019-12-02 |
KR20190037217A (ko) | 2019-04-05 |
KR101965371B1 (ko) | 2019-08-13 |
US20190327022A1 (en) | 2019-10-24 |
KR102329775B1 (ko) | 2021-11-23 |
KR101776276B1 (ko) | 2017-09-07 |
US11637655B2 (en) | 2023-04-25 |
KR20170103729A (ko) | 2017-09-13 |
US20210306094A1 (en) | 2021-09-30 |
US10992415B2 (en) | 2021-04-27 |
CA3027065C (en) | 2020-12-22 |
EP3146636A1 (en) | 2017-03-29 |
KR20200058375A (ko) | 2020-05-27 |
CN106416084B (zh) | 2019-10-18 |
CA2949371A1 (en) | 2015-11-26 |
CA3101042A1 (en) | 2015-11-26 |
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