MX2019008372A - Aparato de transmision y metodo de intercalacion del mismo. - Google Patents
Aparato de transmision y metodo de intercalacion del mismo.Info
- Publication number
- MX2019008372A MX2019008372A MX2019008372A MX2019008372A MX2019008372A MX 2019008372 A MX2019008372 A MX 2019008372A MX 2019008372 A MX2019008372 A MX 2019008372A MX 2019008372 A MX2019008372 A MX 2019008372A MX 2019008372 A MX2019008372 A MX 2019008372A
- Authority
- MX
- Mexico
- Prior art keywords
- transmitting apparatus
- ldpc
- map
- modulator
- parity check
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/3405—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
- H03M13/6538—ATSC VBS systems
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
- H03M13/6552—DVB-T2
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
- H03M13/6555—DVB-C2
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
Abstract
Se proporciona un aparato de transmisión. El aparato de transmisión incluye: un codificador configurado para generar una contraseña de comprobación de paridad de baja densidad (LDPC) por medio de codificación por LDPC en base a una matriz de comprobación de paridad; un intercalador configurado para intercalar la contraseña LDPC; y un modulador configurado para mapear la contraseña LDPC intercalada en un símbolo de modulación, en donde el modulador es además configurado para mapear un bit incluido en un grupo de bit predeterminado de entre una pluralidad de grupos de bit que constituye la contraseña LDPC en un bit predeterminado del símbolo de modulación.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201461941708P | 2014-02-19 | 2014-02-19 | |
KR1020150024183A KR101800409B1 (ko) | 2014-02-19 | 2015-02-17 | 송신 장치 및 그의 인터리빙 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2019008372A true MX2019008372A (es) | 2019-09-16 |
Family
ID=54059702
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016010774A MX366541B (es) | 2014-02-19 | 2015-02-23 | Aparato de transmision y metodo de intercalacion del mismo. |
MX2019008372A MX2019008372A (es) | 2014-02-19 | 2016-08-18 | Aparato de transmision y metodo de intercalacion del mismo. |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016010774A MX366541B (es) | 2014-02-19 | 2015-02-23 | Aparato de transmision y metodo de intercalacion del mismo. |
Country Status (4)
Country | Link |
---|---|
KR (4) | KR101800409B1 (es) |
CN (1) | CN106471782B (es) |
CA (3) | CA3040604C (es) |
MX (2) | MX366541B (es) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10425110B2 (en) | 2014-02-19 | 2019-09-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
KR101800409B1 (ko) * | 2014-02-19 | 2017-11-23 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
JP7226619B2 (ja) * | 2017-02-06 | 2023-02-21 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
JP7226618B2 (ja) * | 2017-02-06 | 2023-02-21 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
JP7226617B2 (ja) * | 2017-02-06 | 2023-02-21 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
JP7226620B2 (ja) * | 2017-02-06 | 2023-02-21 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
JP6897205B2 (ja) | 2017-02-20 | 2021-06-30 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
WO2018201540A1 (zh) * | 2017-05-05 | 2018-11-08 | 华为技术有限公司 | 信息处理的方法、通信装置 |
CN109120276B (zh) | 2017-05-05 | 2019-08-13 | 华为技术有限公司 | 信息处理的方法、通信装置 |
BR112020001893A2 (pt) | 2017-08-04 | 2020-07-28 | Qualcomm Incorporated | projetos de intercalador eficiente para códigos polares |
JP7218829B2 (ja) * | 2017-08-22 | 2023-02-07 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
DE102019200256B4 (de) * | 2019-01-10 | 2020-07-30 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verschachteler |
JP7424523B2 (ja) * | 2022-03-24 | 2024-01-30 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100330234B1 (ko) * | 1999-05-19 | 2002-03-25 | 윤종용 | 터보 인터리빙 장치 및 방법 |
EP1098467A1 (en) * | 1999-11-08 | 2001-05-09 | THOMSON multimedia | Methods and devices for initialising a convolutional interleaver/deinterleaver |
AU2003249708A1 (en) * | 2002-07-03 | 2004-01-23 | Hughes Electronics Corporation | Method and system for memory management in low density parity check (ldpc) decoders |
KR20060097503A (ko) * | 2005-03-11 | 2006-09-14 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널인터리빙/디인터리빙 장치 및 그 제어 방법 |
CN101902629B (zh) * | 2006-12-08 | 2012-05-30 | 北京新岸线移动通信技术有限公司 | 地面移动多媒体广播系统中的数据传输方法 |
KR20080095809A (ko) * | 2007-04-25 | 2008-10-29 | 엘지전자 주식회사 | 신호 송수신 방법 및 신호 송수신 장치 |
KR101373646B1 (ko) * | 2007-06-01 | 2014-03-14 | 삼성전자주식회사 | Ldpc코딩된 데이터를 포함하는 ofdm 심볼을송수신하는 ofdm 송수신 장치와, 그 방법 |
EP2248265B1 (en) * | 2008-03-03 | 2015-05-27 | RAI RADIOTELEVISIONE ITALIANA S.p.A. | Bit permutation patterns for ldpc coded modulation and qam constellations |
CN102292983B (zh) * | 2009-03-09 | 2014-04-23 | Lg电子株式会社 | 用于发送和接收信号的装置以及用于发送和接收信号的方法 |
EP2525497A1 (en) * | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
EP2525495A1 (en) * | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
EP2525496A1 (en) * | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
GB201312243D0 (en) * | 2013-07-08 | 2013-08-21 | Samsung Electronics Co Ltd | Non-Uniform Constellations |
KR102264848B1 (ko) * | 2013-09-26 | 2021-06-14 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
KR102258098B1 (ko) * | 2013-10-04 | 2021-05-28 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
KR101800409B1 (ko) * | 2014-02-19 | 2017-11-23 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
KR101776275B1 (ko) * | 2014-02-19 | 2017-09-07 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
KR101776272B1 (ko) * | 2014-03-19 | 2017-09-07 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
-
2015
- 2015-02-17 KR KR1020150024183A patent/KR101800409B1/ko active IP Right Grant
- 2015-02-23 CA CA3040604A patent/CA3040604C/en active Active
- 2015-02-23 CA CA3133553A patent/CA3133553C/en active Active
- 2015-02-23 CA CA2940011A patent/CA2940011C/en active Active
- 2015-02-23 CN CN201580020603.0A patent/CN106471782B/zh active Active
- 2015-02-23 MX MX2016010774A patent/MX366541B/es active IP Right Grant
-
2016
- 2016-08-18 MX MX2019008372A patent/MX2019008372A/es unknown
-
2017
- 2017-11-16 KR KR1020170153250A patent/KR101944526B1/ko active IP Right Grant
-
2019
- 2019-01-25 KR KR1020190010147A patent/KR101986778B1/ko active IP Right Grant
- 2019-05-31 KR KR1020190064835A patent/KR102245527B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
MX366541B (es) | 2019-07-12 |
CA3040604A1 (en) | 2015-08-27 |
KR101800409B1 (ko) | 2017-11-23 |
KR20170129668A (ko) | 2017-11-27 |
KR20190064556A (ko) | 2019-06-10 |
KR102245527B1 (ko) | 2021-04-29 |
CA2940011A1 (en) | 2015-08-27 |
CA3040604C (en) | 2021-11-23 |
KR20150098226A (ko) | 2015-08-27 |
MX2016010774A (es) | 2016-11-08 |
CA3133553A1 (en) | 2015-08-27 |
KR20190011795A (ko) | 2019-02-07 |
CN106471782B (zh) | 2019-11-15 |
KR101944526B1 (ko) | 2019-01-31 |
CA2940011C (en) | 2019-06-11 |
KR101986778B1 (ko) | 2019-09-30 |
CN106471782A (zh) | 2017-03-01 |
CA3133553C (en) | 2023-08-15 |
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MX345597B (es) | Entrelazador de bits para palabra código de revisión de paridad de baja densidad que tiene una longitud de 64800 y un índice de código 7/15 y manipulación por desplazamiento de fase en cuadratura, y método para entrelazar bits que utiliza el mismo. |