MX2012012942A - Metodo y aparato para codificacion y decodificacion de canales en sistema de comunicacion usando codigo de verificacion de paridad de baja densidad. - Google Patents
Metodo y aparato para codificacion y decodificacion de canales en sistema de comunicacion usando codigo de verificacion de paridad de baja densidad.Info
- Publication number
- MX2012012942A MX2012012942A MX2012012942A MX2012012942A MX2012012942A MX 2012012942 A MX2012012942 A MX 2012012942A MX 2012012942 A MX2012012942 A MX 2012012942A MX 2012012942 A MX2012012942 A MX 2012012942A MX 2012012942 A MX2012012942 A MX 2012012942A
- Authority
- MX
- Mexico
- Prior art keywords
- channel coding
- communication system
- low
- decoding
- density parity
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/618—Shortening and extension of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Error Detection And Correction (AREA)
Abstract
Un método de codificación de canal en un sistema de comunicación que utiliza un código de Verificación de Paridad de Baja Densidad (LDPC, por sus siglas en inglés). El método de codificación de canal incluye determinar un grado de distribución para una pluralidad de grupos de columnas de una parte de información y una pluralidad de grupos de columnas de una parte de paridad; determinar grados para la pluralidad de grupos de columnas de la parte de información con base en la distribución de grados; determinar un orden de acortamiento con base en los grados para la pluralidad de grupos de columnas de la parte de información; generar una matriz de verificación de paridad con base en el orden de acortamiento; y realizar la codificación usando la matriz de verificación de paridad generada.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020100043236A KR101670511B1 (ko) | 2010-05-07 | 2010-05-07 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호/복호 방법 및 장치 |
PCT/KR2011/003441 WO2011139133A2 (en) | 2010-05-07 | 2011-05-09 | Method and apparatus for channel coding and decoding in a communication system using a low-density parity-check code |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2012012942A true MX2012012942A (es) | 2013-01-17 |
Family
ID=44902777
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2012012942A MX2012012942A (es) | 2010-05-07 | 2011-05-09 | Metodo y aparato para codificacion y decodificacion de canales en sistema de comunicacion usando codigo de verificacion de paridad de baja densidad. |
Country Status (6)
Country | Link |
---|---|
US (2) | US8645809B2 (es) |
EP (1) | EP2567462B1 (es) |
KR (1) | KR101670511B1 (es) |
CA (1) | CA2798931C (es) |
MX (1) | MX2012012942A (es) |
WO (1) | WO2011139133A2 (es) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101503059B1 (ko) * | 2008-02-26 | 2015-03-19 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호/복호 방법 및 장치 |
KR101670511B1 (ko) * | 2010-05-07 | 2016-10-28 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호/복호 방법 및 장치 |
US9043681B2 (en) * | 2012-03-28 | 2015-05-26 | Intel Corporation | Reconstructing codewords using a side channel |
WO2015041480A1 (en) * | 2013-09-18 | 2015-03-26 | Samsung Electronics Co., Ltd. | Transmitter and signal processing method thereof |
EP4340267A3 (en) * | 2014-04-30 | 2024-04-10 | Huawei Technologies Co., Ltd. | Data sending method and apparatus |
KR101776273B1 (ko) | 2015-02-25 | 2017-09-07 | 삼성전자주식회사 | 송신 장치 및 그의 부가 패리티 생성 방법 |
MY196159A (en) * | 2015-02-25 | 2023-03-17 | Samsung Electronics Co Ltd | Transmitter And Method For Generating Additional Parity Thereof |
CN104917588A (zh) * | 2015-04-13 | 2015-09-16 | 李焱 | 提高非视距毫米波室内通信系统传输可靠性信道编码方法 |
CN106158046B (zh) * | 2015-05-15 | 2021-03-30 | 爱思开海力士有限公司 | 用于turbo乘积码的误校正避免 |
CN105846827B (zh) * | 2016-03-17 | 2019-02-01 | 哈尔滨工程大学 | 基于算术码与低密度奇偶校验码的迭代联合信源信道译码方法 |
JP2017224874A (ja) * | 2016-06-13 | 2017-12-21 | 富士通株式会社 | 符号化装置、伝送装置及び符号化方法 |
US10819372B2 (en) | 2016-11-04 | 2020-10-27 | Lg Electronics Inc. | Method for dividing transport block of LDPC code and apparatus therefor |
US10911982B2 (en) * | 2017-03-02 | 2021-02-02 | Ntt Docomo, Inc. | User terminal and radio communication method |
WO2018203725A1 (en) | 2017-05-04 | 2018-11-08 | Samsung Electronics Co., Ltd. | A method and apparatus for channel encoding and decoding in a communication or broadcasting system |
WO2019107912A1 (ko) * | 2017-11-29 | 2019-06-06 | 연세대학교 산학협력단 | 저지연 및 고신뢰도 특성을 가지는 ldpc 부호화 장치 및 방법 |
JP7077627B2 (ja) * | 2018-01-18 | 2022-05-31 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
US10606697B2 (en) * | 2018-06-21 | 2020-03-31 | Goke Us Research Laboratory | Method and apparatus for improved data recovery in data storage systems |
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KR20050118056A (ko) | 2004-05-12 | 2005-12-15 | 삼성전자주식회사 | 다양한 부호율을 갖는 Block LDPC 부호를 이용한이동 통신 시스템에서의 채널부호화 복호화 방법 및 장치 |
US7165205B2 (en) * | 2004-05-14 | 2007-01-16 | Motorola, Inc. | Method and apparatus for encoding and decoding data |
US7996746B2 (en) * | 2004-10-12 | 2011-08-09 | Nortel Networks Limited | Structured low-density parity-check (LDPC) code |
KR20070014895A (ko) * | 2005-07-29 | 2007-02-01 | 삼성전자주식회사 | 광대역 무선 접속 통신 시스템에서 채널 품질 정보 송수신시스템 및 방법 |
KR100946905B1 (ko) * | 2005-09-27 | 2010-03-09 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 신호 송수신 장치 및 방법 |
JP4620132B2 (ja) * | 2005-12-20 | 2011-01-26 | 三菱電機株式会社 | 検査行列生成方法、符号化方法、通信装置、通信システム、符号化器 |
TW200838159A (en) * | 2007-01-24 | 2008-09-16 | Qualcomm Inc | LDPC encoding and decoding of packets of variable sizes |
KR20080076635A (ko) * | 2007-02-16 | 2008-08-20 | 삼성전자주식회사 | 통신 시스템에서 신호 송수신 장치 및 방법 |
KR101503059B1 (ko) * | 2008-02-26 | 2015-03-19 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호/복호 방법 및 장치 |
KR101503058B1 (ko) * | 2008-02-26 | 2015-03-18 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서의 채널 부호화/복호화 방법 및 장치 |
KR101740316B1 (ko) * | 2009-12-07 | 2017-05-29 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호화/복호화 방법 및 장치 |
KR101670511B1 (ko) * | 2010-05-07 | 2016-10-28 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호/복호 방법 및 장치 |
-
2010
- 2010-05-07 KR KR1020100043236A patent/KR101670511B1/ko active IP Right Grant
-
2011
- 2011-05-09 CA CA2798931A patent/CA2798931C/en active Active
- 2011-05-09 US US13/103,640 patent/US8645809B2/en active Active
- 2011-05-09 WO PCT/KR2011/003441 patent/WO2011139133A2/en active Application Filing
- 2011-05-09 MX MX2012012942A patent/MX2012012942A/es active IP Right Grant
- 2011-05-09 EP EP11777614.6A patent/EP2567462B1/en active Active
-
2014
- 2014-01-06 US US14/148,143 patent/US9197250B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US9197250B2 (en) | 2015-11-24 |
EP2567462A4 (en) | 2013-10-02 |
WO2011139133A2 (en) | 2011-11-10 |
EP2567462A2 (en) | 2013-03-13 |
WO2011139133A3 (en) | 2012-04-19 |
KR20110123637A (ko) | 2011-11-15 |
KR101670511B1 (ko) | 2016-10-28 |
EP2567462B1 (en) | 2021-10-27 |
US8645809B2 (en) | 2014-02-04 |
US20140122961A1 (en) | 2014-05-01 |
US20110276855A1 (en) | 2011-11-10 |
CA2798931C (en) | 2016-01-19 |
CA2798931A1 (en) | 2011-11-10 |
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