KR980006153A - 반도체 장치 및 그 제조방법 - Google Patents

반도체 장치 및 그 제조방법

Info

Publication number
KR980006153A
KR980006153A KR1019970027149A KR19970027149A KR980006153A KR 980006153 A KR980006153 A KR 980006153A KR 1019970027149 A KR1019970027149 A KR 1019970027149A KR 19970027149 A KR19970027149 A KR 19970027149A KR 980006153 A KR980006153 A KR 980006153A
Authority
KR
South Korea
Prior art keywords
electrode
semiconductor substrate
semiconductor device
substrate
region
Prior art date
Application number
KR1019970027149A
Other languages
English (en)
Other versions
KR100254661B1 (ko
Inventor
안도 마모루
Original Assignee
다까노 야스아끼
상요덴기 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP16600696A external-priority patent/JP3717597B2/ja
Priority claimed from JP8170283A external-priority patent/JPH1022336A/ja
Priority claimed from JP17028296A external-priority patent/JP3609540B2/ja
Application filed by 다까노 야스아끼, 상요덴기 가부시끼가이샤 filed Critical 다까노 야스아끼
Publication of KR980006153A publication Critical patent/KR980006153A/ko
Application granted granted Critical
Publication of KR100254661B1 publication Critical patent/KR100254661B1/ko

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Abstract

본 발명의 반도체 장치에서는, 능동 소자가 형성된 반도체 기판의 일부를 전극으로서 활용하고, 표면에 제3전극, 이면에 외부 접속용으로서 제4 전극이 형성된 제2 반도체 기판을 갖기 때문에, 제2 반도체 가판을 외부 접속용 전극으로서 이용함으로써, 종래의 반도체 장치와 같이 외부 전극과 접속하는 금속제의 리드 단자, 보호용의 밀봉 몰드를 필요로 하지 않는 반도체 장치를 제공할 수 있다. 그 결과, 반도체 장치의 외관 치수를 현저하게 소형화로 할 수 있고, 실장 기판 상에 실장할 때의 불필요한 공간을 없앨 수 있어, 실장 기판의 소형화에 크게 기여할 수 있다.

Description

반도체 장치 및 그 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제9도는 본 발명의 제2 실시 형태에 따른 반도체 장치의 단면도.

Claims (22)

  1. 반도체 장치에 있어서, 능동 소자를 구성하는 확산층이 내부에 형성되고, 표면에는 상기 능동 소자의 제1 전극이 형성되며, 또한 이면에는 상기 능동 소자의 제2 전극이 외부 접속용으로서 형성된 제1 반도체 기판과, 상기 제1 반도체 기판과 연속된 것이 슬릿을 통해 분리되고, 자신을 전극으로서 활용하여 표면에 제3 전극, 이면에 외부 접속용으로서 제4 전극이 형성된 제2 반도체 기판, 및 상기 제1 전극과 상기 제3 전극을 전기적으로 접속하는 접속 수단을 갖는 것을 특징으로 하는 반도체 장치.
  2. 제1항에 있어서, 상기 제2 전극과 상기 제4 전극의 표면이 동일면으로 되어 형성되는 것을 특징으로 하는 반도체 장치.
  3. 제1항에 있어서, 상기 제1 반도체 기판과 상기 제2 반도체 기판간의 슬릿은 절연 절착 수지로 고정되는 것을 특징으로 하는 반도체 장치.
  4. 제1항에 있어서, 상기 접속 수단은, 상기 제1 반도체 기판과 상기 제2 반도체 기판상에 피복된 절연층상에 형성되는 것을 특징으로 하는 반도체 장치.
  5. 제1항에 있어서, 상기 접속 수단은 금속의 가는 선으로 이루어지는 것을 특징으로 하는 반도체 장치.
  6. 제1항에 있어서, 상기 슬릿을 구성하는 상기 반도체 기판의 엣지 부분이 테이퍼로 이루어지는 것을 특징으로 하는 반도체 장치.
  7. 반도체 장치에 있어서, 능동 소자를 구성하는 확산층이 내부에 형성되고, 표면에는 상기 능동 소자의 제1 전극이 형성되며, 또한 이면에는 상기 능동 소자의 제2 전극이 외부 접속용으로서 형성된 제1 반도체 기판과, 상기 제1 반도체 소자의 연속된 것이 슬릿을 통해 분리되고, 자신을 전극으로서 활용하여 표면에 제3 전극, 이면에 외부 접속용으로서 제4 전극이 형성된 제2 반도체 기판, 및 상기 제1 전극과 상기 제3 전극을 전기적으로 접속하는 접속 수단이 그 표면에 형성된 배선 기판을 갖는 것을 특징으로 하는 반도체 장치.
  8. 제7항에 있어서, 상기 배선 기판은, 실리콘 기판, 유리 에폭시 기판, 세라믹 기판 또는 절연 처리된 금속 기판으로 이루어지는 것을 특징으로 하는 반도체 장치.
  9. 제7항에 있어서, 상기 제2 전극과 상기 제4 전극의 표면이 동일면으로 되어 형성되는 것을 특징으로 하는 반도체 장치.
  10. 제7항에 있어서, 상기 제1 반도체 기판과 상기 제2 반도체 기판간의 슬릿은, 절연 접착 수지로 고정되는 것을 특징으로 하는 반도체 장치.
  11. 제7항에 있어서, 상기 슬릿을 구성하는 상기 반도체 기판의 엣지 부분이 테이퍼로 이루어진 것을 특징으로 하는 반도체 장치.
  12. 제7항에 있어서, 상기 제1, 제3 전극상에 설치된 제1 금속 범프와, 상기 제1 금속 범프와 대응하여 상기 배선 기판상의 접속 수단에 고착된 제2 금속 범프, 및 상기 제1 금속 범프와 상기 제2 금속 범프 사이를 전기적으로 접속하는 접합층을 갖는 것을 특징으로 하는 반도체 장치.
  13. 반도체 장치에 있어서, 트랜지스터를 구성하는 확산층이 내부에 형성되고, 표면에는 상기 트랜지스터의 제어 전극 및 전류 유출측(또는 전류 유입측)의 전극이 형성되며, 또한 이면에는 상기 트랜지스터의 전류 유입측(또는 전류 유출측)의 전극이 형성된 제1 반도체 기판과, 상기 제1 반도체 기판과 연속한 것이 슬릿을 통해 분리되고, 자신을 전극으로서 활용하여 표면측에 형성된 제1 전극 및 이면에 형성된 제2 전극이 형성된 제2 반도체 기판과, 상기 제1 반도체 기판과 연속한 것이 슬릿을 통해 분리되고, 자신을 전극으로서 활용하여 표면측에 형성된 제3 전극 및 이면에 형성된 제4 전극이 형성된 제3 반도체 기판과, 상기 제어 전극과 상기 제1 전극, 상기 전류 유출측(전류 유입측)의 전극과 상기 제3 전극을 접속하고, 상기 제1 반도체 기판, 상기 제2 반도체 기판 및 상기 제3 반도체 기판상에 배치된 접속 수단을 갖는 것을 특징으로 하는 반도체 장치.
  14. 제13항에 있어서, 상기 배선 기판은, 제1 반도체 기판, 제2 반도체 기판 및 제3 반도체 기판상에 배치되고, 실리콘 기판, 유리 애폭시 기판, 세라믹 기판 또는 절연 처리된 금속 기판으로 이루어지는 것을 특징으로 하는 반도체 장치.
  15. 제13항에 있어서, 상기 전류 유입측(또는 전류 유출측)의 전극, 상기 제2 전극 및 상기 제4 전극의 표면이 동일면으로 이루어져 형성되는 것을 특징으로 하는 반도체 장치.
  16. 제13항에 있어서, 상기 제1 반도체 기판과 상기 제2 반도체 기판간의 슬릿, 상기 제1 반도체 기판과 상기 제3 반도체 기판간의 슬릿은, 절연 접착 수지로 고정되는 것을 특징으로 하는 반도체 장치.
  17. 제13항에 있어서, 상기 슬릿을 구성하는 상기 반도체 기판의 앳지 부분이 테이퍼로 이루어진 것을 특징으로 하는 반도체 장치.
  18. 반도체 장치의 제조 방법에 있어서, 능동 소자를 구성하는 확산층이 내부에 형성되고, 표면에는 상기 능동 소자의 제1 전극이 형성되며, 또한 이면에는 상기 능동 소자의 제2 전극이 외부 접속용으로서 형성된 제1 영역과, 자신을 전극으로서 활용하여 표면에 제3 전극, 이면에 외부 접속용으로서 제4 전극이 형성된 제2 영역을 갖는 반도체 기판을 준비하는 공정과, 상기 반도체 기판상의 접착성 절연 재료로 유지되어 상기 제1 전극과 상기 제3 전극을 전기적으로 접속하는 접속 수단을 형성하는 공정, 및 상기 제1 영역과 상기 제2 영역사이에서, 상기 반도체 기판의 이면으로부터 표면까지 연장되는 슬릿과, 상기 제1 영역과 상기 제2 영역이 일체로 되어 하나의 장치로서 분리되는 슬릿을 형성하는 공정을 갖는 반도체 장치의 제조 방법.
  19. 제18항에 있어서, 상기 반도체 기판상의 접착성 절연 재료로 유지되어 상기 제1 전극과 상기 제3 전극을 전기적으로 접속하는 접속 수단을 형성하는 공정을, 상기 반도체 기판과 접착 유지된 배선 기판에 설치된 상기 제1 전극과 상기 제3 전극을 전기적으로 접속하는 수단을 형성하는 공정으로 치환하는 것을 특징으로 하는 반도체 장치의 제조 방법.
  20. 반도체 장치의 제조 방법에 있어서, 트랜지스터를 구성하는 확산층이 내부에 형성되고, 표면에는 상기 트랜지스터의 제어 전극 및 전류 유출측(또는 전류 유입측)의 전극이 형성되며, 또한 이면에는 상기 트랜지스터의 전류 유입측(또는 전류 유출측)의 전극이 형성된 제1 영역과, 자신을 전극으로서 활용하여 표면측에 형성된 제1 전극 및 이면에 형성된 제2 전극이 형성된 제2 영역과, 자신을 전극으로서 활용하여 표면측에 형성된 제3 전극 및 이면측에 형성된 제4 전극이 형성된 제3 영역을 갖는 반도체 기판을 준비하는 공정과, 상기 제어 전극과 상기 제1 전극, 상기 전류 유출측(전류 유입측)의 전극과 상기 제3 전극을 접속하는 배선 패턴을, 상기 제1 반도체 기판, 상기 제2 반도체 기판 및 상기 제3 반도체 기판상의 접착 수지에 의해 유지하는 공정, 및 상기 제1 영역, 상기 제2 영역 및 제3 영역 사이에서, 상기 반도체 기판의 이면으로부터 표면까지 연장되는 슬릿과, 상기 제1 영역, 상기 제2 영역 및 제3 영역이 일체로 되어 상기 반도체 기판으로부터 하나의 트랜지스터 장치로서 분리되는 슬릿을 형성하는 공정을 갖는 것을 특징으로 하는 반도체 장치의 제조 방법.
  21. 제20항에 있어서, 상기 제어 전극과 상기 제1 전극, 상기 전류 유출측(전류 유입측)의 전극과 상기 제3 전극을 접속하는 배선 패턴을, 상기 제1 반도체 기판, 상기 제2 반도체 기판 및 상기 제3 반도체 기판상의 접착수지에 의해 유지하는 공정을, 상기 배선 패턴을, 상기 제1 반도체 기판, 상기 제2 반도체 기판 및 상기 제3 반도체 기판상에 설치된 배선 기판에 형성하는 공정으로 치환하는 것을 특징으로 하는 반도체 장치의 제조 방법.
  22. 제18항에 있어서, 상기 슬릿은 다이싱에 의해 형성되는 것을 특징으로 하는 반도체 장치의 제조 방법.
KR1019970027149A 1996-06-26 1997-06-25 반도체 장치 및 그 제조 방법 KR100254661B1 (ko)

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JP16600696A JP3717597B2 (ja) 1996-06-26 1996-06-26 半導体装置
JP96-166006 1996-06-26
JP8170283A JPH1022336A (ja) 1996-06-28 1996-06-28 半導体装置の製造方法
JP96-170283 1996-06-28
JP96-170282 1996-06-28
JP17028296A JP3609540B2 (ja) 1996-06-28 1996-06-28 半導体装置

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KR980006153A true KR980006153A (ko) 1998-03-30
KR100254661B1 KR100254661B1 (ko) 2000-05-01

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