KR970030343A - 반도체 메모리소자의 전극 및 이를 형성하는 방법 - Google Patents

반도체 메모리소자의 전극 및 이를 형성하는 방법 Download PDF

Info

Publication number
KR970030343A
KR970030343A KR1019950040267A KR19950040267A KR970030343A KR 970030343 A KR970030343 A KR 970030343A KR 1019950040267 A KR1019950040267 A KR 1019950040267A KR 19950040267 A KR19950040267 A KR 19950040267A KR 970030343 A KR970030343 A KR 970030343A
Authority
KR
South Korea
Prior art keywords
electrode
layer
forming
polycrystalline silicon
memory device
Prior art date
Application number
KR1019950040267A
Other languages
English (en)
Inventor
서태욱
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950040267A priority Critical patent/KR970030343A/ko
Priority to TW085108566A priority patent/TW393704B/zh
Priority to JP8223759A priority patent/JPH09148272A/ja
Publication of KR970030343A publication Critical patent/KR970030343A/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/482—Bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

반도체 메모리소자의 전극 및 이를 형성하는 방법에 대해 기재되어 있다. 이는 제1다결정실리콘층, 제1다결정실리콘층 상에 적층되어 있는 실리사이드층 및 실리사이드층 상에 적층되어 있는 제2다결정실리콘층으로 된 것을 특징으로 한다. 따라서, 다결정실리콘과 실리사이드가 적층된 폴리사이드 구조의 전극에서 발생하던 문제점들을 해결할 수 있다.

Description

반도체 메로리소자의 전극 및 이를 형성하는 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제6도는 본 발명의 방법에 의해 제조된 반도체 메모리소자의 전극을 도시한 단면도이다.

Claims (4)

  1. 제1다결정실리콘층; 상기 제1다결정실리콘층 상에 적층되어 있는 실리사이드층; 및 상기 실리사이드층 상에 적층되어 있는 제2다결정실리콘층으로 된 것을 특징으로 하는 반도체 메모리소자의 전극.
  2. 제1항에 있어서, 상기 제2다결정실리콘층 상에 산화막이 더 적층되어 있는 것을 특징으로 하는 반도체 메모리소자의 전극.
  3. 반도체기판 전면에 제1다결정실리콘층을 형성하는 제1단계; 상기 제1다결정실리콘층 상에 실리사이드층을 형성하는 제2단계; 상기 실리사이드층 상에 제2다결정실리콘층을 형성하는 제3단계; 및 상기 반도체기판 상에 적층된 물질을 차례대로 식각함으로써 상기 제1다결정실리콘층, 실리사이드층 및 제2다결정실리콘층이 적층된 구조의 전극을 형성하는 제4단계를 포함하는 것을 특징으로 하는 반도체 메모리소자의 전극 형성방법.
  4. 제3항에 있어서, 상기 제3단계 후, 상기 제2다결정실리콘층 상에 산화막을 형성하는 단계를 더 포함하는 것을 특징으로 하는 반도체 메모리소자의 전극 형성방법.
KR1019950040267A 1995-11-08 1995-11-08 반도체 메모리소자의 전극 및 이를 형성하는 방법 KR970030343A (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019950040267A KR970030343A (ko) 1995-11-08 1995-11-08 반도체 메모리소자의 전극 및 이를 형성하는 방법
TW085108566A TW393704B (en) 1995-11-08 1996-07-15 Conductive layer of semiconductor device and manufacturing method thereof
JP8223759A JPH09148272A (ja) 1995-11-08 1996-08-26 半導体素子の導電層及びその形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950040267A KR970030343A (ko) 1995-11-08 1995-11-08 반도체 메모리소자의 전극 및 이를 형성하는 방법

Publications (1)

Publication Number Publication Date
KR970030343A true KR970030343A (ko) 1997-06-26

Family

ID=19433383

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950040267A KR970030343A (ko) 1995-11-08 1995-11-08 반도체 메모리소자의 전극 및 이를 형성하는 방법

Country Status (3)

Country Link
JP (1) JPH09148272A (ko)
KR (1) KR970030343A (ko)
TW (1) TW393704B (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100565840B1 (ko) * 1999-05-18 2006-03-30 주식회사 하이닉스반도체 반도체소자 및 그의 제조방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100565840B1 (ko) * 1999-05-18 2006-03-30 주식회사 하이닉스반도체 반도체소자 및 그의 제조방법

Also Published As

Publication number Publication date
JPH09148272A (ja) 1997-06-06
TW393704B (en) 2000-06-11

Similar Documents

Publication Publication Date Title
KR960043238A (ko) 리세스 채널 구조를 갖는 반도체 소자 및 그의 제조방법
KR960036027A (ko) 불휘발성 메모리 소자 및 그 제조방법
KR970063743A (ko) 반도체 메모리 장치의 제조 방법
KR890005840A (ko) 저항성 접촉을 갖는 반도체 장치의 제조방법
KR980005441A (ko) 반도체 소자의 제조 방법
KR970072428A (ko) 반도체장치 및 그 제조방법
KR970030343A (ko) 반도체 메모리소자의 전극 및 이를 형성하는 방법
KR980005912A (ko) 반도체 장치의 금속콘택구조 및 그 제조방법
KR970052847A (ko) 반도체 장치의 제조 방법
KR960015940A (ko) 반도체소자의 캐패시터 제조방법
KR970024189A (ko) 반도체 메모리 소자 및 그 저항층 형성방법
JPS62133755A (ja) 半導体装置
KR960026900A (ko) 가상 접지 eprom 셀 구조를 갖는 비휘발성 반도체 기억 장치 및 그 제조 방법
KR950004548A (ko) 반도체소자 제조방법
KR920005318A (ko) 텅스텐 실리사이드 전극의 보호방법
KR960039377A (ko) 반도체 메모리장치 제조방법
KR980005873A (ko) 반도체 장치 및 그 제조방법
KR960026828A (ko) 반도체 메모리장치에서의 저항소자의 구조 및 그 형성방법
KR960043192A (ko) 반도체 캐패시터 및 그 제조 방법
KR960043203A (ko) 반도체장치의 제조방법
KR970003479A (ko) 반도체 장치의 매복접촉 형성방법
KR970052785A (ko) 반도체 소자 제조방법
KR930009088A (ko) 반도체 메모리장치의 커패시터 제조방법 및 커패시터 구조
KR970054103A (ko) 플래쉬 이이피롬 셀 제조 방법
KR970030853A (ko) 불휘발성 메모리장치의 제조방법

Legal Events

Date Code Title Description
A201 Request for examination
WITB Written withdrawal of application