KR960032777A - 전계효과형 반도체 장치 및 그 제조방법 - Google Patents

전계효과형 반도체 장치 및 그 제조방법 Download PDF

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KR960032777A
KR960032777A KR1019960002663A KR19960002663A KR960032777A KR 960032777 A KR960032777 A KR 960032777A KR 1019960002663 A KR1019960002663 A KR 1019960002663A KR 19960002663 A KR19960002663 A KR 19960002663A KR 960032777 A KR960032777 A KR 960032777A
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semiconductor device
field effect
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type semiconductor
gate electrode
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히데아키 구로다
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이데이 노부유키
소니 가부시기가이샤
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7838—Field effect transistors with field effect produced by an insulated gate without inversion channel, e.g. buried channel lateral MISFETs, normally-on lateral MISFETs, depletion-mode lateral MISFETs

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 전계효과형 반도체장치 및 그 제조방법에 관한 것이며, 확산층의 시트(sheet)저항을 낮게 하여 동작을 고속으로 하고, 미세화를 가능하게 하고, 전체적 제조 공정을 적제하여 제조크스트도 낮춘다. 게이트전극인 텅스텐폴리사이드층(35)을 덮는 SiO2막(16),(34)과 소자분리영역의 SiO2막(12)으로 확산층(17)이 에워사여 있고, 티탄 폴리사이드층(44)이 확산층(17)의 전체면에 콘택트하는 동시에 SiO2막(12),(16)상에 퍼져 있다. 그러므로, 티탄폴리사이드층(44)에 대하여 콘택트홀(25)을 개구하는 경우의 위치맞춤 여유가 크고, 따라서 콘택트보상 이온주입도 불필요하다.

Description

전계효과형 반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도∼제1E도는 본 발명의 일실시예를 공정순으로 나타낸 MOS 트랜지스터의 측단면도
제2도는 본 발명의 다른 실시예를 나타낸 MOS 트랜지스터의 측단면도.

Claims (15)

  1. 반도체기판과, 상기 반도체기판의 표면에 형성된 확산층과, 상기 반도체기판에 형성되어 상기 확산층을 에워싸는 소자분리영역과, 상기 반도체기판에 형성된 게이트전극과, 상기 게이트전극을 덮는 절연막과, 최소한 표면부가 실리사이드막으로 이루어지고, 상기 확산층의 전체면에 콘택트하는 동시에, 상기 절연막상 및 상기 소자분리영역상에 퍼져 있는 도전층으로 이루어지는 것을 특징으로 하는 전계효과형 반도체장치.
  2. 제1항에 있어서, 상기 절연막은 측벽 및 게이트전극의 위에 형성된 절연막으로 이루어지는 것을 특징으로 하는 전계효과형 반도체장치.
  3. 제1항에 있어서, 상기 도전층은 실리사이드막의 아래에 반도체막을 포함하는 것을 특징으로 하는 전계효과형 반도체장치.
  4. 제3항에 있어서, 상기 반도체막은 도프된 다결정 실리콘으로 이루어지는 것을 특징으로 하는 전계효과형 반도체장치.
  5. 제1항에 있어서, 상기 게이트전극은 홀리사이드구조를 가지는 것을 특징으로 하는 전계효과형 반도체장치.
  6. 제1항에 있어서, 상기 확산층은 LDD구조를 가지는 것을 특징으로 하는 전계효과형 반도체장치.
  7. 제1항에 있어서, 또한 상기 확산층의 아래에 형성된 포켓층을 포함하는 것을 특징으로 하는 전계효과형 반도체장치.
  8. 반도체기판의 표면에 형성된 도프된 영역과, 반도체기판에 형성되어 도프된 영역을 에워싸는 절연영역과, 반도체기판에 형성된 게이트전극과, 게이트전극을 덮는 절연막을 가지는 반도체기판을 형성하는 공정과, 상기 절연막상 및 소자분리영역상에 퍼지도록 상기 도프된 영역상에 반도체막을 형성하는 공정과, 상기 반도체막의 최소한 표면부를 실리사이드막으로 변환하는 공정과로 이루어지는 것을 특징으로 하는 전계효과형 반도체장치의 제조방법.
  9. 제8항에 있어서, 또한 상기 반도체막 및 상기 도프된 영역에 불순물을 도입하여, 이 영역에 확산층을 형성하는 공정으로 이루어지는 것을 특징으로 하는 전계효과형 반도체장치의 제조방법.
  10. 제8항에 있어서, 상기 절연막을 측벽 및 게이트전극의 위에 형성된 절연막으로 이루어지는 것을 특징으로 하는 전계효과형 반도체장치의 제조방법.
  11. 제8항에 있어서, 상기 절연막의 형성공정은, 상기 게이트전극을 형성하기 위한 도전층가 이 도전층상에 적층한 제1의 절연막과를 상기 게이트전극의 패턴으로 강하는 공정과, 제2의 절연막으로 이루어지는 측벽을 상기 도전층 및 상기 제1의 절연막의 측면에 형성하는 공정과로 이루어지는 것을 특징으로 하는 전계효과형 반도체장치의 제조방법.
  12. 제8항에 있어서, 상기 반도체막은 도프된 다결정 실리콘으로 이루어지는 것을 특징으로 하는 전계효과형 반도체장치의 제조방법.
  13. 제8항에 있어서, 상기 게이트전극은 폴리사이드구조를 가지는 것을 특징으로 하는 전계효과형 반도체장치의 제조방법.
  14. 제8항에 있어서, 상기 도프된 영역은 LDD구조를 가지는 것을 특징으로 하는 전계효과형 반도체장치의 제조방법.
  15. 제8항에 있어서, 또한 도프된 영역과는 반대도전형 불순물을 도입하여 도프된 영역 아래에 포켓층을 형성하는 공정으로 이루어지는 것을 특징으로 하는 전계효과형 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960002663A 1995-02-07 1996-02-05 전계효과형 반도체 장치 및 그 제조방법 KR960032777A (ko)

Applications Claiming Priority (2)

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JP95-42412 1995-02-07
JP7042412A JPH08213610A (ja) 1995-02-07 1995-02-07 電界効果型半導体装置及びその製造方法

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JP (1) JPH08213610A (ko)
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11220112A (ja) * 1998-01-30 1999-08-10 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5970352A (en) * 1998-04-23 1999-10-19 Kabushiki Kaisha Toshiba Field effect transistor having elevated source and drain regions and methods for manufacturing the same
JP4030193B2 (ja) 1998-07-16 2008-01-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3592535B2 (ja) * 1998-07-16 2004-11-24 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6255703B1 (en) * 1999-06-02 2001-07-03 Advanced Micro Devices, Inc. Device with lower LDD resistance
US6242776B1 (en) * 1999-06-02 2001-06-05 Advanced Micro Devices, Inc. Device improvement by lowering LDD resistance with new silicide process
US6797601B2 (en) * 1999-06-11 2004-09-28 Micron Technology, Inc. Methods for forming wordlines, transistor gates, and conductive interconnects
US6730584B2 (en) 1999-06-15 2004-05-04 Micron Technology, Inc. Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures
US6335249B1 (en) * 2000-02-07 2002-01-01 Taiwan Semiconductor Manufacturing Company Salicide field effect transistors with improved borderless contact structures and a method of fabrication
US6642112B1 (en) * 2001-07-30 2003-11-04 Zilog, Inc. Non-oxidizing spacer densification method for manufacturing semiconductor devices
KR100668954B1 (ko) * 2004-12-15 2007-01-12 동부일렉트로닉스 주식회사 박막트랜지스터 제조 방법
US8236691B2 (en) * 2008-12-31 2012-08-07 Micron Technology, Inc. Method of high aspect ratio plug fill

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JPH01128568A (ja) * 1987-11-13 1989-05-22 Matsushita Electron Corp 半導体装置
JPH01298765A (ja) * 1988-05-27 1989-12-01 Fujitsu Ltd 半導体装置及びその製造方法
US5294822A (en) * 1989-07-10 1994-03-15 Texas Instruments Incorporated Polycide local interconnect method and structure
US5223456A (en) * 1990-05-02 1993-06-29 Quality Semiconductor Inc. High density local interconnect in an integrated circit using metal silicide
JPH06333944A (ja) * 1993-05-25 1994-12-02 Nippondenso Co Ltd 半導体装置
JP2679647B2 (ja) * 1994-09-28 1997-11-19 日本電気株式会社 半導体装置

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