KR960026475A - 반도체 소자의 게이트전극 형성방법 - Google Patents

반도체 소자의 게이트전극 형성방법 Download PDF

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Publication number
KR960026475A
KR960026475A KR1019940037518A KR19940037518A KR960026475A KR 960026475 A KR960026475 A KR 960026475A KR 1019940037518 A KR1019940037518 A KR 1019940037518A KR 19940037518 A KR19940037518 A KR 19940037518A KR 960026475 A KR960026475 A KR 960026475A
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KR
South Korea
Prior art keywords
gate electrode
forming
insulating film
spacer insulating
layer
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KR1019940037518A
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English (en)
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KR0137543B1 (ko
Inventor
박상훈
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김주용
현대전자산업 주식회사
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Priority to KR1019940037518A priority Critical patent/KR0137543B1/ko
Publication of KR960026475A publication Critical patent/KR960026475A/ko
Application granted granted Critical
Publication of KR0137543B1 publication Critical patent/KR0137543B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H01L21/28132—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects conducting part of electrode is difined by a sidewall spacer or a similar technique, e.g. oxidation under mask, plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes

Abstract

본 발명은 기존의 농광기 및 감광물질을 사용하면서도 0.2㎛ 이하의 초미세 패턴을 형성하기 위한 반도체 소자의 게이트전극 형성방법에 관한 것으로, 예정된 게이트전극 형성부위에 게이트전극층을 형성하는 단계; 상기 게이트전극층 상부에제1절연막 패턴, 스페이서 절연막을 형성하는 단계; 상기 구조 전체 상부에 제2절연막을 형성하는 단계; CMP방법으로 평탄화한 다음, 상기 스페이서 절연막을 선택적으로 제거하는 단계; 상기 제1 및 제2절연막을 습식식각법으로 제거하는 단계; 상기 잔류하는 스페이서 절연막을 식각마스크로 게이트전극층을 과도식각한 다음, 상기 스페이서 절연막을 제거하는 단계를 포함하여 이루어지는 것을 특징으로 한다.

Description

반도체 소자의 게이트전극 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도 내지 제1F도는 본 발명의 일실시예에 따른 게이트전극 형성 공정 단면도.

Claims (5)

  1. 반도체 소자의 게이트전극 형성방법에 있어서, 예정된 게이트전극 형성부위에 게이트전극층을 형성하는 단계; 상기 게이트전극층 상부에 제1절연막 패턴, 스페이서 절연막을 형성하는 단계; 상기 구조 전체 상부에 제2절연막을 형성하는 단계; CMP방법으로 평탄화한 다음, 상기 스페이서 절연막을 선택적으로 제거하는 단계; 상기 제1 및 제2절연막을 습식식각법으로 제거하는 단계; 상기 잔류하는 스페이서 절연막을 식각마스크로 게이트전극층을 과도식각한 다음, 상기 스페이서 절연막을 제거하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 게이트전극 형성방법.
  2. 제1항에 있어서, 상기 제1 및 제2절연막은 질화막인 것을 특징으로 하는 반도체 소자의 게이트전극 형성방법.
  3. 제2항에 있어서, 상기 스페이서 절연막은 화학기상증착법으로 산화막 증착후 비등방성 식각함으로써 형성되는 것을 특징으로 하는 반도체 소자의 게이트전극 형성방법.
  4. 제2항에 있어서, 상기 질화막 습식식각시 식각제로 인산용액을 사용하는 것을 특징으로 하는 반도체 소자의 게이트전극 형성방법.
  5. 제1항 또는 제4항에 있어서, 상기 스페이서 절연막 제거시 건식식각법으로 제거하는 것을 특징으로 하는 반도체 소자의 게이트전극 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940037518A 1994-12-27 1994-12-27 반도체 소자의 게이트전극 형성방법 KR0137543B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940037518A KR0137543B1 (ko) 1994-12-27 1994-12-27 반도체 소자의 게이트전극 형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940037518A KR0137543B1 (ko) 1994-12-27 1994-12-27 반도체 소자의 게이트전극 형성방법

Publications (2)

Publication Number Publication Date
KR960026475A true KR960026475A (ko) 1996-07-22
KR0137543B1 KR0137543B1 (ko) 1998-06-01

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Application Number Title Priority Date Filing Date
KR1019940037518A KR0137543B1 (ko) 1994-12-27 1994-12-27 반도체 소자의 게이트전극 형성방법

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100607732B1 (ko) * 2002-10-09 2006-08-01 동부일렉트로닉스 주식회사 반도체 소자의 게이트 전극 형성 방법
KR100752674B1 (ko) 2006-10-17 2007-08-29 삼성전자주식회사 미세 피치의 하드마스크 패턴 형성 방법 및 이를 이용한반도체 소자의 미세 패턴 형성 방법

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KR0137543B1 (ko) 1998-06-01

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