KR960012472A - 확산층저항의 형성방법 - Google Patents

확산층저항의 형성방법 Download PDF

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Publication number
KR960012472A
KR960012472A KR1019950031294A KR19950031294A KR960012472A KR 960012472 A KR960012472 A KR 960012472A KR 1019950031294 A KR1019950031294 A KR 1019950031294A KR 19950031294 A KR19950031294 A KR 19950031294A KR 960012472 A KR960012472 A KR 960012472A
Authority
KR
South Korea
Prior art keywords
diffusion layer
formation method
layer resistance
resistance
formation
Prior art date
Application number
KR1019950031294A
Other languages
English (en)
Other versions
KR100340974B1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR960012472A publication Critical patent/KR960012472A/ko
Application granted granted Critical
Publication of KR100340974B1 publication Critical patent/KR100340974B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66166—Resistors with PN junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823835—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes silicided or salicided gate conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/8605—Resistors with PN junctions

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1019950031294A 1994-09-29 1995-09-22 확산층저항의형성방법 KR100340974B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP23481394A JP3297784B2 (ja) 1994-09-29 1994-09-29 拡散層抵抗の形成方法
JP94-234813 1994-09-29

Publications (2)

Publication Number Publication Date
KR960012472A true KR960012472A (ko) 1996-04-20
KR100340974B1 KR100340974B1 (ko) 2002-11-14

Family

ID=16976797

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950031294A KR100340974B1 (ko) 1994-09-29 1995-09-22 확산층저항의형성방법

Country Status (3)

Country Link
US (1) US5773339A (ko)
JP (1) JP3297784B2 (ko)
KR (1) KR100340974B1 (ko)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6096591A (en) * 1997-06-30 2000-08-01 Advanced Micro Devices, Inc. Method of making an IGFET and a protected resistor with reduced processing steps
US6027964A (en) * 1997-08-04 2000-02-22 Advanced Micro Devices, Inc. Method of making an IGFET with a selectively doped gate in combination with a protected resistor
DE69832162D1 (de) * 1998-07-22 2005-12-08 St Microelectronics Srl Herstellungsverfahren für ein elektronisches Bauelement, das MOS Transistoren mit salizidierten Übergängen und nicht salizidierten Widerständen enthält
JP3307372B2 (ja) 1999-07-28 2002-07-24 日本電気株式会社 半導体装置およびその製造方法
US6187617B1 (en) 1999-07-29 2001-02-13 International Business Machines Corporation Semiconductor structure having heterogeneous silicide regions and method for forming same
JP4845299B2 (ja) * 2001-03-09 2011-12-28 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4898024B2 (ja) * 2001-06-21 2012-03-14 セイコーインスツル株式会社 半導体装置の製造方法
JP2005183827A (ja) * 2003-12-22 2005-07-07 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP2007273756A (ja) * 2006-03-31 2007-10-18 Oki Electric Ind Co Ltd 半導体装置の製造方法
JP2011091188A (ja) * 2009-10-22 2011-05-06 Sanyo Electric Co Ltd 半導体装置の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4316319A (en) * 1977-10-25 1982-02-23 International Business Machines Corporation Method for making a high sheet resistance structure for high density integrated circuits
JPS59100520A (ja) * 1982-11-30 1984-06-09 Fujitsu Ltd 半導体装置の製造方法
JPS60130844A (ja) * 1983-12-20 1985-07-12 Toshiba Corp 半導体装置の製造方法
US4609568A (en) * 1984-07-27 1986-09-02 Fairchild Camera & Instrument Corporation Self-aligned metal silicide process for integrated circuits having self-aligned polycrystalline silicon electrodes
US5126279A (en) * 1988-12-19 1992-06-30 Micron Technology, Inc. Single polysilicon cross-coupled resistor, six-transistor SRAM cell design technique
US5134088A (en) * 1990-04-27 1992-07-28 Digital Equipment Corporation Precision resistor in self-aligned silicided mos process
JP2705476B2 (ja) * 1992-08-07 1998-01-28 ヤマハ株式会社 半導体装置の製造方法
US5405806A (en) * 1994-03-29 1995-04-11 Motorola Inc. Method for forming a metal silicide interconnect in an integrated circuit

Also Published As

Publication number Publication date
US5773339A (en) 1998-06-30
JPH0897370A (ja) 1996-04-12
JP3297784B2 (ja) 2002-07-02
KR100340974B1 (ko) 2002-11-14

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