KR960009146A - 집적 테스트 회로가 인터포저 기판 내부에 배치되어 있는 멀티칩 모듈 및 그 제조 방법 - Google Patents

집적 테스트 회로가 인터포저 기판 내부에 배치되어 있는 멀티칩 모듈 및 그 제조 방법 Download PDF

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Publication number
KR960009146A
KR960009146A KR1019950025111A KR19950025111A KR960009146A KR 960009146 A KR960009146 A KR 960009146A KR 1019950025111 A KR1019950025111 A KR 1019950025111A KR 19950025111 A KR19950025111 A KR 19950025111A KR 960009146 A KR960009146 A KR 960009146A
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KR
South Korea
Prior art keywords
manufacturing
disposed inside
test circuit
circuit disposed
multichip module
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Application number
KR1019950025111A
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English (en)
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KR0174334B1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
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Publication of KR960009146A publication Critical patent/KR960009146A/ko
Application granted granted Critical
Publication of KR0174334B1 publication Critical patent/KR0174334B1/ko

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Logic Circuits (AREA)
KR1019950025111A 1994-08-17 1995-08-16 집적 테스트 회로가 인터포저 기판 내부에 배치되어 있는 멀티칩 모듈 및 그 제조 방법 KR0174334B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8/292,120 1994-08-17
US08/292,120 US5517515A (en) 1994-08-17 1994-08-17 Multichip module with integrated test circuitry disposed within interposer substrate

Publications (2)

Publication Number Publication Date
KR960009146A true KR960009146A (ko) 1996-03-22
KR0174334B1 KR0174334B1 (ko) 1999-04-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950025111A KR0174334B1 (ko) 1994-08-17 1995-08-16 집적 테스트 회로가 인터포저 기판 내부에 배치되어 있는 멀티칩 모듈 및 그 제조 방법

Country Status (3)

Country Link
US (1) US5517515A (ko)
JP (1) JP3103013B2 (ko)
KR (1) KR0174334B1 (ko)

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Also Published As

Publication number Publication date
JP3103013B2 (ja) 2000-10-23
KR0174334B1 (ko) 1999-04-01
US5517515A (en) 1996-05-14
JPH0868832A (ja) 1996-03-12

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