KR960005839A - 반도체 소자의 필드 산화막 형성방법 - Google Patents

반도체 소자의 필드 산화막 형성방법 Download PDF

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Publication number
KR960005839A
KR960005839A KR1019940016087A KR19940016087A KR960005839A KR 960005839 A KR960005839 A KR 960005839A KR 1019940016087 A KR1019940016087 A KR 1019940016087A KR 19940016087 A KR19940016087 A KR 19940016087A KR 960005839 A KR960005839 A KR 960005839A
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KR
South Korea
Prior art keywords
oxide film
film
field oxide
forming
semiconductor device
Prior art date
Application number
KR1019940016087A
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English (en)
Inventor
박상훈
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940016087A priority Critical patent/KR960005839A/ko
Priority to GB9513225A priority patent/GB2291260B/en
Priority to US08/498,914 priority patent/US5599731A/en
Priority to CN95108397A priority patent/CN1108637C/zh
Publication of KR960005839A publication Critical patent/KR960005839A/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

본 발명은 반도체 소자의 필드 산화막 형성방법에 관한 것으로, 질화막과 패드 산화막 사이에 패드 폴리실리 콘막을 형성하고, 질화막을 패턴화여 필드 영역을 확정한 후 버즈 비크(bird′s beak) 현상이 발생할 부위에 질소원자를 이온주입하므로써 필드 산화막 형성을 위한 열산화공정시 산화저지층으로 사용하여 소자간 절연효과 및 버즈 비크 발생을 최소화할 수 있는 반도체 소자의 필드 산화막 형성방법에 관한 것이다.

Description

반도체 소자의 필드 산화막 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 종래 필드 산화막의 단면도이다.
제2A도 내지 제2E도는 본 발명에 의한 반도체 소자의 필드 산화막 형성단계를 도시한 소자의 단면도이다.

Claims (2)

  1. 반도체 소자의 필드 산화막 형성방법에 있어서, 실리콘 기판(11)상부에 패드 산화막(12), 패드 폴리실리콘막(13) 및 질화막(14)을 순차적으로 형성하는 단계와, 상기 단계로부터 필드영역을 확정하기 위해 질화막(14)을 패턴화한 후, 채널스톱영역(15)을 형성하는 단계와, 상기 단계로부터 필드영역에서 노출된 패드 폴리실리콘막(13)의 일정부위에 패턴화된 감광막(16)을 형성한 다음 상기 패턴화된 감광막(16) 가장자리부분으로 노출될 패드 폴리실리콘막(13)에 산화 저지층(17)을 형성하는 단계와, 상기 단계로부터 상기 감광막(16)을 제거한 후 열산화공정을 실시하고, 질화막(14), 패드 폴리실리콘막(13) 및 패드 산화막(12)을 제거하여 버즈 비크가 없는 필드 산화막(18) 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 필드 산화막 형성방법.
  2. 제1항에 있어서, 상기 산화 저지층(17)은 질소원자, NH2또는 10~20KeV, 1×1012~1×1015원자/㎠의 조건으로 이온주입하여 형성되는 것을 특징으로 하는 반도체 소자의 필드 산화막 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940016087A 1994-07-06 1994-07-06 반도체 소자의 필드 산화막 형성방법 KR960005839A (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019940016087A KR960005839A (ko) 1994-07-06 1994-07-06 반도체 소자의 필드 산화막 형성방법
GB9513225A GB2291260B (en) 1994-07-06 1995-06-29 Method of forming a field oxide film in a semiconductor device
US08/498,914 US5599731A (en) 1994-07-06 1995-07-06 Method of forming a field oxide film in a semiconductor device
CN95108397A CN1108637C (zh) 1994-07-06 1995-07-06 半导体器件场氧化层的形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940016087A KR960005839A (ko) 1994-07-06 1994-07-06 반도체 소자의 필드 산화막 형성방법

Publications (1)

Publication Number Publication Date
KR960005839A true KR960005839A (ko) 1996-02-23

Family

ID=19387332

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940016087A KR960005839A (ko) 1994-07-06 1994-07-06 반도체 소자의 필드 산화막 형성방법

Country Status (4)

Country Link
US (1) US5599731A (ko)
KR (1) KR960005839A (ko)
CN (1) CN1108637C (ko)
GB (1) GB2291260B (ko)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0138234B1 (ko) * 1994-02-24 1998-04-28 김광호 고전압 모오스 트랜지스터의 구조
JP2730535B2 (ja) * 1995-12-18 1998-03-25 日本電気株式会社 半導体装置の製造方法
US5899727A (en) * 1996-05-02 1999-05-04 Advanced Micro Devices, Inc. Method of making a semiconductor isolation region bounded by a trench and covered with an oxide to improve planarization
US5972746A (en) * 1996-10-08 1999-10-26 Mosel Vitelic, Inc. Method for manufacturing semiconductor devices using double-charged implantation
US5972777A (en) * 1997-07-23 1999-10-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming isolation by nitrogen implant to reduce bird's beak
US6025240A (en) * 1997-12-18 2000-02-15 Advanced Micro Devices, Inc. Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices
TW358236B (en) * 1997-12-19 1999-05-11 Nanya Technology Corp Improved local silicon oxidization method in the manufacture of semiconductor isolation
US6015736A (en) * 1997-12-19 2000-01-18 Advanced Micro Devices, Inc. Method and system for gate stack reoxidation control
US6194288B1 (en) 1999-01-04 2001-02-27 Taiwan Semiconductor Manufacturing Company Implant N2 into a pad oxide film to mask the active region and grow field oxide without Si3N4 film
CN101359615B (zh) * 2007-07-30 2010-08-11 中芯国际集成电路制造(上海)有限公司 半导体器件隔离结构及半导体器件的制作方法
CN104299984A (zh) * 2013-07-19 2015-01-21 北大方正集团有限公司 一种半导体器件及其制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0020144B1 (en) * 1979-05-31 1986-01-29 Fujitsu Limited Method of producing a semiconductor device
JPS6057703B2 (ja) * 1980-11-29 1985-12-16 株式会社東芝 半導体装置及びその製造方法
US4407696A (en) * 1982-12-27 1983-10-04 Mostek Corporation Fabrication of isolation oxidation for MOS circuit
JPS6171646A (ja) * 1984-09-17 1986-04-12 Oki Electric Ind Co Ltd 半導体素子の製造方法
US5149669A (en) * 1987-03-06 1992-09-22 Seiko Instruments Inc. Method of forming an isolation region in a semiconductor device
JPH01297837A (ja) * 1988-05-25 1989-11-30 Sony Corp 半導体装置の製造方法
US5192707A (en) * 1991-07-31 1993-03-09 Sgs-Thomson Microelectronics, Inc. Method of forming isolated regions of oxide
JPH05144805A (ja) * 1991-11-22 1993-06-11 Mitsubishi Electric Corp 半導体装置の製造方法
US5308787A (en) * 1993-10-22 1994-05-03 United Microelectronics Corporation Uniform field oxidation for locos isolation

Also Published As

Publication number Publication date
GB2291260A (en) 1996-01-17
CN1133490A (zh) 1996-10-16
GB9513225D0 (en) 1995-09-06
CN1108637C (zh) 2003-05-14
US5599731A (en) 1997-02-04
GB2291260B (en) 1997-08-13

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