CN1133490A - 半导体器件场氧化层的形成方法 - Google Patents

半导体器件场氧化层的形成方法 Download PDF

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CN1133490A
CN1133490A CN95108397A CN95108397A CN1133490A CN 1133490 A CN1133490 A CN 1133490A CN 95108397 A CN95108397 A CN 95108397A CN 95108397 A CN95108397 A CN 95108397A CN 1133490 A CN1133490 A CN 1133490A
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bed course
semiconductor device
nitration case
layer
atoms
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CN1108637C (zh
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朴相勋
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SK Hynix Inc
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Hyundai Electronics Industries Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks

Abstract

本发明公开了一种能最大限度地减少鸟嘴出现的半导体器件场氧化层形成方法,减少鸟嘴的具体措施是:在氮化层上绘制线路图形从而界定出场区;再在本来会出现鸟嘴的部分注入氮原子,由此形成防氧化层。

Description

半导体器件场氧化层的形成方法
本发明涉及半导体器件场氧化层的一种形成方法,更具体地说,涉及一种能最大限度地减少鸟嘴形部分的出现的半导体器件场氧化层的形成方法,减少鸟嘴形部分的具体措施是:在氮化层与氧化垫层之间形成多晶硅垫层;在氮化层上绘制线路图形从而界定出场区;再在会出现鸟嘴形部分处注入氮原子,由此形成防氧化层。
通常,形成一场氧化层以将各半导体元件隔离开来。
图1的半导体器件剖视图用以说明现有技术形成场氧化层的方法。参看图1,场氧化层是这样形成的:在硅基片1上形成氧化垫层2和氮化层3,再在氮化层3和氧化垫层2上绘制线路图形从而界定出场区,然后用离子注入法在硅基片1上形成沟道截断区4。
由于形成场氧化层5时,从场氧化层5的边缘至有源区形成有鸟嘴形部分B,有源区缩小了,这给超高集成度集成电路器件的制造带来了很大的障碍。
因此,本发明的目的是提供一种通过降止鸟嘴形部分在有源区的出现能提高半导体器件的产量和可靠性的半导体器件场氧化层的形成方法。
为达到此目的,本发明的场氧化层形成法包括下列步骤:
依次在硅基片上形成氧化垫层、多晶硅层和氮化层;在氮化层上绘制线路图形,限定出场区,然后形成沟道截断区;在露出的多晶硅垫层经选定的部分上绘制光致抗蚀剂图形,然后往暴露在光致抗蚀剂图形边缘的多晶硅垫层中注入氮原子;除去光致抗蚀剂图形之后进行热氧化处理,并除去氮化层、多晶硅垫层和氧化垫层,由此形成场氧化层。
为全面了解本发明的本质和目的,应结合附图参阅下面的详细说明。附图中:
图1是说明现有技术形成场氧化层的方法的剖视图;
图2A至图2E是说明形成本发明的半导体器件中场氧化层的各步骤的剖视图;
附图各视图中类似的编号表示类似的部分
参看图2A,在硅基片11上依次形成氧化垫层12、多晶硅垫层13和氮化层14。
参看图2B,用蚀刻法利用隔离掩模极度刻蚀氮化层14使多晶硅垫层13暴露出来,从而界定出场区,再用离子注入法在硅基片11上形成保护区15。
参看图2C,在露出的多晶硅垫层13经选择的部分上形成光致抗蚀剂图形16,再在10至30千电子伏特和1×1012~1×1015原子/平方厘米的条件下往光致抗蚀剂图形16形缘露出的多晶硅垫层13中以离子注入的方式注入氮原子。
氮原子以离子注入的方式注入多晶硅垫层13中在热氧化处理过程中起防氧化层的作用。这里可以用NH或NO气来代替氮原子形成防氧化层17。
参看图2D,光致抗蚀剂16除去之后,用热氧化法形成预定厚度的场氧化层。这样,由于注入氮原子形成了防氧化层17,因而不会产生鸟嘴形部分。
参看图2E,除去剩下的氮化层14、多晶硅垫层13和氧化垫层12,于是就形成了场氧化层18。
综上所述,本发明用防氧化层防止了鸟嘴形部分的出现,从而提高了半导体器件的产量和可靠性。
虽然本发明就其最佳实施例进行介绍是有一定程度的特殊性,但本技术领域的行家们都知道,这里所公开的最佳实施例仅仅是举例而已,在不脱离本发明的精神实质和范围的前提下是可以对其各部分在结构、组合和配置上作种种修改的。

Claims (3)

1.形成半导体器件场氧化层的一种方法,其特征在于,它包括下列步骤:
在硅基片上依次形成氧化垫层、多晶硅垫层和氮化层;
在所述氮化层上绘制线路图形界定场区之后,形成沟道截断区;
在所述露出的多晶硅垫层经选定的部分形成光致抗蚀剂图形,再往所述光致抗蚀剂图形边缘外露出的所述多晶硅垫层注入氮原子,形成防氧化层;
除去所述光致抗蚀剂图形之后进行热氧化处理,然后除去所述氮化层、多晶硅垫层和氧化垫层,由此形成氧化层。
2.如权利要求1所述的方法,其特征在于,所述防氧化层是在10至30千电子伏特、1×1012~1×1015原子/平方厘米的条件下注入氮原子形成的。
3.如权利要求1或2所述的方法,其特征在于,用NH3或NO氧体代替氮原子束形成所述防氧化层。
CN95108397A 1994-07-06 1995-07-06 半导体器件场氧化层的形成方法 Expired - Fee Related CN1108637C (zh)

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KR1019940016087A KR960005839A (ko) 1994-07-06 1994-07-06 반도체 소자의 필드 산화막 형성방법
KR16087/94 1994-07-06
KR16087/1994 1994-07-06

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101359615B (zh) * 2007-07-30 2010-08-11 中芯国际集成电路制造(上海)有限公司 半导体器件隔离结构及半导体器件的制作方法
CN104299984A (zh) * 2013-07-19 2015-01-21 北大方正集团有限公司 一种半导体器件及其制造方法

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0138234B1 (ko) * 1994-02-24 1998-04-28 김광호 고전압 모오스 트랜지스터의 구조
JP2730535B2 (ja) * 1995-12-18 1998-03-25 日本電気株式会社 半導体装置の製造方法
US5899727A (en) * 1996-05-02 1999-05-04 Advanced Micro Devices, Inc. Method of making a semiconductor isolation region bounded by a trench and covered with an oxide to improve planarization
US5972746A (en) * 1996-10-08 1999-10-26 Mosel Vitelic, Inc. Method for manufacturing semiconductor devices using double-charged implantation
US5972777A (en) * 1997-07-23 1999-10-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming isolation by nitrogen implant to reduce bird's beak
US6025240A (en) * 1997-12-18 2000-02-15 Advanced Micro Devices, Inc. Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices
TW358236B (en) * 1997-12-19 1999-05-11 Nanya Technology Corp Improved local silicon oxidization method in the manufacture of semiconductor isolation
US6015736A (en) * 1997-12-19 2000-01-18 Advanced Micro Devices, Inc. Method and system for gate stack reoxidation control
US6194288B1 (en) 1999-01-04 2001-02-27 Taiwan Semiconductor Manufacturing Company Implant N2 into a pad oxide film to mask the active region and grow field oxide without Si3N4 film

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3071380D1 (en) * 1979-05-31 1986-03-13 Fujitsu Ltd Method of producing a semiconductor device
JPS6057703B2 (ja) * 1980-11-29 1985-12-16 株式会社東芝 半導体装置及びその製造方法
US4407696A (en) * 1982-12-27 1983-10-04 Mostek Corporation Fabrication of isolation oxidation for MOS circuit
JPS6171646A (ja) * 1984-09-17 1986-04-12 Oki Electric Ind Co Ltd 半導体素子の製造方法
US5149669A (en) * 1987-03-06 1992-09-22 Seiko Instruments Inc. Method of forming an isolation region in a semiconductor device
JPH01297837A (ja) * 1988-05-25 1989-11-30 Sony Corp 半導体装置の製造方法
US5192707A (en) * 1991-07-31 1993-03-09 Sgs-Thomson Microelectronics, Inc. Method of forming isolated regions of oxide
JPH05144805A (ja) * 1991-11-22 1993-06-11 Mitsubishi Electric Corp 半導体装置の製造方法
US5308787A (en) * 1993-10-22 1994-05-03 United Microelectronics Corporation Uniform field oxidation for locos isolation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101359615B (zh) * 2007-07-30 2010-08-11 中芯国际集成电路制造(上海)有限公司 半导体器件隔离结构及半导体器件的制作方法
CN104299984A (zh) * 2013-07-19 2015-01-21 北大方正集团有限公司 一种半导体器件及其制造方法

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GB9513225D0 (en) 1995-09-06
US5599731A (en) 1997-02-04
KR960005839A (ko) 1996-02-23
CN1108637C (zh) 2003-05-14
GB2291260B (en) 1997-08-13
GB2291260A (en) 1996-01-17

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