KR940004793A - 슬롯을 갖는 리드프레임 및 집적 회로 패키지를 몰딩하기 위한 방법 - Google Patents

슬롯을 갖는 리드프레임 및 집적 회로 패키지를 몰딩하기 위한 방법 Download PDF

Info

Publication number
KR940004793A
KR940004793A KR1019930016656A KR930016656A KR940004793A KR 940004793 A KR940004793 A KR 940004793A KR 1019930016656 A KR1019930016656 A KR 1019930016656A KR 930016656 A KR930016656 A KR 930016656A KR 940004793 A KR940004793 A KR 940004793A
Authority
KR
South Korea
Prior art keywords
leadframe
slot
mold
integrated circuit
cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019930016656A
Other languages
English (en)
Korean (ko)
Inventor
와이. 찬 민
Original Assignee
윌리엄 이. 힐러
텍사스 인스트루먼츠 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 윌리엄 이. 힐러, 텍사스 인스트루먼츠 인코포레이티드 filed Critical 윌리엄 이. 힐러
Publication of KR940004793A publication Critical patent/KR940004793A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/415—Leadframe inner leads serving as die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1019930016656A 1992-08-27 1993-08-26 슬롯을 갖는 리드프레임 및 집적 회로 패키지를 몰딩하기 위한 방법 Withdrawn KR940004793A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US7/936,159 1992-08-27
US07/936,159 US5293065A (en) 1992-08-27 1992-08-27 Lead frame having an outlet with a larger cross sectional area than the inlet

Publications (1)

Publication Number Publication Date
KR940004793A true KR940004793A (ko) 1994-03-16

Family

ID=25468251

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930016656A Withdrawn KR940004793A (ko) 1992-08-27 1993-08-26 슬롯을 갖는 리드프레임 및 집적 회로 패키지를 몰딩하기 위한 방법

Country Status (8)

Country Link
US (1) US5293065A (enExample)
EP (1) EP0589569B1 (enExample)
JP (1) JP3512441B2 (enExample)
KR (1) KR940004793A (enExample)
DE (1) DE69324980T2 (enExample)
MY (1) MY117837A (enExample)
SG (1) SG44614A1 (enExample)
TW (1) TW251385B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100559551B1 (ko) * 2003-10-11 2006-03-15 앰코 테크놀로지 코리아 주식회사 반도체 장치용 리드프레임 및 이를 위한 봉지 금형과 봉지방법

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0888308A (ja) * 1994-09-15 1996-04-02 Toshiba Corp リードフレーム及び半導体装置の製造方法
JP3290869B2 (ja) * 1995-11-16 2002-06-10 株式会社東芝 半導体装置
KR100195513B1 (ko) * 1996-10-04 1999-06-15 윤종용 반도체 칩 패키지
KR100476668B1 (ko) * 1997-06-25 2006-06-13 삼성전자주식회사 공기방출구를갖는볼그리드어레이패키지용인쇄회로기판구조
WO1999008850A2 (de) * 1997-08-20 1999-02-25 Infineon Technologies Ag Pressform sowie verfahren zum herstellen eines kunststoffverbundkörpers
JP4256502B2 (ja) * 1998-11-12 2009-04-22 新光電気工業株式会社 半導体装置用リードフレームと半導体装置
JP2002533915A (ja) * 1998-12-22 2002-10-08 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ チップと完全に包囲された接続手段と、を有するデータ保持器
US6265761B1 (en) * 1999-05-07 2001-07-24 Maxim Integrated Products, Inc. Semiconductor devices with improved lead frame structures
US6319450B1 (en) 1999-07-12 2001-11-20 Agere Systems Guardian Corp. Encapsulated circuit using vented mold
EP1075022A1 (en) * 1999-08-04 2001-02-07 STMicroelectronics S.r.l. Offset edges mold for plastic packaging of integrated semiconductor devices
JP3773855B2 (ja) * 2001-11-12 2006-05-10 三洋電機株式会社 リードフレーム
JP4387193B2 (ja) * 2001-11-30 2009-12-16 パナソニック フォト・ライティング 株式会社 ストロボ装置及びその製造方法
JP2003224239A (ja) * 2002-01-29 2003-08-08 Sanyo Electric Co Ltd 半導体装置およびその製造方法
US10020211B2 (en) * 2014-06-12 2018-07-10 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer-level molding chase design
JP2019079928A (ja) * 2017-10-24 2019-05-23 ルネサスエレクトロニクス株式会社 半導体装置の製造方法およびリードフレーム

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54152970A (en) * 1978-05-24 1979-12-01 Hitachi Ltd Resin-molding method, mold and molded body
JPS5521128A (en) * 1978-08-02 1980-02-15 Hitachi Ltd Lead frame used for semiconductor device and its assembling
JPS5923554A (ja) * 1982-07-30 1984-02-07 Hitachi Ltd 半導体装置用リ−ドフレ−ム
JPS6059759A (ja) * 1983-09-13 1985-04-06 Toshiba Corp リ−ドフレ−ム
US4862586A (en) * 1985-02-28 1989-09-05 Michio Osada Lead frame for enclosing semiconductor chips with resin
US4862245A (en) * 1985-04-18 1989-08-29 International Business Machines Corporation Package semiconductor chip
JPS6224653A (ja) * 1985-07-24 1987-02-02 Hitachi Tokyo Electron Co Ltd リ−ドフレ−ム
JPS63150846A (ja) * 1986-12-16 1988-06-23 Matsushita Electric Ind Co Ltd イオンビ−ム照射装置
JPS6465861A (en) * 1987-09-07 1989-03-13 Toshiba Corp Lead frame for semiconductor device
JPS63265454A (ja) * 1987-12-24 1988-11-01 Nec Corp 半導体装置
JPH01192154A (ja) * 1988-01-28 1989-08-02 Nippon Motoroola Kk リードフレーム
JPH01276657A (ja) * 1988-04-27 1989-11-07 Matsushita Electron Corp リードフレーム
JP2593912B2 (ja) * 1988-04-29 1997-03-26 新光電気工業株式会社 リードフレーム
US5018003A (en) * 1988-10-20 1991-05-21 Mitsubishi Denki Kabushiki Kaisha Lead frame and semiconductor device
US4916519A (en) * 1989-05-30 1990-04-10 International Business Machines Corporation Semiconductor package
US4965654A (en) * 1989-10-30 1990-10-23 International Business Machines Corporation Semiconductor package with ground plane
JPH03280562A (ja) * 1990-03-29 1991-12-11 Hitachi Ltd リードフレーム及び半導体装置樹脂封止方法
JPH04184966A (ja) * 1990-11-20 1992-07-01 Toshiba Corp 半導体装置のリードフレーム

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100559551B1 (ko) * 2003-10-11 2006-03-15 앰코 테크놀로지 코리아 주식회사 반도체 장치용 리드프레임 및 이를 위한 봉지 금형과 봉지방법

Also Published As

Publication number Publication date
TW251385B (enExample) 1995-07-11
JPH06177305A (ja) 1994-06-24
US5293065A (en) 1994-03-08
DE69324980D1 (de) 1999-06-24
EP0589569B1 (en) 1999-05-19
DE69324980T2 (de) 1999-10-07
MY117837A (en) 2004-08-30
SG44614A1 (en) 1997-12-19
JP3512441B2 (ja) 2004-03-29
EP0589569A1 (en) 1994-03-30

Similar Documents

Publication Publication Date Title
KR940004793A (ko) 슬롯을 갖는 리드프레임 및 집적 회로 패키지를 몰딩하기 위한 방법
EP0258098B1 (en) Encapsulated semiconductor device and method of producing the same
US5578261A (en) Method of encapsulating large substrate devices using reservoir cavities for balanced mold filling
KR970006527B1 (ko) 성형링 집적회로 패키지
US5625536A (en) Semiconductor device
MY118338A (en) A leadframe, a method of manufacturing a leadframe and a method of packaging an electronic component utilising the leadframe.
KR960031109A (ko) 수지성형 방법 및 장치
JPS57147260A (en) Manufacture of resin-sealed semiconductor device and lead frame used therefor
US20010001936A1 (en) Trimming apparatus having punches with air flow routes for removal of gate scraps
KR930001385A (ko) 표면 장착 팩키지용 포스트를 갖고 있는 집적 회로 장치 및 그 제조방법
US5665296A (en) Molding technique for molding plastic packages
KR970024040A (ko) 반도체장치를 제조하기 위한 수지봉지용 금형(resin encapsulating mold die for manufacturing a semiconductor device)
US5196917A (en) Carrier tape
JPS6240851B2 (enExample)
EP0130552B1 (en) Electronic device method using a leadframe with an integral mold vent means
KR20010041616A (ko) 캐리어에 장착된 전자 부품을 밀봉하기 위한 몰드 부품,몰드 및 방법
KR960002775A (ko) 수지-봉합(resin-sealed) 반도체 소자
JP2002506287A5 (enExample)
JP3124248B2 (ja) 半導体チップパッケージの成形装置
KR920005449B1 (ko) 반도체전자부품의 밀봉성형장치
JPS5929442A (ja) 半導体装置用リ−ドフレ−ム
MY125111A (en) Method of molding a plurality of solid electrolytic capacitors on a metal lead frame
KR930007177Y1 (ko) 댐바가 없는 리드 프레임
JP2665668B2 (ja) 電子部品の樹脂封止成形方法及びその樹脂封止成形用金型
JPH0536745A (ja) 封止金型及び封止方法

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PC1203 Withdrawal of no request for examination

St.27 status event code: N-1-6-B10-B12-nap-PC1203

WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid
P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000